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2023-02-27hw/isa/vt82c686: Remove intermediate IRQ forwarderPhilippe Mathieu-Daudé
Directly dispatch ISA IRQs to 'cpu_intr' output IRQ by removing the intermediate via_isa_request_i8259_irq() handler. Rename ISA IRQs array as 'isa_irqs_in' to emphasize these are input IRQs. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230210163744.32182-5-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2022-10-31hw/isa/vt82c686: Create rtc-time alias in boards insteadBernhard Beschow
According to good QOM practice, an object should only deal with objects of its own sub tree. Having devices create an alias on the machine object doesn't respect this good practice. To resolve this, create the alias in the machine's code. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220901114127.53914-14-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-10-31hw/isa/vt82c686: Embed RTCState in host deviceBernhard Beschow
Embed the rtc in the host device, analoguous to the other child devices and analoguous to PIIX4. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220901114127.53914-13-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-10-31hw/isa/vt82c686: Instantiate AC97 and MC97 functions in host deviceBernhard Beschow
The AC97 function's wakeup status is wired to the PM function and both the AC97 and MC97 interrupt routing is determined by the ISA function. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220901114127.53914-11-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-10-31hw/isa/vt82c686: Instantiate PM function in host deviceBernhard Beschow
The PM controller has activity bits which monitor activity of other built-in devices in the host device. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220901114127.53914-10-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-10-31hw/isa/vt82c686: Instantiate USB functions in host deviceBernhard Beschow
The USB functions can be enabled/disabled through the ISA function. Also its interrupt routing can be influenced there. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220901114127.53914-9-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-10-31hw/isa/vt82c686: Instantiate IDE function in host deviceBernhard Beschow
The IDE function is closely tied to the ISA function (e.g. the IDE interrupt routing happens there), so it makes sense that the IDE function is instantiated within the south bridge itself. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220901114127.53914-7-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-10-31hw/isa/vt82c686: Reuse errpBernhard Beschow
Rather than terminating abruptly, make use of the already present errp and propagate the error to the caller. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220901114127.53914-5-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-10-31hw/isa/vt82c686: Prefer pci_address_space() over get_system_memory()Bernhard Beschow
Unlike get_system_memory(), pci_address_space() respects the memory tree available to the parent device. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220901114127.53914-4-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-10-31hw/isa/vt82c686: Resolve unneeded attributeBernhard Beschow
Now that also the super io device is realized in the common realize method, the isa_bus attribute can be turned into a temporary. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220901114127.53914-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-10-31hw/isa/vt82c686: Resolve chip-specific realize methodsBernhard Beschow
The object creation now happens in chip-specific init methods which allows the realize methods to be consolidated into one method. Shifting the logic into the init methods has the addidional advantage that the parent object's init methods are called implicitly - like constructors in object-oriented languages. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220901114127.53914-2-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-10-18vt82c686: Add a method to VIA_ISA to raise ISA interruptsBALATON Zoltan
Other functions in the VT82xx chips need to raise ISA interrupts. Keep a reference to them in the device state and add via_isa_set_irq() to allow setting their state. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <778c04dc2c8affac060b8edf9e8d7dab3c3e04eb.1634259980.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-10-18vt82c686: Move common code to via_isa_realizeBALATON Zoltan
The vt82c686b_realize and vt8231_realize methods are almost identical, factor out the common parts to a via_isa_realize function to avoid code duplication. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <7cb7a16ff4daf8f48d576246255bea1fd355207c.1634259980.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-05-05Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210504' ↵Peter Maydell
into staging ppc patch queue 2021-05-04 Here's the first ppc pull request for qemu-6.1. It has a wide variety of stuff accumulated during the 6.0 freeze. Highlights are: * Multi-phase reset cleanups for PAPR * Preliminary cleanups towards allowing !CONFIG_TCG for the ppc target * Cleanup of AIL logic and extension to POWER10 * Further improvements to handling of hot unplug failures on PAPR * Allow much larger numbers of CPU on pseries * Support for the H_SCM_HEALTH hypercall * Add support for the Pegasos II board * Substantial cleanup to hflag handling * Assorted minor fixes and cleanups # gpg: Signature made Tue 04 May 2021 06:52:39 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.1-20210504: (46 commits) hw/ppc/pnv_psi: Use device_cold_reset() instead of device_legacy_reset() hw/ppc/spapr_vio: Reset TCE table object with device_cold_reset() hw/intc/spapr_xive: Use device_cold_reset() instead of device_legacy_reset() target/ppc: removed VSCR from SPR registration target/ppc: Reduce the size of ppc_spr_t target/ppc: Clean up _spr_register et al target/ppc: Add POWER10 exception model target/ppc: rework AIL logic in interrupt delivery target/ppc: move opcode table logic to translate.c target/ppc: code motion from translate_init.c.inc to gdbstub.c spapr_drc.c: handle hotunplug errors in drc_unisolate_logical() spapr.h: increase FDT_MAX_SIZE spapr.c: do not use MachineClass::max_cpus to limit CPUs ppc: Rename current DAWR macros and variables target/ppc: POWER10 supports scv target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour docs/system: ppc: Add documentation for ppce500 machine roms/u-boot: Bump ppce500 u-boot to v2021.04 to fix broken pci support roms/Makefile: Update ppce500 u-boot build directory name ppc/spapr: Add support for implement support for H_SCM_HEALTH ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-04vt82c686: Add emulation of VT8231 south bridgeBALATON Zoltan
Add emulation of VT8231 south bridge ISA part based on the similar VT82C686B but implemented in a separate subclass that holds the differences while reusing parts that can be shared. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <10abc9f89854e7c980b9731c33d25a2e307e9c4f.1616680239.git.balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04vt82c686: Introduce abstract TYPE_VIA_ISA and base vt82c686b_isa on itBALATON Zoltan
To allow reusing ISA bridge emulation for vt8231_isa move the device state of vt82c686b_isa emulation in an abstract via_isa class. This change breaks migration back compatibility but this is not an issue for Fuloong2E machine which is not versioned or migration supported. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <0cb8fc69c7aaa555589181931b881335fecd2ef3.1616680239.git.balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04vt82c686: Add VT8231_SUPERIO based on VIA_SUPERIOBALATON Zoltan
The VT8231 south bridge is very similar to VT82C686B but there are some differences in register addresses and functionality, e.g. the VT8231 only has one serial port. This commit adds VT8231_SUPERIO subclass based on the abstract VIA_SUPERIO class to emulate the superio part of VT8231. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <8108809321f9ecf3fb1aea22ddaeccc7c3a57c8e.1616680239.git.balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-04vt82c686: QOM-ify superio related functionalityBALATON Zoltan
Collect superio functionality and its controlling config registers handling in an abstract VIA_SUPERIO class that is a subclass of ISA_SUPERIO and put vt82c686b specific parts in a subclass of this abstract class. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <fbcc8cc8baf83f327612a1ef1c14bcbcdb0e7edb.1616680239.git.balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-02Do not include exec/address-spaces.h if it's not really necessaryThomas Huth
Stop including exec/address-spaces.h in files that don't need it. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-5-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-04-01isa/v582c686: Reinitialize ACPI PM device on resetIsaku Yamahata
Commit 6be8cf56bc8b made sure that SCI is enabled in PM1.CNT on reset in acpi_only mode by modifying acpi_pm1_cnt_reset() and that worked for q35 as expected. This patch adds reset ACPI PM related registers on vt82c686 reset time and de-assert sci. via_pm_realize() initializes acpi pm tmr, evt, cnt and gpe. Reset them on device reset. Cc: BALATON Zoltan <balaton@eik.bme.hu> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <0a3fe998525552860919a690ce83dab8f663ab99.1616532563.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-04-01vt82c686.c: don't raise SCI when PCI_INTERRUPT_PIN isn't setupIsaku Yamahata
Without this patch, the following patch will triger clan runtime sanitizer warnings as follows. This patch proactively works around it. I leave a correct fix to v582c686.c maintainerfix as I'm not sure about fuloong2e device model. > MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))} > QTEST_QEMU_IMG=./qemu-img > G_TEST_DBUS_DAEMON=/home/petmay01/linaro/qemu-for-merges/tests/dbus-vmstate-daemon.sh > QTEST_QEMU_BINARY=./qemu-system-mips64el tests/qtest/qom-test --tap -k > PASS 1 qtest-mips64el/qom-test /mips64el/qom/loongson3-virt > PASS 2 qtest-mips64el/qom-test /mips64el/qom/none > PASS 3 qtest-mips64el/qom-test /mips64el/qom/magnum > PASS 4 qtest-mips64el/qom-test /mips64el/qom/mipssim > PASS 5 qtest-mips64el/qom-test /mips64el/qom/malta > ../../hw/pci/pci.c:252:30: runtime error: shift exponent -1 is negative > PASS 6 qtest-mips64el/qom-test /mips64el/qom/fuloong2e > PASS 7 qtest-mips64el/qom-test /mips64el/qom/boston > PASS 8 qtest-mips64el/qom-test /mips64el/qom/pica61 > > and similarly for eg > > MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))} > QTEST_QEMU_IMG=./qemu-img > G_TEST_DBUS_DAEMON=/home/petmay01/linaro/qemu-for-merges/tests/dbus-vmstate-daemon.sh > QTEST_QEMU_BINARY=./qemu-system-mips64el tests/qtest/endianness-test > --tap -k > ../../hw/pci/pci.c:252:30: runtime error: shift exponent -1 is negative > PASS 1 qtest-mips64el/endianness-test /mips64el/endianness/fuloong2e > ../../hw/pci/pci.c:252:30: runtime error: shift exponent -1 is negative > PASS 2 qtest-mips64el/endianness-test /mips64el/endianness/split/fuloong2e > ../../hw/pci/pci.c:252:30: runtime error: shift exponent -1 is negative > PASS 3 qtest-mips64el/endianness-test /mips64el/endianness/combine/fuloong2e Cc: BALATON Zoltan <balaton@eik.bme.hu> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <62a5fc69e453fb848bfd4794bae1852a75af73c5.1616532563.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-02-23acpi/core: always set SCI_EN when SMM isn't supportedIsaku Yamahata
If SMM is not supported, ACPI fixed hardware doesn't support legacy-mode. ACPI-only platform. Where SCI_EN in PM1_CNT register is always set. The bit tells OS legacy mode(SCI_EN cleared) or ACPI mode(SCI_EN set). With the next patch (setting fadt.smi_cmd = 0 when smm isn't enabled), guest Linux tries to switch to ACPI mode, finds smi_cmd = 0, and then fails to initialize acpi subsystem. This patch proactively fixes it. This patch changes guest ABI. To keep compatibility, use "smm-compat" introduced by earlier patch. If the property is true, disable new behavior. ACPI spec 4.8.10.1 PM1 Event Grouping PM1 Eanble Registers > For ACPI-only platforms (where SCI_EN is always set) Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <500f62081626997e46f96377393d3662211763a8.1613615732.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-02-21vt82c686: Fix superio_cfg_{read,write}() functionsBALATON Zoltan
These functions are memory region callbacks so we have to check against relative address not the mapped address. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <15b2968fd300a12d06b42368d084f6f80d3c3be5.1610223397.git.balaton@eik.bme.hu> [PMD: Split original patch in 5, this is part 5/5] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Log superio_cfg unimplemented accessesBALATON Zoltan
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <15b2968fd300a12d06b42368d084f6f80d3c3be5.1610223397.git.balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [PMD: Split original patch in 5, this is part 4/5] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Simplify by returning earlierBALATON Zoltan
By returning earlier we can remove the 'can_write' boolean variable. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <15b2968fd300a12d06b42368d084f6f80d3c3be5.1610223397.git.balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [PMD: Split original patch in 5, this is part 3/5] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Reduce indentation by returning earlyBALATON Zoltan
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <15b2968fd300a12d06b42368d084f6f80d3c3be5.1610223397.git.balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [PMD: Split patch original in 5, this is part 2/5] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Remove index field of SuperIOConfigBALATON Zoltan
Remove the separate index value from SuperIOConfig and store the index at reg 0 which is reserved and returns 0 on read. This simplifies the object state. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <15b2968fd300a12d06b42368d084f6f80d3c3be5.1610223397.git.balaton@eik.bme.hu> [PMD: Split original patch in 5, this is part 1/5] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Move creation of ISA devices to the ISA bridgeBALATON Zoltan
Currently the ISA devices that are part of the VIA south bridge, superio chip are wired up by board code. Move creation of these ISA devices to the VIA ISA bridge model so that board code does not need to access ISA bus. This also allows vt82c686b-superio to be made internal to vt82c686 which allows implementing its configuration via registers in subseqent commits. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <bf9400cc8e4ddd3129aa5678de4d3cf38384805f.1610223397.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Simplify vt82c686b_realize()BALATON Zoltan
Remove unneeded variables and setting value to 0 on zero initialised data and replace check for error with error_fatal. Rationalise loop that sets PCI config header fields read only. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <e4caf35ca10a68f5c74ae3f93fa0bcfa9457beea.1610223397.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Make vt82c686b-pm an abstract base class and add vt8231-pm based on itBALATON Zoltan
The vt82c686b-pm model can be shared between VT82C686B and VT8231. The only difference between the two is the device id in what we emulate so make an abstract via-pm model by renaming appropriately and add types for vt82c686b-pm and vt8231-pm based on it. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <34969fc7be984fa070479bfb9f748993a0aef31b.1610223397.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Set user_creatable=false for VT82C686B_PMBALATON Zoltan
This device is part of the multifunction VIA superio/south bridge chip so not useful in itself. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <d0a806fed5e8055aee4fcf5b2f4790e6dd0f9dc6.1610223397.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Fix up power management io base and configBALATON Zoltan
Similar to the SMBus io registers there is a power management io range that is set via similar base address reg and enable bit. Some handling of this was already there but with several problems: using the wrong registers and bits, wrong size range, not acually updating mapping and handling reset correctly, nor emulating any of the actual io registers. Some of these errors are fixed up here. After this patch we use the correct base address register, enable bit and region size and allow guests to map/unmap this region, but we still don't emulate any of the registers in this range. PMD notes regarding the Configuration Space Power Management Registers: - 0x40 General Configuration 0 - 0x41 General Configuration 1 . Bit 7: I/O Enable for ACPI I/O Base - 0x48 Power Mgmt I/O Base . Bit 0: Always set . Bits 7-15: Power Management I/O Register Base Address (this explains the change 0xffc0 -> 0xff80) Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <cff9b2442d3e2e1cfbdcbc2dfbb559031b4b1cc1.1610223397.git.balaton@eik.bme.hu> [PMD: Split original patch, this is part 4/4, added notes] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Correctly reset all registers to default values on resetBALATON Zoltan
Reset the registers in the DeviceReset() handler which is called on each device reset, not in DeviceRealize() which is called once. Bit 0 of 'Power Mgmt I/O Base' register (offset 0x48) is always set. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <cff9b2442d3e2e1cfbdcbc2dfbb559031b4b1cc1.1610223397.git.balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [PMD: Split original patch, this is part 3/4 (move to reset), document] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Correct vt82c686-pm I/O sizeBALATON Zoltan
Section "Offset 4B-48 – Power Management I/O Base" describes: Port Address for the base of the 128-byte Power Management I/O Register block. Correct the vt82c686-pm I/O region size. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <cff9b2442d3e2e1cfbdcbc2dfbb559031b4b1cc1.1610223397.git.balaton@eik.bme.hu> [PMD: Split original patch, this is part 2/4, reduced size to 128B] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Make vt82c686-pm an I/O tracing regionBALATON Zoltan
Previously just an empty RAM region was mapped on realize, now we add an empty io range logging access instead. I think the pm timer should be hooked up here but not sure guests need it. PMON on fuloong2e sets a base address but does not seem to enable region; the pegasos2 firmware pokes some regs but continues anyway so don't know if anything would make use of these facilities. Therefore this is just a clean up of previous state for now and not intending to fully implement missing functionality which could be done later if some guests need it. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <cff9b2442d3e2e1cfbdcbc2dfbb559031b4b1cc1.1610223397.git.balaton@eik.bme.hu> [PMD: Split original patch, this is part 1/4 (make 'vt82c686-pm' an I/O tracing region)] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Fix SMBus IO base and configuration registersBALATON Zoltan
The base address of the SMBus io ports and its enabled status is set by registers in the PCI config space but this was not correctly emulated. Instead the SMBus registers were mapped on realize to the base address set by a property to the address expected by fuloong2e firmware. Fix the base and config register handling to more closely model hardware which allows to remove the property and allows the guest to control this mapping. Do all this in reset instead of realize so it's correctly updated on reset. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <f2ca2ad5f08ba8cee07afd9d67b4e75cda21db09.1610223397.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Reorganise codeBALATON Zoltan
Move lines around so that object definitions become consecutive and not scattered around. This brings functions belonging to an object together so it's clearer what is defined and what parts belong to which object. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <9f942989dba46fc1c23b881f6cb135948f818c2f.1610223397.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21vt82c686: Move superio memory region to SuperIOConfig structBALATON Zoltan
The superio memory region holds the io space index/data registers used to access the superio config registers that are implemented in struct SuperIOConfig. To keep these related things together move the memory region to SuperIOConfig and rename it accordingly. Also remove the unused "data" member of SuperIOConfig which is not needed as we store actual data values in the regs array. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <dc3c4e7632716ca73c10506bd02ee93b39c28705.1610223397.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-01-04vt82c686: Rename superio config related partsBALATON Zoltan
Use less confusing naming for superio config register handling related parts that makes it clearer what belongs to this part. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <4d30a2b4b771b2ad651509885daae79d7c4fe7a8.1609584216.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-01-04vt82c686: Use shorter name for local variable holding object stateBALATON Zoltan
Rename local variable holding object state for readability and consistency. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <69655b23df2ecebbf0aff29726f4b4746f5b74de.1609584216.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-01-04vt82c686: Remove unneeded includes and definesBALATON Zoltan
These are not used or not needed. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <35cefcc3518a3395a796bb6ad6fbc308adc65266.1609584216.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-01-04vt82c686: Convert debug printf to trace pointsBALATON Zoltan
Drop DPRINTF and use trace functions instead. Two debug messages about unimplemented registers could be converted to qemu_log_mask() but in reality all registers are currently unimplemented (we just store and return values of writable regs but do nothing with them). As we already trace register access there's no need for additional debug messages so these are just removed and a comment is added as a reminder. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <785854022a37035f66d89e70cb6ca1bc0e0d0163.1609584216.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-01-04vt82c686: Remove legacy vt82c686b_pm_init() functionBALATON Zoltan
Remove legacy vt82c686b_pm_init() function and also rename VT82C686B_PM type name to match other device names. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <a70982b32f11222d335385b90749abb6cf2e2cce.1609584216.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-01-04vt82c686: Remove legacy vt82c686b_isa_init() functionBALATON Zoltan
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <58d7585f979f154b1f1e69fdc026eed6dbc7996f.1609584216.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-01-04vt82c686: Split off via-[am]c97 into separate file in hw/audioBALATON Zoltan
The via-[am]c97 code is supposed to implement the audio part of VIA south bridge chips so it is better placed under hw/audio/. Split it off into a separate file. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <af083634e3b9efe67e6c4247cf0185d3fa7b1810.1609584216.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-01-04vt82c686: Remove vt82c686b_[am]c97_init() functionsBALATON Zoltan
These are legacy init functions that are just equivalent to directly calling pci_create_simple so do that instead. Also rename objects to lower case via-ac97 and via-mc97 matching naming of other devices. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1c4373c8aeb6c4fb2a8df2c864b0e91a977a3d7b.1609584216.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-01-04vt82c686: Rename VT82C686B to VT82C686B_ISABALATON Zoltan
This is really the ISA bridge part so name the type accordingly. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <78db2ced4b41a8a775dbc6c97a90db683952c2cb.1609584216.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-01-04vt82c686: Remove unnecessary _DEVICE suffix from type macrosBALATON Zoltan
There's no reason to suffix everything with _DEVICE when the names are already unique without it and shorter names are more readable. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <ea89683ebb3528c0f79ed99d3d3cfcefb63c3bfb.1609584216.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-01-04vt82c686: Rename AC97/MC97 parts from VT82C686B to VIABALATON Zoltan
These parts are common between VT82C686B and VT8231 so can be shared in the future. Rename them to VIA prefix accordingly. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <510ddb17836a2c2e68a27cf2dcaee420bc2efbc1.1609584215.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-09-18Use OBJECT_DECLARE_SIMPLE_TYPE when possibleEduardo Habkost
This converts existing DECLARE_INSTANCE_CHECKER usage to OBJECT_DECLARE_SIMPLE_TYPE when possible. $ ./scripts/codeconverter/converter.py -i \ --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]') Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20200916182519.415636-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-14 07:02:32 +0000