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AgeCommit message (Expand)Author
2021-12-07gicv3: fix ICH_MISR's LRENP computationDamien Hedde
2021-11-29hw/intc/arm_gicv3: fix handling of LPIs in list registersPeter Maydell
2021-11-26hw/intc/arm_gicv3: Add new gicv3_intid_is_special() functionPeter Maydell
2021-11-26hw/intc/arm_gicv3: Update cached state after LPI state changesPeter Maydell
2021-11-26hw/intc: cannot clear GICv3 ITS CTLR[Enabled] bitShashi Mallela
2021-11-22hw/intc/arm_gicv3_its: Revert version increments in vmstate_itsEric Auger
2021-11-15hw/intc/arm_gicv3: Support multiple redistributor regionsPeter Maydell
2021-11-15hw/intc/arm_gicv3: Set GICR_TYPER.Last correctly when nb_redist_regions > 1Peter Maydell
2021-11-15hw/intc/arm_gicv3: Move checking of redist-region-count to arm_gicv3_common_r...Peter Maydell
2021-11-09hw/m68k: Fix typo in SPDX tagPhilippe Mathieu-Daudé
2021-10-30hw/intc/sh_intc: Remove unneeded local variable initialisersBALATON Zoltan
2021-10-30hw/intc/sh_intc: Simplify allocating sources arrayBALATON Zoltan
2021-10-30hw/intc/sh_intc: Avoid using continue in loopsBALATON Zoltan
2021-10-30hw/intc/sh_intc: Replace abort() with g_assert_not_reached()BALATON Zoltan
2021-10-30hw/intc/sh_intc: Inline and drop sh_intc_source() functionBALATON Zoltan
2021-10-30hw/intc/sh_intc: Use array index instead of pointer arithmeticsBALATON Zoltan
2021-10-30hw/intc/sh_intc: Remove excessive parenthesisBALATON Zoltan
2021-10-30hw/intc/sh_intc: Move sh_intc_register() closer to its only userBALATON Zoltan
2021-10-30hw/intc/sh_intc: Drop another useless macroBALATON Zoltan
2021-10-30hw/intc/sh_intc: Rename iomem regionBALATON Zoltan
2021-10-30hw/intc/sh_intc: Turn some defines into an enumBALATON Zoltan
2021-10-30hw/intc/sh_intc: Use existing macro instead of local oneBALATON Zoltan
2021-10-30hw/sh4: Change debug printfs to tracesBALATON Zoltan
2021-10-30hw/sh4: Coding style: Add missing bracesBALATON Zoltan
2021-10-30hw/sh4: Coding style: White space fixesBALATON Zoltan
2021-10-30hw/sh4: Coding style: Fix multi-line commentsBALATON Zoltan
2021-10-30hw/sh4: Coding style: Remove tabsBALATON Zoltan
2021-10-22hw/intc: sifive_plic: Cleanup the irq_request functionAlistair Francis
2021-10-22hw/intc: sifive_plic: Cleanup the realize functionAlistair Francis
2021-10-22hw/intc: sifive_plic: Move the propertiesAlistair Francis
2021-10-22hw/intc: Remove the Ibex PLICAlistair Francis
2021-10-21spapr/xive: Use xive_esb_rw() to trigger interruptsCédric Le Goater
2021-10-21spapr/xive: Add source status helpersCédric Le Goater
2021-09-30Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell
2021-09-30memory: Name all the memory listenersPeter Xu
2021-09-30spapr/xive: Fix kvm_xive_source_reset trace eventCédric Le Goater
2021-09-30hw/intc: openpic: Clean up the stylesBin Meng
2021-09-30hw/intc: openpic: Drop Raven related codesBin Meng
2021-09-30hw/intc: openpic: Correct the reset value of IPIDR for FSL chipsetBin Meng
2021-09-29ppc/xive: Export xive_tctx_word2() helperCédric Le Goater
2021-09-29ppc/xive: Export priority_to_ipb() helperCédric Le Goater
2021-09-21Merge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-202...Richard Henderson
2021-09-21hw/intc: Upgrade the SiFive CLINT implementation to RISC-V ACLINTAnup Patel
2021-09-21hw/intc: Rename sifive_clint sources to riscv_aclint sourcesAnup Patel
2021-09-21hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO linesAlistair Francis
2021-09-21hw/intc: ibex_plic: Convert the PLIC to use RISC-V CPU GPIO linesAlistair Francis
2021-09-21hw/intc: sifive_clint: Use RISC-V CPU GPIO linesAlistair Francis
2021-09-20hw/intc: Set GIC maintenance interrupt level to only 0 or 1Shashi Mallela
2021-09-13hw/intc: GICv3 redistributor ITS processingShashi Mallela
2021-09-13hw/intc: GICv3 ITS Feature enablementShashi Mallela
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