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path: root/hw/intc/armv7m_nvic.c
AgeCommit message (Expand)Author
2017-09-07target/arm: Make BASEPRI register banked for v8MPeter Maydell
2017-09-07target/arm: Implement ARMv8M's PMSAv8 registersPeter Maydell
2017-09-04nvic: Implement "user accesses BusFault" SCS region behaviourPeter Maydell
2017-09-04armv7m_nvic.h: Move from include/hw/arm to include/hw/intcPeter Maydell
2017-09-04target/arm: Don't store M profile PRIMASK and FAULTMASK in daifPeter Maydell
2017-09-04hw/intc/armv7m_nvic.c: Remove out of date commentPeter Maydell
2017-07-31target/arm: Rename cp15.c6_rgnr to pmsav7.rnrPeter Maydell
2017-06-02arm: add MPU support to M profile CPUsMichael Davidsaver
2017-02-28armv7m: Split systick out from NVICPeter Maydell
2017-02-28armv7m: Make NVIC expose a memory region rather than mapping itselfPeter Maydell
2017-02-28armv7m: Move NVICState struct definition into headerPeter Maydell
2017-02-28armv7m: Allow SHCSR writes to change pending and active bitsPeter Maydell
2017-02-28armv7m: Check exception return consistencyPeter Maydell
2017-02-28armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLEMichael Davidsaver
2017-02-28armv7m: Remove unused armv7m_nvic_acknowledge_irq() return valuePeter Maydell
2017-02-28armv7m: Escalate exceptions to HardFault if necessaryMichael Davidsaver
2017-02-28armv7m: Fix condition check for taking exceptionsPeter Maydell
2017-02-28armv7m: Rewrite NVIC to not use any GIC codeMichael Davidsaver
2017-02-28armv7m: Implement reading and writing of PRIGROUPPeter Maydell
2017-02-28armv7m: Rename nvic_state to NVICStatePeter Maydell
2017-01-27armv7m: Honour CCR.USERSETMPENDMichael Davidsaver
2017-01-27armv7m: implement CCR, CFSR, HFSR, DFSR, BFAR, and MMFARMichael Davidsaver
2017-01-27armv7m_nvic: keep a pointer to the CPUMichael Davidsaver
2016-07-04armv7m_nvic: Use qemu_get_cpu(0) instead of current_cpuAndrey Smirnov
2016-05-19hw: explicitly include qemu/log.hPaolo Bonzini
2016-05-19qemu-common: push cpu.h inclusion out of qemu-common.hPaolo Bonzini
2016-03-22hw: explicitly include qemu-common.h and cpu.hPaolo Bonzini
2016-03-22include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster
2016-01-29arm: Clean up includesPeter Maydell
2015-11-03armv7-m: Implement SYSRESETREQMichael Davidsaver
2015-09-08armv7m_nvic: Implement ICSR without using internal GIC statePeter Maydell
2015-05-12hw/intc/arm_gic: Change behavior of IAR writesFabian Aggeler
2015-05-12hw/intc/arm_gic: Change behavior of EOIR writesFabian Aggeler
2015-05-12hw/intc/arm_gic: Make ICCICR/GICC_CTLR bankedFabian Aggeler
2015-05-12hw/intc/arm_gic: Make ICDDCR/GICD_CTLR bankedFabian Aggeler
2015-05-12armv7m_nvic: systick: Reload the RELOAD value and count down only if ENABLE b...Adrian Huang
2015-01-26vmstate: accept QEMUTimer in VMSTATE_TIMER*, add VMSTATE_TIMER_PTR*Paolo Bonzini
2014-10-24arm_gic: remove unused parameter.KONRAD Frederic
2014-06-19armv7m_nvic: fix AIRCR implementationOran Avraham
2014-05-13savevm: Remove all the unneeded version_minimum_id_old (arm)Juan Quintela
2014-05-05arm: Clean up fragile use of error_is_set() in realize() methodsMarkus Armbruster
2014-05-01armv7m_nvic: fix CPUID Base RegisterRabin Vincent
2013-08-22aio / timers: Switch entire codebase to the new timer APIAlex Bligh
2013-07-09cpu: Replace cpu_single_env with CPUState current_cpuAndreas Färber
2013-07-04hw/i*: pass owner to memory_region_init* functionsPaolo Bonzini
2013-07-04memory: add owner argument to initialization functionsPaolo Bonzini
2013-04-15arm: fix location of some include filesPeter Maydell
2013-04-12Typo, spelling and grammatical fixesPeter Maydell
2013-04-08hw: move private headers to hw/ subdirectories.Paolo Bonzini
2013-04-08hw: move interrupt controllers to hw/intc/, configure with default-configs/Paolo Bonzini
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