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path: root/hw/intc/armv7m_nvic.c
AgeCommit message (Expand)Author
2019-05-07hw/intc/armv7m_nvic: Don't enable ARMV7M_EXCP_DEBUG from resetPeter Maydell
2019-05-07hw/intc/armv7m_nvic: NS BFAR and BFSR are RAZ/WI if BFHFNMINS == 0Peter Maydell
2019-05-07hw/arm/armv7m_nvic: Check subpriority in nvic_recompute_state_secure()Peter Maydell
2019-04-29target/arm: New function armv7m_nvic_set_pending_lazyfp()Peter Maydell
2019-04-29target/arm: Implement v7m_update_fpccr()Peter Maydell
2019-04-29target/arm: Implement dummy versions of M-profile FP-related registersPeter Maydell
2019-04-29hw/intc/armv7m_nvic: Allow reading of M-profile MVFR* registersPeter Maydell
2019-02-15hw/intc/armv7m_nvic: Allow byte accesses to SHPR1Peter Maydell
2019-02-01armv7m: Don't assume the NVIC's CPU is CPU 0Peter Maydell
2018-10-24target/arm: Move some system registers into a substructureRichard Henderson
2018-08-20nvic: Expose NMI linePeter Maydell
2018-08-14nvic: Change NVIC to support ARMv6-MJulia Suvorova
2018-08-14arm: Add ARMv6-M programmer's model supportJulia Suvorova
2018-08-14nvic: Handle ARMv6-M SCS reserved registersJulia Suvorova
2018-07-30armv7m_nvic: Fix m-security subsection namePeter Maydell
2018-07-24target/arm: Escalate to correct HardFault when AIRCR.BFHFNMINS is setPeter Maydell
2018-07-17hw/arm/armv7: Fix crash when introspecting the "iotkit" deviceThomas Huth
2018-06-15arm: Don't crash if user tries to use a Cortex-M CPU without an NVICPeter Maydell
2018-02-15hw/intc/armv7m_nvic: Fix byte-to-interrupt number conversionsPeter Maydell
2018-02-15hw/intc/armv7m_nvic: Implement SCRPeter Maydell
2018-02-15hw/intc/armv7m_nvic: Implement cache ID registersPeter Maydell
2018-02-15hw/intc/armv7m_nvic: Implement v8M CPPWR registerPeter Maydell
2018-02-15hw/intc/armv7m_nvic: Implement M profile cache maintenance opsPeter Maydell
2018-02-15hw/intc/armv7m_nvic: Fix ICSR PENDNMISET/CLR handlingPeter Maydell
2018-02-15hw/intc/armv7m_nvic: Don't hardcode M profile ID registers in NVICPeter Maydell
2018-02-09target/arm: Split "get pending exception info" from "acknowledge it"Peter Maydell
2018-02-09target/arm: Add armv7m_nvic_set_pending_derived()Peter Maydell
2018-01-16hw/intc/armv7m: Support byte and halfword accesses to CFSRPeter Maydell
2017-12-13nvic: Make systick bankedPeter Maydell
2017-12-13nvic: Make nvic_sysreg_ns_ops work with any MemoryRegionPeter Maydell
2017-11-20nvic: Fix ARMv7M MPU_RBAR readsPeter Maydell
2017-10-12nvic: Fix miscalculation of offsets into ITNS arrayPeter Maydell
2017-10-12nvic: Add missing 'break'Peter Maydell
2017-10-06nvic: Add missing code for writing SHCSR.HARDFAULTPENDED bitPeter Maydell
2017-10-06nvic: Implement Security Attribution Unit registersPeter Maydell
2017-10-06target/arm: Add new-in-v8M SFSR and SFARPeter Maydell
2017-10-06target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler modePeter Maydell
2017-10-06nvic: Clear the vector arrays and prigroup on resetPeter Maydell
2017-09-21nvic: Support banked exceptions in acknowledge and completePeter Maydell
2017-09-21nvic: Make SHCSR banked for v8MPeter Maydell
2017-09-21nvic: Make ICSR banked for v8MPeter Maydell
2017-09-21target/arm: Handle banking in negative-execution-priority check in cpu_mmu_in...Peter Maydell
2017-09-21nvic: Handle v8M changes in nvic_exec_prio()Peter Maydell
2017-09-21nvic: Disable the non-secure HardFault if AIRCR.BFHFNMINS is clearPeter Maydell
2017-09-21nvic: Implement v8M changes to fixed priority exceptionsPeter Maydell
2017-09-21nvic: In escalation to HardFault, support HF not being priority -1Peter Maydell
2017-09-21nvic: Compare group priority for escalation to HFPeter Maydell
2017-09-21nvic: Make SHPR registers bankedPeter Maydell
2017-09-21nvic: Make set_pending and clear_pending take a secure parameterPeter Maydell
2017-09-21nvic: Handle banked exceptions in nvic_recompute_state()Peter Maydell
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