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path: root/hw/escc.c
AgeCommit message (Expand)Author
2011-08-21escc: replace DPRINTFs with tracepointsBlue Swirl
2011-08-21escc: avoid structure holes spotted by paholeBlue Swirl
2011-08-08ppc: convert to memory APIAvi Kivity
2011-01-29escc: fix interrupt flagsAurelien Jarno
2010-12-11Add endianness as io mem parameterAlexander Graf
2010-08-15sparc escc IUS improvements (SunOS 4.1.4 fix)Artyom Tarasenko
2010-02-07escc: don't use reserved _t suffixBlue Swirl
2009-11-07sparc32 (mostly): remove unneeded calls to device resetBlue Swirl
2009-10-24escc: add chipset docsBlue Swirl
2009-10-24escc: convert to VMState, vmsd and resetBlue Swirl
2009-10-07New qdev_init_nofail()Markus Armbruster
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori
2009-10-01Get rid of _t suffixmalc
2009-09-30escc: fix another coding style nitMichael S. Tsirkin
2009-09-30escc: fix coding style nitMichael S. Tsirkin
2009-09-16escc: fix IRQ routing, broken by 6c319c82223a1766c5d64a20051e5c6ab7b53951Aurelien Jarno
2009-08-27qdev: add return value to init() callbacks.Gerd Hoffmann
2009-08-25Make CPURead/WriteFunc structure 'const'Blue Swirl
2009-08-13Unbreak Sparc32 and PPCBlue Swirl
2009-08-10qdev/prop: convert escc.c to helper macros.Gerd Hoffmann
2009-07-17Sparc32: fix escc devices broken by ee6847d19be16c789b8bd4e553b7cd6701ba1245Blue Swirl
2009-07-16qdev: rework device properties.Gerd Hoffmann
2009-07-15Sparc32/PPC: convert escc to qdevBlue Swirl
2009-06-29Revert "Introduce reset notifier order"Jan Kiszka
2009-06-16Remove io_index argument from cpu_register_io_memory()Avi Kivity
2009-05-22Introduce reset notifier orderJan Kiszka
2009-05-13Replace gcc variadic macro extension with C99 versionBlue Swirl
2009-02-05hw: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori
2009-01-14escc: allow one IRQ per serial channelaurel32
2009-01-13ESCC: swap the two CharDriverState argumentsaurel32
2009-01-12Rename slavio_serial functions to escc, add clock rate and it_shift parametersblueswir1
2009-01-12Rename slavio_serial to esccblueswir1