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2017-01-20Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell
virtio, vhost, pc: fixes, features writeable fw cfg blobs which will be used for guest to host communication fixes and cleanups all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Thu 19 Jan 2017 21:08:04 GMT # gpg: using RSA key 0x281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: virtio: force VIRTIO_F_IOMMU_PLATFORM virtio: fix up max size checks vhost: drop VHOST_F_DEVICE_IOTLB update-linux-headers.sh: support __bitwise virtio_crypto: header update pci_regs: update to latest linux virtio-mmio: switch to linux headers virtio_mmio: add standard header file virtio: drop an obsolete comment fw-cfg: bump "x-file-slots" to 0x20 for 2.9+ machine types pc: Add 2.9 machine-types fw-cfg: turn FW_CFG_FILE_SLOTS into a device property fw-cfg: support writeable blobs vhost_net: device IOTLB support virtio: disable notifications again after poll succeeded Revert "virtio: turn vq->notification into a nested counter" virtio-net: enable ioeventfd even if vhost=off Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-20hw/arm/virt: Add board property to enable EL2Peter Maydell
Add a board level property to the virt board which will enable EL2 on the CPU if the user asks for it. The default is not to provide EL2. If EL2 is enabled then we will use SMC as our PSCI conduit, and report the virtualization support in the GICv3 device tree node and the ACPI tables. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1483977924-14522-19-git-send-email-peter.maydell@linaro.org
2017-01-20target-arm: Enable EL2 feature bit on A53 and A57Peter Maydell
Enable the ARM_FEATURE_EL2 bit on Cortex-A52 and Cortex-A57, since this is all now sufficiently implemented to work with the GICv3. We provide the usual CPU property to disable it for backwards compatibility with the older virt boards. In this commit, we disable the EL2 feature on the virt and ZynpMP boards, so there is no overall effect. Another commit will expose a board-level property to allow the user to enable EL2. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1483977924-14522-18-git-send-email-peter.maydell@linaro.org
2017-01-20hw/arm/virt-acpi-build: use SMC if booting in EL2Andrew Jones
Signed-off-by: Andrew Jones <drjones@redhat.com> Acked-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1483977924-14522-16-git-send-email-peter.maydell@linaro.org [PMM: look at vms->psci_conduit rather than vms->virt to decide whether to use HVC or SMC, and report no PSCI support at all for the 'PSCI disabled' case] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-20hw/arm/virt: Support using SMC for PSCIPeter Maydell
If we are giving the guest a CPU with EL2, it is likely to want to use the HVC instruction itself, for instance for providing PSCI to inner guest VMs. This makes using HVC as the PSCI conduit for the outer QEMU a bad idea. We will want to use SMC instead is this case: this makes sense because QEMU's PSCI implementation is effectively an emulation of functionality provided by EL3 firmware. Add code to support selecting the PSCI conduit to use, rather than hardcoding use of HVC. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1483977924-14522-15-git-send-email-peter.maydell@linaro.org
2017-01-20hw/arm/virt: Wire VIRQ, VFIQ, maintenance irq lines from GIC to CPUPeter Maydell
Wire the new VIRQ, VFIQ and maintenance interrupt lines from the GIC to each CPU. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1483977924-14522-5-git-send-email-peter.maydell@linaro.org
2017-01-20hw/arm/virt-acpi - reserve ECAM space as PNP0C02 deviceArd Biesheuvel
Linux for arm64 v4.10 and later will complain if the ECAM config space is not reserved in the ACPI namespace: acpi PNP0A08:00: [Firmware Bug]: ECAM area [mem 0x3f000000-0x3fffffff] not reserved in ACPI namespace The rationale is that OSes that don't consume the MCFG table should still be able to infer that the PCI config space MMIO region is occupied. So update the ACPI table generation routine to add this reservation. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 1484328738-21149-1-git-send-email-ard.biesheuvel@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-20arm: virt: Fix segmentation fault when specifying an unsupported CPUShannon Zhao
Using -cpu cortex-a9 (or any other unsupported CPU) with the virt board will cause QEMU to segmentation fault. This bug was introduced in commit 9ac4ef77, which incorrectly added a NULL terminator when converting the VirtBoardInfo array into a simple array of strings defining the valid CPUs. The cpuname_valid() loop already has a termination condition based on ARRAY_SIZE, so the NULL is spurious and causes the strcmp() to segfault if we reach it. Delete the NULL. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1484619334-10488-1-git-send-email-zhaoshenglong@huawei.com [PMM: expanded commit message] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-20aspeed: use first FMC flash as a boot ROMCédric Le Goater
Create a ROM region, using the default size of the mapping window for the CE0 FMC flash module, and fill it with the flash content. This is a little hacky but until we can boot from a MMIO region, it seems difficult to do anything else. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1483979087-32663-11-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-20arm: Uniquely name imx25 I2C buses.Alastair D'Silva
The imx25 chip provides 3 i2c buses, but they have all been named "i2c", which makes it difficult to predict which bus a device will be connected to when specified on the command line. This patch addresses the issue by naming the buses uniquely: i2c-bus.0 i2c-bus.1 i2c-bus.2 Signed-off-by: Alastair D'Silva <alastair@d-silva.org> Message-id: 20170105043430.3176-2-alastair@au1.ibm.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-18fw-cfg: support writeable blobsMichael S. Tsirkin
Useful to send guest data back to QEMU. Changes from Laszlo Ersek <lersek@redhat.com>: - rebase the patch from Michael Tsirkin's original postings at [1] and [2] to the following patches: - loader: Allow a custom AddressSpace when loading ROMs - loader: Add AddressSpace loading support to uImages - loader: fix handling of custom address spaces when adding ROM blobs - reject such writes immediately that would exceed the end of the array, rather than performing a partial write before setting the error bit: see the (len != dma.length) condition - document the write interface [1] http://lists.nongnu.org/archive/html/qemu-devel/2016-02/msg04968.html [2] http://lists.nongnu.org/archive/html/qemu-devel/2016-03/msg02735.html Cc: "Gabriel L. Somlo" <somlo@cmu.edu> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Michael Walle <michael@walle.cc> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Shannon Zhao <zhaoshenglong@huawei.com> Cc: qemu-arm@nongnu.org Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Acked-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
2017-01-09hw/arm/virt-acpi-build: Don't incorrectly claim architectural timer to be ↵Andrew Jones
edge-triggered This is the ACPI equivalent to "hw/arm/virt: Don't incorrectly claim architectural timer to be edge-triggered" which fixes the DT for machine types 2.9 and later. Signed-off-by: Andrew Jones <drjones@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-15-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: remove VirtGuestInfoAndrew Jones
by moving VirtGuestInfo.fw_cfg to VirtMachineState. This is the mach-virt equivalent of "pc: Move PcGuestInfo.fw_cfg to PCMachineState" and "pc: Eliminate PcGuestInfo struct" combined. Signed-off-by: Andrew Jones <drjones@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-14-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt-acpi-build: don't save VirtGuestInfo on AcpiBuildStateAndrew Jones
We can get to VirtMachineState without the need for saving a pointer on AcpiBuildState. This is the mach-virt equivalent to "acpi: Don't save PcGuestInfo on AcpiBuildState" Signed-off-by: Andrew Jones <drjones@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-13-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt-acpi-build: remove redundant members from VirtGuestInfoAndrew Jones
Now that we pass VirtMachineState, and guest-info is just part of that state, we can remove all the redundant members and access the VirtMachineState directly. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-12-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: pass VirtMachineState instead of VirtGuestInfoAndrew Jones
Only two functions take VirtGuestInfo parameters. Now that guest-info is part of VirtMachineState, and VirtMachineState is defined in the virt header, pass that instead. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-11-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: move VirtMachineState/Class to virt.hAndrew Jones
In preparation to share more Virt machine state than just guest-info with other mach-virt source files, move the State and Class structures to virt.h Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-10-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: remove include/hw/arm/virt-acpi-build.hAndrew Jones
include/hw/arm/virt-acpi-build.h is only used for VirtGuestInfo, which doesn't even necessarily have to be ACPI specific. Move VirtGuestInfo to include/hw/arm/virt.h, allowing us to remove include/hw/arm/virt-acpi-build.h, and to prepare for even more code motion. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-9-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: eliminate struct VirtGuestInfoStateAndrew Jones
Instead of allocating a new struct just for VirtGuestInfo and the machine_done Notifier, place them inside VirtMachineState. This is the mach-virt equivalent of "pc: Eliminate struct PcGuestInfoState" Suggested-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-8-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: use VirtMachineState.gic_versionAndrew Jones
machvirt_init may need to probe for the gic version. If so, then make sure the result is written to VirtMachineState. With the state up to date, use it instead of a local variable. This is a cleanup that prepares for VirtMachineState to be passed to functions even outside hw/arm/virt.c Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-7-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: parameter passing cleanupsAndrew Jones
Some simple cleanups made possible by "hw/arm/virt: Merge VirtBoardInfo and VirtMachineState" Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-6-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt-acpi-build: fadt: improve flag namingAndrew Jones
Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20170102200153.28864-5-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt-acpi-build: gtdt: improve flag namingAndrew Jones
Also remove all unused flags. Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20170102200153.28864-4-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt-acpi-build: name GIC CPU Interface Structure appropriatelyAndrew Jones
Also move the enabled flag definition from mach-virt code to acpi common. Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20170102200153.28864-3-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt-acpi-build: add all missing cpu_to_le'sAndrew Jones
Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20170102200153.28864-2-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: Don't incorrectly claim architectural timer to be edge-triggeredPeter Maydell
The architectural timers in ARM CPUs all have level triggered interrupts (unless you're using KVM on a host kernel before 4.4, which misimplemented them as edge-triggered). We were incorrectly describing them in the device tree as edge triggered. This can cause problems for guest kernels in 4.8 before rc6: * pre-4.8 kernels ignore the values in the DT * 4.8 before rc6 write the DT values to the GIC config registers * newer than rc6 ignore the DT and insist that the timer interrupts are level triggered regardless Fix the DT so we're describing reality. For backwards-compatibility purposes, only do this for the virt-2.9 machine onward. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com>
2017-01-09hw/arm/virt: Rename 'vbi' variables to 'vms'Peter Maydell
Rename all the variables which used to be VirtBoardInfo* and are now VirtMachineState* so their names are in line with the type being used. Apart from the removal of the line 'VirtMachineState *vbi = vms;' this commit is purely a search-and-replace of 'vbi' with 'vms'. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com>
2017-01-09hw/arm/virt: Merge VirtBoardInfo and VirtMachineStatePeter Maydell
One of the purposes of VirtBoardInfo was to hold various bits of state about the board. Now we have MachineState and the subclass VirtMachineState to do this. Fold the VirtBoardInfo into VirtMachineState rather than having some flags in one struct and some in another with no useful way to get between them. In the process we drop the code for looking up the memory map and irq map from the CPU model, because in practice we always use the same maps in all cases. For easier code review, this change removes the VirtBoardInfo type but leaves all the variables which used to be VirtBoardInfo* and are now VirtMachineState* with their now-confusing 'vbi' names. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com>
2017-01-09i2c: Allow I2C devices to NAK start eventsCorey Minyard
Add a return value to the event handler. Some I2C devices will NAK if they have no data, so allow them to do this. This required the following changes: Go through all the event handlers and change them to return int and return 0. Modify i2c_start_transfer to terminate the transaction on a NAK. Modify smbus handing to not assert if a NAK occurs on a second operation, and terminate the transaction and return -1 instead. Add some information on semantics to I2CSlaveClass. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-27hw/i2c: Add a NULL check for i2c slave init callbacksAlastair D'Silva
Add a NULL check for i2c slave init callbacks, so that we no longer need to implement empty init functions. Signed-off-by: Alastair D'Silva <alastair@d-silva.org> Message-id: 20161202054617.6749-4-alastair@au1.ibm.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: squashed in later tweak from Alistair to if() phrasing] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-27hw/arm: remove trailing whitespaceAlastair D'Silva
Remove trailing whitespace in hw/arm/pxa2xx.c Signed-off-by: Alastair D'Silva <alastair@d-silva.org> Message-id: 20161202054617.6749-3-alastair@au1.ibm.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-27aspeed/smc: set the number of flash modules for the FMC controllerCédric Le Goater
Add a new configuration field at the board level and propagate the value using the "num-cs" property of the FMC controller model. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 1480434248-27138-14-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-27aspeed: change SoC revision of the palmetto-bmc machineCédric Le Goater
The palmetto BMC machine uses a AST2400 revision A1 SoC. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1480434248-27138-11-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-27aspeed: add the definitions for the AST2400 A1 SoCCédric Le Goater
There is not much differences with the A0 revision apart from the DDR calibration. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1480434248-27138-10-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-27aspeed: add a memory region for SRAMCédric Le Goater
The size of the SRAM depends on the SoC model, so use a per-soc definition when creating the region. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1480434248-27138-9-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-27aspeed: add support for the romulus-bmc boardCédric Le Goater
The Romulus machine is an OpenPOWER system with an AST2500 SoC for the BMC and a POWER9 chip for the host. It does not make much difference for qemu a part from the fact that the FMC controller has two SPI flash module. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 1480434248-27138-8-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-27aspeed: extend the board configuration with flash modelsCédric Le Goater
Future machine will use different flash models for the FMC and the SPI controllers. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1480434248-27138-7-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-27aspeed: attach the second SPI controller object to the SoCCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1480434248-27138-6-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-27aspeed: remove cannot_destroy_with_object_finalize_yetCédric Le Goater
With commit ce5b1bbf624b ("exec: move cpu_exec_init() calls to realize functions"), we can now remove cannot_destroy_with_object_finalize_yet. Suggested-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 1480434248-27138-5-git-send-email-clg@kaod.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-27aspeed: QOMify the CPU object and attach it to the SoCCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1480434248-27138-4-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-27hw/arm/virt: add 2.9 machine typePeter Maydell
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com>
2016-12-20Move target-* CPU file into a target/ folderThomas Huth
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [cris&microblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
2016-11-30loader: fix handling of custom address spaces when adding ROM blobsLaszlo Ersek
* Commit 3e76099aacb4 ("loader: Allow a custom AddressSpace when loading ROMs") introduced the "Rom.as" field: (1) It modified the utility callers of rom_insert() to take "as" as a new parameter from *their* callers, and set "rom->as" from that parameter. The functions covered were rom_add_file() and rom_add_elf_program(). (2) It also modified rom_insert() itself, to auto-assign "&address_space_memory", in case the external caller passed -- and the utility caller forwarded -- as=NULL. Except, commit 3e76099aacb4 forgot to update the third utility caller of rom_insert(), under point (1), namely rom_add_blob(). * Later, commit 5e774eb3bd264 ("loader: Add AddressSpace loading support to uImages") added the load_uimage_as() function, and the rom_add_blob_fixed_as() function-like macro, with the necessary changes elsewhere to propagate the new "as" parameter to rom_add_blob(): load_uimage_as() load_uboot_image() rom_add_blob_fixed_as() rom_add_blob() At this point, the signature (and workings) of rom_add_blob() had been broken already, and the rom_add_blob_fixed_as() macro passed its "_as" parameter to rom_add_blob() as "callback_opaque". Given that the "fw_callback" parameter itself was set to NULL (correctly), this did no additional damage (the opaque arg would never be used), but ultimately it broke the new functionality of load_uimage_as(). * The load_uimage_as() function would be put to use in one of the later patches, commit e481a1f63c93 ("generic-loader: Add a generic loader"). * We can fix this only in a unified patch now. Append "AddressSpace *as" to the signature of rom_add_blob(), and handle the new parameter. Pass NULL from all current callers, except from rom_add_blob_fixed_as(), where "_as" has to be bumped to the proper position. * Note that rom_add_file() rejects the case when both "mr" and "as" are passed in as non-NULL. The action that this is apparently supposed to prevent is the rom->mr = mr; assignment (that's the only place where the "mr" parameter is used in rom_add_file()). In rom_add_blob() though, we have no "mr" parameter, and the actions done on the fw_cfg branch: if (fw_file_name && fw_cfg) { if (mc->rom_file_has_mr) { data = rom_set_mr(rom, OBJECT(fw_cfg), devpath); mr = rom->mr; } else { data = rom->data; } reflect those that are performed by rom_add_file() too (with mr==NULL): if (rom->fw_file && fw_cfg) { if ((!option_rom || mc->option_rom_has_mr) && mc->rom_file_has_mr) { data = rom_set_mr(rom, OBJECT(fw_cfg), devpath); } else { data = rom->data; } Hence we need no additional restrictions in rom_add_blob(). * Stable is not affected as both problematic commits appeared first in v2.8.0-rc0. Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Alistair Francis <alistair.francis@xilinx.com> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Michael Walle <michael@walle.cc> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Shannon Zhao <zhaoshenglong@huawei.com> Cc: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org Fixes: 3e76099aacb4dae0d37ebf95305369e03d1491e6 Fixes: 5e774eb3bd264c76484906f4bd0fb38e00b8090e Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-11-28arm: Create /chosen and /memory devicetree nodes if necessaryGuenter Roeck
While customary, the /chosen and /memory devicetree nodes do not have to exist. Create if necessary. Also create the /memory/device_type property if needed. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 1479346221-18474-1-git-send-email-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-11-16fw_cfg: move FW_CFG_NB_CPUS out of fw_cfg_init1()Igor Mammedov
PC will use this field in other way, so move it outside the common code so PC could set a different value, i.e. all CPUs regardless of where they are coming from (-smp X | -device cpu...). It's quick and dirty hack as it could be implemented in more generic way in MashineClass. But do it in simple way since only PC is affected so far. Later we can generalize it when another affected target gets support for -device cpu. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1479212236-183810-3-git-send-email-imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2016-10-28hw/arm/tosa: Fix reset handlingGuenter Roeck
Using the CPU reset handler for resets triggered by writing into gpio pins other than GPIO01 is not appropriate and does not work, since the reset triggered by writing into GPIO01 is configurable. Use a separate reset handler for tosa to reset the entire system and not just the CPU. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 1477597646-24111-2-git-send-email-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-28hw/arm/spitz: Fix reset handlingGuenter Roeck
Using the CPU reset handler for resets triggered by writing into gpio pins other than GPIO01 is not appropriate and does not work, since the reset triggered by writing into GPIO01 is configurable. Use a separate reset handler for spitz to reset the entire system and not just the CPU. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 1477597646-24111-1-git-send-email-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-28arm: virt: add PMU property to mach-virt machine typeWei Huang
CPU vPMU is now turned ON by default, but this feature wasn't introduced until virt-2.7 machine type. To solve this problem, this patch adds a PMU option in machine state, which is used to control CPU's vPMU status. This PMU option is not exposed to command line and is turned off in virt-2.6 machine type. Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Wei Huang <wei@redhat.com> Message-id: 1477463301-17175-3-git-send-email-wei@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-28arm: Add an option to turn on/off vPMU supportWei Huang
This patch adds a pmu=[on/off] option to enable/disable vPMU support in guest vCPU. It allows virt tools, such as libvirt, to determine the exsitence of vPMU and configure it. Note this option is only available for cortex-a57/cortex-53/ host CPUs, but unavailable on ARMv7 and other processors. Also even though "pmu=" option is available for TCG mode, setting it doesn't turn PMU on. Signed-off-by: Wei Huang <wei@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1477463301-17175-2-git-send-email-wei@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-28versatilepb: do not run if user asks for more than 256MB RAMJean-Christophe Dubois
The versatilepb physical address space layout only has a 256MB region for RAM before the devices. Without a guard on the amount of RAM requested by the user we would happily create a RAM area that overlapped with the devices, resulting in very confusing behaviour (typically a guest crash). Report the problem to the user if they try to request more RAM than the board can handle (as we do already for some other board models). Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 20161025093711.17407-1-jcd@tribudubois.net [PMM: tidied up commit message, comments. Use error_report() rather than fprintf(stderr, ...).] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>