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2016-01-21hw/arm/virt: Add always-on property to the virt board timerChristoffer Dall
The virt board has an arch timer, which is always on. Emit the "always-on" property to indicate to Linux that it can switch off the periodic timer and reduces the amount of interrupts injected into a guest. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1453204158-11412-1-git-send-email-christoffer.dall@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-21hw/arm/virt: add secure memory region and UARTPeter Maydell
Add a secure memory region to the virt board, which is the same as the nonsecure memory region except that it also has a secure-only UART in it. This is only created if the board is started with the '-machine secure=on' property. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-21hw/arm/virt: Wire up memory region to CPUs explicitlyPeter Maydell
Wire up the system memory region to the CPUs explicitly by setting the QOM property. This doesn't change anything over letting it default, but will be needed for adding a secure memory region later. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-21xlnx-ep108: Connect the SPI FlashAlistair Francis
Connect the sst25wf080 SPI flash to the EP108 board. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> [PMM: free string when finished with it] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-21xlnx-zynqmp: Connect the SPI devicesAlistair Francis
Connect the Xilinx SPI devices to the ZynqMP model. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> [ PC changes * Use QOM alias for bus connectivity on SoC level ] Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> [PMM: free the g_strdup_printf() string when finished with it] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-21ssi: Move ssi.h into a separate directoryAlistair Francis
Move the ssi.h include file into the ssi directory. While touching the code also fix the typdef lines as checkpatch complains. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-18hw/arm: Clean up includesPeter Maydell
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1449505425-32022-4-git-send-email-peter.maydell@linaro.org
2016-01-15ARM: virt: Don't generate RTC ACPI device when using UEFIShannon Zhao
When booting the VM with UEFI, UEFI takes ownership of the RTC hardware. While UEFI can use libfdt to disable the RTC device node in the DTB that it passes to the OS, it cannot modify AML. Therefore, we won't generate the RTC ACPI device at all when using UEFI. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1452867091-4023-1-git-send-email-shannon.zhao@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-15xlnx-zynqmp: Add support for high DDR memory regionsAlistair Francis
The Xilinx ZynqMP SoC and EP108 board supports three memory regions: - A 2GB region starting at 0 - A 32GB region starting at 32GB - A 256GB region starting at 768GB This patch adds support for the first two memory regions, which is automatically created based on the size specified by the QEMU memory command line argument. On hardware the physical memory region is one continuous region, it is then mapped into the three different regions by the DDRC. As we don't model the DDRC this is done at startup by QEMU. The board creates the memory region and then passes that memory region to the SoC. The SoC then maps the memory regions. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: a1e47db941d65733724a300fcd98b74fbeeaaf22.1452637205.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-13error: Strip trailing '\n' from error string arguments (again)Markus Armbruster
Commit 6daf194d, be62a2eb and 312fd5f got rid of a bunch, but they keep coming back. Tracked down with the Coccinelle semantic patch from commit 312fd5f. Cc: Fam Zheng <famz@redhat.com> Cc: Peter Crosthwaite <crosthwaitepeter@gmail.com> Cc: Bharata B Rao <bharata@linux.vnet.ibm.com> Cc: Dominik Dingel <dingel@linux.vnet.ibm.com> Cc: David Hildenbrand <dahi@linux.vnet.ibm.com> Cc: Jason J. Herne <jjherne@linux.vnet.ibm.com> Cc: Stefan Berger <stefanb@linux.vnet.ibm.com> Cc: Dr. David Alan Gilbert <dgilbert@redhat.com> Cc: Changchun Ouyang <changchun.ouyang@intel.com> Cc: zhanghailiang <zhang.zhanghailiang@huawei.com> Cc: Pavel Fedin <p.fedin@samsung.com> Signed-off-by: Markus Armbruster <armbru@pond.sub.org> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> Acked-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Acked-by: Fam Zheng <famz@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <1450452927-8346-17-git-send-email-armbru@redhat.com>
2016-01-13error: Use error_reportf_err() where it makes obvious senseMarkus Armbruster
Done with this Coccinelle semantic patch @@ expression FMT, E, S; expression list ARGS; @@ - error_report(FMT, ARGS, error_get_pretty(E)); + error_reportf_err(E, FMT/*@@@*/, ARGS); ( - error_free(E); | exit(S); | abort(); ) followed by a replace of '%s"/*@@@*/' by '"' and some line rewrapping, because I can't figure out how to make Coccinelle transform strings. We now use the error whole instead of just its message obtained with error_get_pretty(). This avoids suppressing its hint (see commit 50b7b00), but I can't see how the errors touched in this commit could come with hints. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1450452927-8346-12-git-send-email-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2016-01-13error: Use error_report_err() where appropriate (again)Markus Armbruster
Same Coccinelle semantic patch as in commit 565f65d. We now use the original error whole instead of just its message obtained with error_get_pretty(). This avoids suppressing its hint (see commit 50b7b00), but I don't think the errors touched in this commit can come with hints. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <1450452927-8346-3-git-send-email-armbru@redhat.com>
2016-01-13hw/arm/virt: Fix property "gic-version" error handlingMarkus Armbruster
virt_set_gic_version() calls exit(1) when passed an invalid property value. Property setters are not supposed to do that. Screwed up in commit b92ad39. Harmless, because the property belongs to a machine. Set an error object instead. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.org Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-13hw: Don't use hw_error() for machine initialization errorsMarkus Armbruster
Printing CPU registers is not helpful during machine initialization. Moreover, these are straightforward configuration or "can get resources" errors, so dumping core isn't appropriate either. Replace hw_error() by error_report(); exit(1). Matches how we report these errors in other machine initializations. Cc: Richard Henderson <rth@twiddle.net> Cc: qemu-arm@nongnu.org Cc: qemu-ppc@nongnu.org Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Markus Armbruster <armbru@pond.sub.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <1450370121-5768-2-git-send-email-armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-01-13hw: Inline the qdev_prop_set_drive_nofail() wrapperMarkus Armbruster
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1449764955-10741-3-git-send-email-armbru@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-13Use error_fatal to simplify obvious fatal errorsMarkus Armbruster
Done with this Coccinelle semantic patch: @@ type T; identifier FUN, RET; expression list ARGS; expression ERR, EC; @@ ( - T RET = FUN(ARGS, &ERR); + T RET = FUN(ARGS, &error_fatal); | - RET = FUN(ARGS, &ERR); + RET = FUN(ARGS, &error_fatal); | - FUN(ARGS, &ERR); + FUN(ARGS, &error_fatal); ) - if (ERR != NULL) { - error_report_err(ERR); - exit(EC); - } This is actually a more elegant version of my initial semantic patch by courtesy of Eduardo. It leaves dead Error * variables behind, cleaned up manually. Cc: qemu-arm@nongnu.org Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
2016-01-11hw/arm/virt: Support legacy -nic command line syntaxAshok Kumar
Support the legacy -nic syntax for creating PCI network devices as well as the new-style -device options. This makes life easier for people moving from x86 KVM virtualization to ARM KVM virtualization and expecting their network configuration options to work the same way for both setups. We use "virtio" as the default NIC model if the user doesn't specify one. Signed-off-by: Ashok Kumar <ashoks@broadcom.com> Message-id: 1452091659-17698-1-git-send-email-ashoks@broadcom.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: expanded and clarified commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-22acpi: extend aml_and() to accept target argumentIgor Mammedov
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-12-22acpi: extend aml_or() to accept target argumentIgor Mammedov
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
2015-12-22acpi: support specified oem table id for build_headerXiao Guangrong
Let build_header() support specified OEM table id so that we can build multiple SSDT later If the oem table id is not specified (aka, NULL), we use the default id instead as the previous behavior Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-12-17i.MX: Add an i.MX25 specific CCM class/instanceJean-Christophe Dubois
With this CCM, i.MX25 timer is accurate with "real world time". Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 2c0cf90be767bfc8520661eca891ab22c61f18fe.1449528242.git.jcd@tribudubois.net Reviewed-by Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17i.MX: Split the CCM class into an abstract base class and a concrete classJean-Christophe Dubois
The IMX_CCM class is now the base abstract class that is used by EPIT and GPT timer implementation. IMX31_CCM class is the concrete class implementing CCM for i.MX31 SOC. For now the i.MX25 continues to use the i.MX31 CCM implementation. An i.MX25 specific CCM will be introduced in a later patch. We also rework initialization to stop using deprecated sysbus device init. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: fd3c7f87b50f5ebc99ec91f01413db35017f116d.1449528242.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17ARM: Virt: Add gpio-keys node for Poweroff using DTShannon Zhao
Add a gpio-keys node. This is used for Poweroff for the systems which use DT not ACPI. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Wei Huang <wei@redhat.com> Message-id: 1449804086-3464-11-git-send-email-zhaoshenglong@huawei.com [PMM: use "standard-headers/linux/input.h" rather than <linux/input.h>] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17ARM: Virt: Add QEMU powerdown notifier and hook it to GPIO Pin 3Shannon Zhao
Currently mach-virt model doesn't support powerdown request. Guest VM doesn't react to system_powerdown from monitor console (or QMP) because there is no communication mechanism for such requests. This patch registers GPIO Pin 3 with powerdown notification. So guest VM can receive notification when such powerdown request is triggered. Signed-off-by: Wei Huang <wei@redhat.com> Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Wei Huang <wei@redhat.com> Tested-by: Wei Huang <wei@redhat.com> Message-id: 1449804086-3464-10-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17ARM: ACPI: Add _E03 for Power ButtonShannon Zhao
Here GPIO pin 3 is used for Power Button, add _E03 in ACPI DSDT table. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Wei Huang <wei@redhat.com> Message-id: 1449804086-3464-9-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17ARM: ACPI: Add power button device in ACPI DSDT tableShannon Zhao
Add power button device in ACPI DSDT table. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Wei Huang <wei@redhat.com> Tested-by: Wei Huang <wei@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 1449804086-3464-6-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17ARM: ACPI: Add GPIO controller in ACPI DSDT tableShannon Zhao
Add GPIO controller in ACPI DSDT table. It can be used for gpio event. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Wei Huang <wei@redhat.com> Message-id: 1449804086-3464-5-git-send-email-zhaoshenglong@huawei.com Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17ARM: Virt: Add a GPIO controllerShannon Zhao
ACPI 5.0 supports GPIO-signaled ACPI Events. This can be used for powerdown, hotplug evnets. Add a GPIO controller in machine virt, to support powerdown, maybe can be used for cpu hotplug. And here we use pl061. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Wei Huang <wei@redhat.com> Tested-by: Wei Huang <wei@redhat.com> Message-id: 1449804086-3464-4-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17acpi: extend aml_interrupt() to support multiple irqsIgor Mammedov
ASL Interrupt() macro translates to Extended Interrupt Descriptor which supports variable number of IRQs. It will be used for conversion of ASL code for pc/q35 machines that use it for returning several IRQs in _PSR object. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1449804086-3464-3-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17acpi: support serialized methodXiao Guangrong
Add serialized method support so that explicit Mutex can be avoided Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1449804086-3464-2-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-15fw_cfg: remove offset argument from callback prototypeGabriel L. Somlo
Read callbacks are now only invoked at item selection, before any data is read. As such, the value of the offset argument passed to the callback will always be 0. Also, the two callback instances currently in use both leave their offset argument unused. This patch removes the offset argument from the fw_cfg read callback prototype, and from the currently available instances. The unused (write) callback prototype is also removed (write support was removed earlier, in commit 023e3148). Cc: Laszlo Ersek <lersek@redhat.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Marc Marí <markmb@redhat.com> Signed-off-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-id: 1446733972-1602-4-git-send-email-somlo@cmu.edu Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-11-24xlnx-ep108: Fix minimum RAM checkAlistair Francis
The minimum RAM check logic for the Xiilnx EP108 was off by one, which caused a false positive. Correct the logic to only print warnings when the RAM is below 0x8000000. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: fba8112ca7b01efd72553332b8045ecf107b7662.1448021100.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-12hw/misc: Add support for ADC controller in Xilinx Zynq 7000Guenter Roeck
Add support for the Xilinx XADC core used in Zynq 7000. References: - Zynq-7000 All Programmable SoC Technical Reference Manual - 7 Series FPGAs and Zynq-7000 All Programmable SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter Tested with Linux using QEMU machine xilinx-zynq-a9 with devicetree files zynq-zc702.dtb and zynq-zc706.dtb, and kernel configuration multi_v7_defconfig. Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> [ PC changes: * Changed macro names to match TRM where possible * Made programmers model macro scheme consistent * Dropped XADC_ZYNQ_ prefix on local macros * Fix ALM field width * Update threshold-comparison interrupts in _update_ints() * factored out DFIFO pushes into helper. Renamed to "push/pop" * Changed xadc_reg to 10 bits and added OOB check. * Reduced scope of MCTL reset to just stop channel coms. * Added dummy read data to write commands * Changed _ to - seperators in string names and filenames * Dropped ------------ in header comment * Catchall'ed _update_ints() in _write handler. * Minor whitespace changes. * Use ZYNQ_XADC_FIFO_DEPTH instead of ARRAY_SIZE() ] Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-10hw/arm/virt: error_report cleanupsAndrew Jones
Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-id: 1446909925-12201-1-git-send-email-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-10arm: highbank: Implement PSCI and dummy monitorPeter Crosthwaite
Firstly, enable monitor mode and PSCI, both of which are features of this board. In addition to PSCI, this board also uses SMC for cache maintenance ops. This means we need a secure monitor to catch these and nop them. Use the ARM boot board-setup feature to implement this. The SMC trap implements the needed nop while all other traps will pen the CPU. As a KVM CPU cannot run in secure mode, do not do the board-setup if not running TCG. Report a warning explaining the limitation in this case. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 0fd0d12f0fa666c86616c89447861a70dbe27312.1447007690.git.crosthwaite.peter@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-10arm: highbank: Defeature CPU overridePeter Crosthwaite
This board should not support CPU model override. This allows for easier patching of the board with being able to rely on the CPU type being correct. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 471a61e049c7ca6e82f5ef6668889a1d518c7e00.1447007690.git.crosthwaite.peter@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-10arm: boot: Add secure_board_setup flagPeter Crosthwaite
Add a flag that when set, will cause the primary CPU to start in secure mode, even if the overall boot is non-secure. This is useful for when there is a board-setup blob that needs to run from secure mode, but device and secondary CPU init should still be done as-normal for a non- secure boot. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: d1170774d5446d715fced7739edfc61a5be931f9.1447007690.git.crosthwaite.peter@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-06arm: allwinner-a10: Add SATAPeter Crosthwaite
Add the Allwinner A10 AHCI controller module to the SoC. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: John Snow <jsnow@redhat.com> Message-id: 69d6962f2d14a218bd07e9ac4ccd1947737cc30f.1445917756.git.crosthwaite.peter@gmail.com Signed-off-by: John Snow <jsnow@redhat.com>
2015-11-05Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
* Guest ABI fixes for PC machines (hw_version) * Fixes for recent Perl * John Snow's configure fixes * file-backed RAM improvements (Igor, Pavel) * -Werror=clobbered fixes (Stefan) * Kill -d ioport * Fix qemu-system-s390x * Performance improvement for kvmclock migration # gpg: Signature made Thu 05 Nov 2015 13:42:27 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" * remotes/bonzini/tags/for-upstream: iscsi: Translate scsi sense into error code Revert "Introduce cpu_clean_all_dirty" kvmclock: add a new function to update env->tsc. configure: disable FORTIFY_SOURCE under clang backends/hostmem-file: Allow to specify full pathname for backing file configure: disallow ccache during compile tests cpu-exec: Fix compiler warning (-Werror=clobbered) memory: call begin, log_start and commit when registering a new listener megasas: Use qemu_hw_version() instead of QEMU_VERSION osdep: Rename qemu_{get, set}_version() to qemu_{, set_}hw_version() pc: Set hw_version on all machine classes qemu-log: remove -d ioport ioport: do not use CPU_LOG_IOPORT target-i386: fix pcmpxstrx equal-ordered (strstr) mode scripts/text2pod.pl: Escape left brace file_ram_alloc: propagate error to caller instead of terminating QEMU Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-04osdep: Rename qemu_{get, set}_version() to qemu_{, set_}hw_version()Eduardo Habkost
This makes the purpose of the function clearer: it is not about the version of QEMU that's running, but the version string exposed in the emulated hardware. Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: John Snow <jsnow@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <1446233769-7892-3-git-send-email-ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-11-03ARM: ACPI: Fix MPIDR value in ACPI tableShannon Zhao
Use mp_affinity of ARMCPU as the CPU MPIDR instead of the CPU index. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1446285001-7316-1-git-send-email-zhaoshenglong@huawei.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-03hw/arm/virt-acpi-build: Add GICC ACPI subtable for GICv3Shannon Zhao
When booting VM with GICv3, the kernel needs GICC ACPI subtable to initialize the CPUs, e.g. MPIDR information. This adds GICC ACPI subtable for GICv3, but set GICC base address only when gic_version == 2 since it donesn't need GICC base address for GICv3. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1446131773-5018-1-git-send-email-shannon.zhao@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-03hw/arm/virt-acpi-build: _CCA attribute is compulsoryGraeme Gregory
According to ACPI specification 6.2.17 _CCA (Cache Coherency Attribute) this attribute is compulsory on ARM systems. Add this attribute to the PCI host bridges as required. Without this the kernel will produce the error [Firmware Bug]: PCI device 0000:00:00.0 fail to setup DMA. Signed-off-by: Graeme Gregory <graeme.gregory@linaro.org> Message-id: 1446460786-13663-1-git-send-email-graeme.gregory@linaro.org Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-03arm: stellaris: exit on external reset requestMichael Davidsaver
Add GPIO in for the stellaris board which calls qemu_system_reset_request() on reset request. Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-03armv7-m: Return DeviceState* from armv7m_init()Michael Davidsaver
Change armv7m_init to return the DeviceState* for the NVIC. This allows access to all GPIO blocks, not just the IRQ inputs. Move qdev_get_gpio_in() calls out of armv7m_init() into board code for stellaris and stm32f205 boards. Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-03arm: xilinx_zynq: Add linux pre-bootPeter Crosthwaite
Add a Linux-specific pre-boot routine that matches the device- specific bootloaders behaviour. This is needed for modern Linux that expects the ARM PLL in SLCR to be a more even value (not 26). Cc: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 9a9025ea65572586b50dca4e5819032e3c436d64.1446182614.git.crosthwaite.peter@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-03arm: boot: Add board specific setup code APIPeter Crosthwaite
Add an API for boards to inject their own preboot software (or firmware) sequence. The software then returns to the bootloader via the link register. This allows boards to do their own little bits of firmware setup without needed to replace the bootloader completely (which is the requirement for existing firmware support). The blob is loaded by a callback if and only if doing a linux boot (similar to the existing write_secondary support). Rewrite the comment for the primary boot blob. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 070295644c6ac84696d743913296e8cfefb48c15.1446182614.git.crosthwaite.peter@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-03arm: boot: Adjust indentation of FIXUP commentsPeter Crosthwaite
These comments start immediately after the current longest name in the list. Tab them out to the next tab stop to give a little breathing room and prepare for FIXUP_BOARD_SETUP which will require more indent. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: b9b9bb8f1c307c1ef8a3f26ff1f34fabb34b332e.1446182614.git.crosthwaite.peter@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-10-29target-arm: xlnx-zynqmp: Add sdhci support.Sai Pavan Boddu
Add two SYSBUS_SDHCI devices for xlnx-zynqmp Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2015-10-27hw/arm/virt: don't use a15memmap directlyAndrew Jones
We should always go through VirtBoardInfo when we need the memmap. To avoid using a15memmap directly, in this case, we need to defer the max-cpus check from class init time to instance init time. In class init we now use MAX_CPUMASK_BITS for max_cpus initialization, which is the maximum QEMU supports, and also, incidentally, the maximum KVM/gicv3 currently supports. Also, a nice side-effect of delaying the max-cpus check is that we now get more appropriate error messages for gicv2 machines that try to configure more than 123 cpus. Before this patch it would complain that the requested number of cpus was greater than 123, but for gicv2 configs, it should complain that the number is greater than 8. Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 1445189728-860-3-git-send-email-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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