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2018-03-23mach-virt: Set VM's SMBIOS system version to mc->nameWei Huang
Instead of using "1.0" as the system version of SMBIOS, we should use mc->name for mach-virt machine type to be consistent other architectures. With this patch, "dmidecode -t 1" (e.g., "-M virt-2.12,accel=kvm") will show: Handle 0x0100, DMI type 1, 27 bytes System Information Manufacturer: QEMU Product Name: KVM Virtual Machine Version: virt-2.12 Serial Number: Not Specified ... instead of: Handle 0x0100, DMI type 1, 27 bytes System Information Manufacturer: QEMU Product Name: KVM Virtual Machine Version: 1.0 Serial Number: Not Specified ... For backward compatibility, we allow older machine types to keep "1.0" as the default system version. Signed-off-by: Wei Huang <wei@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 20180322212318.7182-1-wei@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-09hw/arm/virt: Support -machine gic-version=maxPeter Maydell
Add support for passing 'max' to -machine gic-version. By analogy with the -cpu max option, this picks the "best available" GIC version whether you're using KVM or TCG, so it behaves like 'host' when using KVM, and gives you GICv3 when using TCG. Also like '-cpu host', using -machine gic-version=max' means there is no guarantee of migration compatibility between QEMU versions; in future 'max' might mean '4'. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180308130626.12393-7-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2018-03-09hw/arm/virt: Add "max" to the list of CPU types "virt" supportsPeter Maydell
Allow the virt board to support '-cpu max' in the same way it already handles '-cpu host'. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180308130626.12393-6-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-02-09hw/arm: Move virt's PSCI DT fixup code to arm/boot.cAndrey Smirnov
Move virt's PSCI DT fixup code to arm/boot.c and set this fixup to happen automatically for every board that doesn't mark "psci-conduit" as disabled. This way emulated boards other than "virt" that rely on PSIC for SMP could benefit from that code. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Jason Wang <jasowang@redhat.com> Cc: Philippe Mathieu-Daudé <f4bug@amsat.org> Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Cc: yurovsky@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-25hw/arm/virt: Check that the CPU realize method succeededPeter Maydell
We were passing a NULL error pointer to the object_property_set_bool() call that realizes the CPU object. This meant that we wouldn't detect failure, and would plough blindly on to crash later trying to use a NULL CPU object pointer. Detect errors and fail instead. In particular, this will be necessary to detect the user error of using "-cpu host" without "-enable-kvm" once we make the host CPU type be registered unconditionally rather than only in kvm_arch_init(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-19possible_cpus: add CPUArchId::type fieldIgor Mammedov
Remove dependency of possible_cpus on 1st CPU instance, which decouples configuration data from CPU instances that are created using that data. Also later it would be used for enabling early cpu to numa node configuration at runtime qmp_query_hotpluggable_cpus() should provide a list of available cpu slots at early stage, before machine_init() is called and the 1st cpu is created, so that mgmt might be able to call it and use output to set numa mapping. Use MachineClass::possible_cpu_arch_ids() callback to set cpu type info, along with the rest of possible cpu properties, to let machine define which cpu type* will be used. * for SPAPR it will be a spapr core type and for ARM/s390x/x86 a respective descendant of CPUClass. Move parse_numa_opts() in vl.c after cpu_model is parsed into cpu_type so that possible_cpu_arch_ids() would know which cpu_type to use during layout initialization. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <1515597770-268979-1-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-01-19hw/arm/virt: Allow only supported dynamic sysbus devicesEduardo Habkost
Replace the TYPE_SYS_BUS_DEVICE entry in the allowed sysbus device list with the two device types that are really supported by the virt machine: vfio-amd-xgbe and vfio-calxeda-xgmac. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.org Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20171125151610.20547-3-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-01-19machine: Replace has_dynamic_sysbus with list of allowed devicesEduardo Habkost
The existing has_dynamic_sysbus flag makes the machine accept every user-creatable sysbus device type on the command-line. Replace it with a list of allowed device types, so machines can easily accept some sysbus devices while rejecting others. To keep exactly the same behavior as before, the existing has_dynamic_sysbus=true assignments are replaced with a TYPE_SYS_BUS_DEVICE entry on the allowed list. Other patches will replace the TYPE_SYS_BUS_DEVICE entries with more specific lists of devices. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Alexander Graf <agraf@suse.de> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Stefano Stabellini <sstabellini@kernel.org> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: qemu-arm@nongnu.org Cc: qemu-ppc@nongnu.org Cc: xen-devel@lists.xenproject.org Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20171125151610.20547-2-ehabkost@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-01-16hw/arm/virt: Add virt-2.12 machine typePeter Maydell
Add virt-2.12 machine type. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-11-24hw/arm/virt: Add 2.11 machine typeEric Auger
Add virt-2.11 machine type. Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 1511516626-21178-1-git-send-email-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-19numa: cpu: calculate/set default node-ids after all -numa CLI options are parsedIgor Mammedov
Calculating default node-ids for CPUs in possible_cpu_arch_ids() is rather fragile since defaults calculation uses nb_numa_nodes but callback might be potentially called early before all -numa CLI options are parsed, which would lead to cpus assigned only upto nb_numa_nodes at the time possible_cpu_arch_ids() is called. Issue was introduced by (7c88e65 numa: mirror cpu to node mapping in MachineState::possible_cpus) and for example CLI: -smp 4 -numa node,cpus=0 -numa node would set props.node-id in possible_cpus array for every non explicitly mapped CPU to the first node. Issue is not visible to guest nor to mgmt interface due to 1) implictly mapped cpus are forced to the first node in case of partial mapping 2) in case of default mapping possible_cpu_arch_ids() is called after all -numa options are parsed (resulting in correct mapping). However it's fragile to rely on late execution of possible_cpu_arch_ids(), therefore add machine specific callback that returns node-id for CPU and use it to calculate/ set defaults at machine_numa_finish_init() time when all -numa options are parsed. Reported-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1496314408-163972-1-git-send-email-imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-19arm: drop intermediate cpu_model -> cpu type parsing and use cpu type directlyIgor Mammedov
there are 2 use cases to deal with: 1: fixed CPU models per board/soc 2: boards with user configurable cpu_model and fallback to default cpu_model if user hasn't specified one explicitly For the 1st drop intermediate cpu_model parsing and use const cpu type directly, which replaces: typename = object_class_get_name( cpu_class_by_name(TYPE_ARM_CPU, cpu_model)) object_new(typename) with object_new(FOO_CPU_TYPE_NAME) or cpu_generic_init(BASE_CPU_TYPE, "my cpu model") with cpu_create(FOO_CPU_TYPE_NAME) as result 1st use case doesn't have to invoke not necessary translation and not needed code is removed. For the 2nd 1: set default cpu type with MachineClass::default_cpu_type and 2: use generic cpu_model parsing that done before machine_init() is run and: 2.1: drop custom cpu_model parsing where pattern is: typename = object_class_get_name( cpu_class_by_name(TYPE_ARM_CPU, cpu_model)) [parse_features(typename, cpu_model, &err) ] 2.2: or replace cpu_generic_init() which does what 2.1 does + create_cpu(typename) with just create_cpu(machine->cpu_type) as result cpu_name -> cpu_type translation is done using generic machine code one including parsing optional features if supported/present (removes a bunch of duplicated cpu_model parsing code) and default cpu type is defined in an uniform way within machine_class_init callbacks instead of adhoc places in boadr's machine_init code. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <1505318697-77161-6-git-send-email-imammedo@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-14hw/arm/virt: Set INTx/gsi mappingPranavkumar Sawargaonkar
Let's provide the GPEX host bridge with the INTx/gsi mapping. This is needed for INTx/gsi routing. Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Tushar Jagad <tushar.jagad@linaro.org> Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Tested-by: Feng Kan <fkan@apm.com> Message-id: 1505296004-6798-3-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-04target/arm/kvm: pmu: improve error handlingAndrew Jones
If a KVM PMU init or set-irq attr call fails we just silently stop the PMU DT node generation. The only way they could fail, though, is if the attr's respective KVM has-attr call fails. But that should never happen if KVM advertises the PMU capability, because both attrs have been available since the capability was introduced. Let's just abort if this should-never-happen stuff does happen, because, if it does, then something is obviously horribly wrong. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Christoffer Dall <cdall@linaro.org> Message-id: 1500471597-2517-5-git-send-email-drjones@redhat.com [PMM: change kvm32.c kvm_arm_pmu_init() to the new API too] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-04hw/arm/virt: allow pmu instantiation with userspace irqchipAndrew Jones
Move the in-kernel-irqchip test to only guard the set-irq stage, not the init stage of the PMU. Also add the PMU to the KVM device irq line synchronization to enable its use. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Christoffer Dall <cdall@linaro.org> Message-id: 1500471597-2517-4-git-send-email-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-04target/arm/kvm: pmu: split init and set-irq stagesAndrew Jones
When adding a PMU with a userspace irqchip we skip the set-irq stage of device creation. Split the 'create' function into two functions 'init' and 'set-irq' so they may be called separately. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Christoffer Dall <cdall@linaro.org> Message-id: 1500471597-2517-3-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-04hw/arm/virt: add pmu interrupt stateAndrew Jones
Mimicking gicv3-maintenance-interrupt, add the PMU's interrupt to CPU state. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1500471597-2517-2-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-08-07hw/arm/virt: Add 2.10 machine typeEric Auger
Add virt-2.10 machine type. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1502106581-11714-1-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-14hw: Use new memory_region_init_{ram, rom, rom_device}() functionsPeter Maydell
Use the new functions memory_region_init_{ram,rom,rom_device}() instead of manually calling the _nomigrate() version and then vmstate_register_ram_global(). Patch automatically created using coccinelle script: spatch --in-place -sp_file scripts/coccinelle/memory-region-init-ram.cocci -dir hw (As it turns out, there are no instances of the rom and rom_device functions that are caught by this script.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1499438577-7674-8-git-send-email-peter.maydell@linaro.org
2017-07-14memory: Rename memory_region_init_ram() to memory_region_init_ram_nomigrate()Peter Maydell
Rename memory_region_init_ram() to memory_region_init_ram_nomigrate(). This leaves the way clear for us to provide a memory_region_init_ram() which does handle migration. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1499438577-7674-4-git-send-email-peter.maydell@linaro.org
2017-06-05numa: consolidate cpu_preplug fixups/checks for pc/arm/spaprIgor Mammedov
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <1496161442-96665-2-git-send-email-imammedo@redhat.com> [ehabkost: Fix indentation] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-06-02hw/arm/virt: fdt: generate distance-map when neededAndrew Jones
This is based on patch Shannon Zhao originally posted. Cc: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 20170529173751.3443-3-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-05-11virt-arm: get numa node mapping from possible_cpus instead of ↵Igor Mammedov
numa_get_node_for_cpu() Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-Id: <1494415802-227633-11-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-05-11virt-arm: add node-id property to CPUIgor Mammedov
it will allow switching from cpu_index to property based numa mapping in follow up patches. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-Id: <1494415802-227633-5-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-05-11numa: move source of default CPUs to NUMA node mapping into boardsIgor Mammedov
Originally CPU threads were by default assigned in round-robin fashion. However it was causing issues in guest since CPU threads from the same socket/core could be placed on different NUMA nodes. Commit fb43b73b (pc: fix default VCPU to NUMA node mapping) fixed it by grouping threads within a socket on the same node introducing cpu_index_to_socket_id() callback and commit 20bb648d (spapr: Fix default NUMA node allocation for threads) reused callback to fix similar issues for SPAPR machine even though socket doesn't make much sense there. As result QEMU ended up having 3 default distribution rules used by 3 targets /virt-arm, spapr, pc/. In effort of moving NUMA mapping for CPUs into possible_cpus, generalize default mapping in numa.c by making boards decide on default mapping and let them explicitly tell generic numa code to which node a CPU thread belongs to by replacing cpu_index_to_socket_id() with @cpu_index_to_instance_props() which provides default node_id assigned by board to specified cpu_index. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <1494415802-227633-2-git-send-email-imammedo@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-05-11hw/arm/virt: explicitly allocate cpu_index for cpusIgor Mammedov
Currently cpu_index is implicitly auto assigned during cpu.realize() time cpu_exec_realizefn()->cpu_list_add(). It happens to match index in possible_cpus so take control over it and make board initialize cpu_index to possible_cpus index explicitly. It will at least document that board is in control of it and when '-device cpu' support comes it will keep cpu_index stable regardless of order cpus are created so it won't break migration. Within this series it will be used for internal conversion from storing cpu_index based NUMA node bitmaps to property based mapping with possible_cpus, And will allow map cpu_index to a CPU entry in possible_cpus array. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-Id: <1493816238-33120-5-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-05-11hw/arm/virt: use machine->possible_cpus for storing possible topology infoIgor Mammedov
for now precalculate and store mp_afinity in possible_cpus as ARM cpus don't have socket/core/thread-id properties yet. In follow patches possible_cpus will be used for storing and setting NUMA node mapping and replace legacy bitmap based numa_info[node_id].node_cpu/numa_get_node_for_cpu() For the lack of better idea, this patch cannibalizes possible_cpus.cpus[x].props.thread_id so that *_cpu_index_to_props() callback could return addressable by props CPU which will be used by machine_set_cpu_numa_node() in follow up patches to assign a CPU to node. But cannibalizing is fine for now as that thread_id isn't exposed to users (no hotpluggable_cpus callback support for ARM yet) and it will be used only internally until 'device_add cpu' is supported where we can decide on which properties to use. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1493816238-33120-4-git-send-email-imammedo@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-05-11hw/arm/virt: extract mp-affinity calculation in separate functionIgor Mammedov
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1493816238-33120-3-git-send-email-imammedo@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-02-28hw/arm/virt: Add a user option to disallow ITS instantiationEric Auger
In 2.9 ITS will block save/restore and migration use cases. As such, let's introduce a user option that allows to turn its instantiation off, along with GICv3. With the "its" option turned false, migration will be possible, obviously at the expense of MSI support (with GICv3). Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 1487681108-14452-1-git-send-email-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-28hw/arm/virt: fix cpu object reference leakIgor Mammedov
object_new(FOO) returns an object with ref_cnt == 1 and following object_property_set_bool(cpuobj, true, "realized", NULL) set parent of cpuobj to '/machine/unattached' which makes ref_cnt == 2. Since machvirt_init() doesn't take ownership of cpuobj returned by object_new() it should explicitly drop reference to cpuobj when dangling pointer is about to go out of scope like it's done pc_new_cpu() to avoid object leak. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-id: 1487253461-269218-1-git-send-email-imammedo@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-10hw/arm/virt: Declare fwcfg as dma cache coherent in dtAlexander Graf
Fw-cfg recently learned how to directly access guest memory and does so in cache coherent fashion. Tell the guest about that fact when it's using DT. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1486644810-33181-5-git-send-email-agraf@suse.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-10target-arm: Declare virtio-mmio as dma-coherent in dtAlexander Graf
QEMU emulated hardware is always dma coherent with its guest. We do annotate that correctly on the PCI host controller, but left out virtio-mmio. Recent kernels have started to interpret that flag rather than take dma coherency as granted with virtio-mmio. While that is considered a kernel bug, as it breaks previously working systems, it showed that our dt description is incomplete. This patch adds the respective marker that allows guest OSs to evaluate that our virtio-mmio devices are indeed cache coherent. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 1486644810-33181-2-git-send-email-agraf@suse.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-10target-arm: Enable vPMU support under TCG modeWei Huang
This patch contains several fixes to enable vPMU under TCG mode. It first removes the checking of kvm_enabled() while unsetting ARM_FEATURE_PMU. With it, the .pmu option can be used to turn on/off vPMU under TCG mode. Secondly the PMU node of DT table is now created under TCG. The last fix is to disable the masking of PMUver field of ID_AA64DFR0_EL1. Signed-off-by: Wei Huang <wei@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1486504171-26807-5-git-send-email-wei@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-27char: rename CharDriverState ChardevMarc-André Lureau
Pick a uniform chardev type name. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-01-20hw/arm/virt: Add board property to enable EL2Peter Maydell
Add a board level property to the virt board which will enable EL2 on the CPU if the user asks for it. The default is not to provide EL2. If EL2 is enabled then we will use SMC as our PSCI conduit, and report the virtualization support in the GICv3 device tree node and the ACPI tables. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1483977924-14522-19-git-send-email-peter.maydell@linaro.org
2017-01-20target-arm: Enable EL2 feature bit on A53 and A57Peter Maydell
Enable the ARM_FEATURE_EL2 bit on Cortex-A52 and Cortex-A57, since this is all now sufficiently implemented to work with the GICv3. We provide the usual CPU property to disable it for backwards compatibility with the older virt boards. In this commit, we disable the EL2 feature on the virt and ZynpMP boards, so there is no overall effect. Another commit will expose a board-level property to allow the user to enable EL2. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1483977924-14522-18-git-send-email-peter.maydell@linaro.org
2017-01-20hw/arm/virt: Support using SMC for PSCIPeter Maydell
If we are giving the guest a CPU with EL2, it is likely to want to use the HVC instruction itself, for instance for providing PSCI to inner guest VMs. This makes using HVC as the PSCI conduit for the outer QEMU a bad idea. We will want to use SMC instead is this case: this makes sense because QEMU's PSCI implementation is effectively an emulation of functionality provided by EL3 firmware. Add code to support selecting the PSCI conduit to use, rather than hardcoding use of HVC. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1483977924-14522-15-git-send-email-peter.maydell@linaro.org
2017-01-20hw/arm/virt: Wire VIRQ, VFIQ, maintenance irq lines from GIC to CPUPeter Maydell
Wire the new VIRQ, VFIQ and maintenance interrupt lines from the GIC to each CPU. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1483977924-14522-5-git-send-email-peter.maydell@linaro.org
2017-01-20arm: virt: Fix segmentation fault when specifying an unsupported CPUShannon Zhao
Using -cpu cortex-a9 (or any other unsupported CPU) with the virt board will cause QEMU to segmentation fault. This bug was introduced in commit 9ac4ef77, which incorrectly added a NULL terminator when converting the VirtBoardInfo array into a simple array of strings defining the valid CPUs. The cpuname_valid() loop already has a termination condition based on ARRAY_SIZE, so the NULL is spurious and causes the strcmp() to segfault if we reach it. Delete the NULL. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1484619334-10488-1-git-send-email-zhaoshenglong@huawei.com [PMM: expanded commit message] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: remove VirtGuestInfoAndrew Jones
by moving VirtGuestInfo.fw_cfg to VirtMachineState. This is the mach-virt equivalent of "pc: Move PcGuestInfo.fw_cfg to PCMachineState" and "pc: Eliminate PcGuestInfo struct" combined. Signed-off-by: Andrew Jones <drjones@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-14-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt-acpi-build: remove redundant members from VirtGuestInfoAndrew Jones
Now that we pass VirtMachineState, and guest-info is just part of that state, we can remove all the redundant members and access the VirtMachineState directly. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-12-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: pass VirtMachineState instead of VirtGuestInfoAndrew Jones
Only two functions take VirtGuestInfo parameters. Now that guest-info is part of VirtMachineState, and VirtMachineState is defined in the virt header, pass that instead. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-11-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: move VirtMachineState/Class to virt.hAndrew Jones
In preparation to share more Virt machine state than just guest-info with other mach-virt source files, move the State and Class structures to virt.h Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-10-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: remove include/hw/arm/virt-acpi-build.hAndrew Jones
include/hw/arm/virt-acpi-build.h is only used for VirtGuestInfo, which doesn't even necessarily have to be ACPI specific. Move VirtGuestInfo to include/hw/arm/virt.h, allowing us to remove include/hw/arm/virt-acpi-build.h, and to prepare for even more code motion. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-9-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: eliminate struct VirtGuestInfoStateAndrew Jones
Instead of allocating a new struct just for VirtGuestInfo and the machine_done Notifier, place them inside VirtMachineState. This is the mach-virt equivalent of "pc: Eliminate struct PcGuestInfoState" Suggested-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-8-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: use VirtMachineState.gic_versionAndrew Jones
machvirt_init may need to probe for the gic version. If so, then make sure the result is written to VirtMachineState. With the state up to date, use it instead of a local variable. This is a cleanup that prepares for VirtMachineState to be passed to functions even outside hw/arm/virt.c Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-7-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: parameter passing cleanupsAndrew Jones
Some simple cleanups made possible by "hw/arm/virt: Merge VirtBoardInfo and VirtMachineState" Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-6-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09hw/arm/virt: Don't incorrectly claim architectural timer to be edge-triggeredPeter Maydell
The architectural timers in ARM CPUs all have level triggered interrupts (unless you're using KVM on a host kernel before 4.4, which misimplemented them as edge-triggered). We were incorrectly describing them in the device tree as edge triggered. This can cause problems for guest kernels in 4.8 before rc6: * pre-4.8 kernels ignore the values in the DT * 4.8 before rc6 write the DT values to the GIC config registers * newer than rc6 ignore the DT and insist that the timer interrupts are level triggered regardless Fix the DT so we're describing reality. For backwards-compatibility purposes, only do this for the virt-2.9 machine onward. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com>
2017-01-09hw/arm/virt: Rename 'vbi' variables to 'vms'Peter Maydell
Rename all the variables which used to be VirtBoardInfo* and are now VirtMachineState* so their names are in line with the type being used. Apart from the removal of the line 'VirtMachineState *vbi = vms;' this commit is purely a search-and-replace of 'vbi' with 'vms'. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com>
2017-01-09hw/arm/virt: Merge VirtBoardInfo and VirtMachineStatePeter Maydell
One of the purposes of VirtBoardInfo was to hold various bits of state about the board. Now we have MachineState and the subclass VirtMachineState to do this. Fold the VirtBoardInfo into VirtMachineState rather than having some flags in one struct and some in another with no useful way to get between them. In the process we drop the code for looking up the memory map and irq map from the CPU model, because in practice we always use the same maps in all cases. For easier code review, this change removes the VirtBoardInfo type but leaves all the variables which used to be VirtBoardInfo* and are now VirtMachineState* with their now-confusing 'vbi' names. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com>
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