| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2022-05-02 | aspeed/adc: Add AST1030 support | Steven Lee | |
| Per ast1030_v7.pdf, AST1030 ADC engine is identical to AST2600's ADC. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-2-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> | |||
| 2021-10-12 | hw/adc: Add basic Aspeed ADC model | Andrew Jeffery | |
| This model implements enough behaviour to do basic functionality tests such as device initialisation and read out of dummy sample values. The sample value generation strategy is similar to the STM ADC already in the tree. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> [clg : support for multiple engines (AST2600) ] Signed-off-by: Cédric Le Goater <clg@kaod.org> [pdel : refactored engine register struct fields to regs[] array field] [pdel : added guest-error checking for upper-8 channel regs in AST2600] [pdel : allow 16-bit reads of the channel data registers] Signed-off-by: Peter Delevoryas <pdel@fb.com> Message-Id: <20211005052604.1674891-2-pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> | |||
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