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Use float{32,64,x80,128}_maybe_silence_nan() instead of toggling the
sNaN bit manually. This allow per target implementation of sNaN to qNaN
conversion.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Add float{x80,128}_maybe_silence_nan() functions, they will be need by
propagateFloat{x80,128}NaN().
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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On targets that define sNaN with the sNaN bit as one, simply clearing
this bit may correspond to an infinite value.
Convert it to a default NaN if SNAN_BIT_IS_ONE, as it corresponds to
the MIPS implementation, the only emulated CPU with SNAN_BIT_IS_ONE.
When other CPU of this type are added, this might be updated to include
more cases.
Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Similarly to what has been done in commit
185698715dfb18c82ad2a5dbc169908602d43e81 rename the misnamed *IsNaN
variables into *IsQuietNaN.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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We don't have any HPPA target, so let's remove HPPA specific code. It
can be re-added when someone adds an HPPA target.
This has been blessed by Stuart Brady <sdb@zubnet.me.uk>, author of the
target-hppa fork.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Implement the correct NaN propagation rules for ARM targets by
providing an appropriate pickNaN function.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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IEEE754 doesn't specify precisely what NaN should be returned as
the result of an operation on two input NaNs. This is therefore
target-specific. Abstract out the code in propagateFloat*NaN()
which was implementing the x87 propagation rules, so that it
can be easily replaced on a per-target basis.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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The softfloat functions float*_is_nan() were badly misnamed,
because they return true only for quiet NaNs, not for all NaNs.
Rename them to float*_is_quiet_nan() to more accurately reflect
what they do.
This change was produced by:
perl -p -i -e 's/_is_nan/_is_quiet_nan/g' $(git grep -l is_nan)
(with the results manually checked.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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The ARM architecture needs float/double to 16 bit integer conversions.
(The 32 bit versions aren't sufficient because of the requirement
to saturate at 16 bit MAXINT/MININT and to get the exception bits right.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
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Add functions float*_maybe_silence_nan() which ensure that a
value is not a signaling NaN by turning it into a quiet NaN.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
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Add float*_is_any_nan() functions which return true if the argument
is a NaN of any kind (quiet or signalling).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Value stored to 'bSign' is never read.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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The fpcr_exc_status, fpcr_exc_mask, and fpcr_dyn_round fields
are stored in <softfloat.h> format for convenience during
regular execution.
Revert the addition of float_exception_mask to float_status,
added in ba0e276db4b51bd2255a5d5ff8902c70d32ade40.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Compilation for arm (native or cross) results in this
warning:
fpu/softfloat-native.c: In function ‘float64_round_to_int’:
fpu/softfloat-native.c:387: error: control reaches end of non-void function
float64_round_to_int uses special assembler code for arm
and has no explicit return value.
As there is no obvious reason why arm should need special
code, all fpu related conditionals were removed.
The remaining code is standard (C99) and compiles for arm,
too.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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1. Add correct definitions of error numbers.
2. Implement SYS_osf_sigprocmask
3. Implement SYS_osf_get/setsysinfo for IEEE_FP_CONTROL.
This last requires exposing the FPCR value to do_syscall.
Since this value is actually split up into the float_status,
expose routines from helper.c to access it.
Finally, also add a float_exception_mask field to float_status.
We don't actually use it to control delivery of exceptions to
the emulator yet, but simply hold the value that we placed there
when loading/storing the FPCR.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Don't define C99 math functions on OpenSolaris (Solaris 11),
which still ships GCC 3.4.3. This fixes redefinition warnings.
Spotted by Palle Lyckegaard.
Signed-off-by: Andreas Färber <afaerber@opensolaris.org>
Cc: Palle Lyckegaard <palle@lyckegaard.dk>
Cc: Ben Taylor <bentaylor.solx86@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Implement the ARM VFP half precision floating point extensions.
Signed-off-by: Paul Brook <paul@codesourcery.com>
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Once there fix a place where it was misspelled
Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7103 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7102 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6782 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6775 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6741 c046a42c-6fe2-441c-8c8c-71466251a162
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6518 c046a42c-6fe2-441c-8c8c-71466251a162
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6514 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6436 c046a42c-6fe2-441c-8c8c-71466251a162
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According to $GCC/gcc/config/rs6000/rs6000-c.c _ARCH_PPC is the
ubiquitous define which should be used to test whether gcc targets
PowerPC, on 64bit platforms _ARCH_PPC64 will be also defined.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6301 c046a42c-6fe2-441c-8c8c-71466251a162
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fegetround() and fesetround() are using an int type. Change the type of
float_rounding_mode and floatx80_rounding_precision in the float_status
structure for consistency.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6115 c046a42c-6fe2-441c-8c8c-71466251a162
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Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6107 c046a42c-6fe2-441c-8c8c-71466251a162
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Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6106 c046a42c-6fe2-441c-8c8c-71466251a162
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Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6102 c046a42c-6fe2-441c-8c8c-71466251a162
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Thanks to Laurent Desnogues for the hint.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6089 c046a42c-6fe2-441c-8c8c-71466251a162
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6059 c046a42c-6fe2-441c-8c8c-71466251a162
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6050 c046a42c-6fe2-441c-8c8c-71466251a162
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Fix float64_is_nan()
Fix floatx80_is_signaling_nan()
Add floatx80_is_nan()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6049 c046a42c-6fe2-441c-8c8c-71466251a162
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Use float_relation_* constants rather than magic numbers in
softfloat-native comparison routines.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6025 c046a42c-6fe2-441c-8c8c-71466251a162
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6002 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5775 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5732 c046a42c-6fe2-441c-8c8c-71466251a162
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Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5618 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5275 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5077 c046a42c-6fe2-441c-8c8c-71466251a162
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