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2021-07-18docs: Add skeletal documentation of the emcraft-sf2Peter Maydell
Add skeletal documentation of the emcraft-sf2 machine. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210713142226.19155-3-peter.maydell@linaro.org
2021-07-18docs: Add skeletal documentation of cubieboardPeter Maydell
Add skeletal documentation of the cubieboard machine. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210713142226.19155-2-peter.maydell@linaro.org
2021-07-18docs: Move deprecation, build and license info out of system/Peter Maydell
Now that we have a single Sphinx manual rather than multiple manuals, we can provide a better place for "common to all of QEMU" information like the deprecation notices, build platforms, license information, which we currently have in the system/ manual even though it applies to all of QEMU. Create a new directory about/ on the same level as system/, user/, etc, and move these documents there. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20210705095547.15790-5-peter.maydell@linaro.org
2021-07-18docs: Remove "Contents:" lines from top-level subsectionsPeter Maydell
Since the top-level subsections aren't self-contained manuals any more, the "Contents:" lines at the top of each of their index pages look a bit odd; remove them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20210705095547.15790-4-peter.maydell@linaro.org
2021-07-18docs: Stop calling the top level subsections of our manual 'manuals'Peter Maydell
We merged our previous multiple-manual setup into a single Sphinx manual, but we left some text in the various index.rst lines that still calls the top level subsections separate 'manuals'. Update them to talk about "this section of the manual" instead, and remove now-obsolete comments about how the index.rst files are the "top level page for the 'foo' manual". Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20210705095547.15790-3-peter.maydell@linaro.org
2021-07-16Merge remote-tracking branch ↵Peter Maydell
'remotes/alistair/tags/pull-riscv-to-apply-20210715' into staging Fourth RISC-V PR for 6.1 release - Code cleanups - Documentation improvements - Hypervisor extension improvements with hideleg and hedeleg - sifive_u fixes - OpenTitan register layout updates - Fix coverity issue # gpg: Signature made Thu 15 Jul 2021 08:14:00 BST # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20210715: hw/riscv/boot: Check the error of fdt_pack() hw/riscv: opentitan: Add the flash alias hw/riscv: opentitan: Add the unimplement rv_core_ibex_peri char: ibex_uart: Update the register layout hw/riscv: sifive_u: Make sure firmware info is 8-byte aligned hw/riscv: sifive_u: Correct the CLINT timebase frequency docs/system: riscv: Update Microchip Icicle Kit for direct kernel boot target/riscv: hardwire bits in hideleg and hedeleg docs/system: riscv: Add documentation for virt machine docs/system: riscv: Fix CLINT name in the sifive_u doc target/riscv: csr: Remove redundant check in fp csr read/write routines target/riscv: pmp: Fix some typos Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-15docs/system: riscv: Update Microchip Icicle Kit for direct kernel bootBin Meng
This adds a new section in the documentation to demonstrate how to use the new direct kernel boot feature for Microchip Icicle Kit, other than the HSS bootflow, using an upstream U-Boot v2021.07 image as an example. It also updates the truth table to have a new '-dtb' column which is required by direct kernel boot. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210706095045.1917913-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-07-15docs/system: riscv: Add documentation for virt machineBin Meng
This adds detailed documentation for RISC-V `virt` machine, including the following information: - Supported devices - Hardware configuration information - Boot options - Running Linux kernel - Running U-Boot Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210627142816.19789-2-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-07-15docs/system: riscv: Fix CLINT name in the sifive_u docBin Meng
It's Core *Local* Interruptor, not 'Level'. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210627142816.19789-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-07-14docs: fix typo s/Intel/AMD/ in CPU model notesDaniel P. Berrangé
Reviewed-by: Pankaj Gupta <pankaj.gupta@ionos.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Yanan Wang <wangyanan55@huawei.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2021-07-11Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20210709' into staging target-arm queue: * New machine type: stm32vldiscovery * hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write * hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers * virt: Fix implementation of GPIO-based powerdown/shutdown mechanism * Correct the encoding of MDCCSR_EL0 and DBGDSCRint * hw/intc: Improve formatting of MEMTX_ERROR guest error message # gpg: Signature made Fri 09 Jul 2021 17:09:10 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210709: hw/intc: Improve formatting of MEMTX_ERROR guest error message target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRint hw/arm/stellaris: Expand comment about handling of OLED chipselect hw/gpio/pl061: Document a shortcoming in our implementation hw/gpio/pl061: Convert to 3-phase reset and assert GPIO lines correctly on reset hw/arm/virt: Make PL061 GPIO lines pulled low, not high hw/gpio/pl061: Make pullup/pulldown of outputs configurable hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers hw/gpio/pl061: Document the interface of this device hw/gpio/pl061: Add tracepoints for register read and write hw/gpio/pl061: Clean up read/write offset handling logic hw/gpio/pl061: Convert DPRINTF to tracepoints hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write tests/boot-serial-test: Add STM32VLDISCOVERY board testcase docs/system: arm: Add stm32 boards description stm32vldiscovery: Add the STM32VLDISCOVERY Machine stm32f100: Add the stm32f100 SoC Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-10Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into stagingPeter Maydell
Block layer patches - Make blockdev-reopen stable - Remove deprecated qemu-img backing file without format - rbd: Convert to coroutines and add write zeroes support - rbd: Updated MAINTAINERS - export/fuse: Allow other users access to the export - vhost-user: Fix backends without multiqueue support - Fix drive-backup transaction endless drained section # gpg: Signature made Fri 09 Jul 2021 13:49:22 BST # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: (28 commits) block: Make blockdev-reopen stable API iotests: Test reopening multiple devices at the same time block: Support multiple reopening with x-blockdev-reopen block: Acquire AioContexts during bdrv_reopen_multiple() block: Add bdrv_reopen_queue_free() qcow2: Fix dangling pointer after reopen for 'file' qemu-img: Improve error for rebase without backing format qemu-img: Require -F with -b backing image qcow2: Prohibit backing file changes in 'qemu-img amend' blockdev: fix drive-backup transaction endless drained section vhost-user: Fix backends without multiqueue support MAINTAINERS: add block/rbd.c reviewer block/rbd: fix type of task->complete iotests/fuse-allow-other: Test allow-other iotests/308: Test +w on read-only FUSE exports export/fuse: Let permissions be adjustable export/fuse: Give SET_ATTR_SIZE its own branch export/fuse: Add allow-other option export/fuse: Pass default_permissions for mount util/uri: do not check argument of uri_free() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-10Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210709' ↵Peter Maydell
into staging ppc patch queue 2021-07-09 Here's a (probably) final pull request before the qemu-6.1 soft freeze. Includes: * Implementation of the new H_RPT_INVALIDATE hypercall * Virtual Open Firmware for pSeries and pegasos2 machine types. This is an experimental minimal Open Firmware implementation which works by delegating nearly everything to qemu itself via a special hypercall. * A number of cleanups to the ppc soft MMU code * Fix to handling of two-level radix mode translations for the powernv machine type * Update the H_GET_CPU_CHARACTERISTICS call with newly defined bits. This will allow more flexible handling of possible future CPU Spectre-like flaws * Correctly treat mtmsrd as an illegal instruction on BookE cpus * Firmware update for the ppce500 machine type # gpg: Signature made Fri 09 Jul 2021 06:16:42 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.1-20210709: (33 commits) target/ppc: Support for H_RPT_INVALIDATE hcall linux-headers: Update spapr: Fix implementation of Open Firmware client interface target/ppc: Don't compile ppc_tlb_invalid_all without TCG ppc/pegasos2: Implement some RTAS functions with VOF ppc/pegasos2: Fix use of && instead of & ppc/pegasos2: Use Virtual Open Firmware as firmware replacement target/ppc/spapr: Update H_GET_CPU_CHARACTERISTICS L1D cache flush bits target/ppc: Allow virtual hypervisor on CPU without HV ppc/pegasos2: Introduce Pegasos2MachineState structure target/ppc: mtmsrd is an illegal instruction on BookE spapr: Implement Open Firmware client interface docs/system: ppc: Update ppce500 documentation with eTSEC support roms/u-boot: Bump ppce500 u-boot to v2021.07 to add eTSEC support target/ppc: change ppc_hash32_xlate to use mmu_idx target/ppc: introduce mmu-books.h target/ppc: changed ppc_hash64_xlate to use mmu_idx target/ppc: fix address translation bug for radix mmus target/ppc: Fix compilation with DEBUG_BATS debug option target/ppc: Fix compilation with FLUSH_ALL_TLBS debug option ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-09docs/system: arm: Add stm32 boards descriptionAlexandre Iooss
This adds the target guide for Netduino 2, Netduino Plus 2 and STM32VLDISCOVERY. Signed-off-by: Alexandre Iooss <erdnaxe@crans.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210617165647.2575955-4-erdnaxe@crans.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-09qemu-img: Require -F with -b backing imageEric Blake
Back in commit d9f059aa6c (qemu-img: Deprecate use of -b without -F), we deprecated the ability to create a file with a backing image that requires qemu to perform format probing. Qemu can still probe older files for backwards compatibility, but it is time to finish off the ability to create such images, due to the potential security risk they present. Update a couple of iotests affected by the change. Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <20210503213600.569128-3-eblake@redhat.com> Reviewed-by: Connor Kuehl <ckuehl@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2021-07-09qcow2: Prohibit backing file changes in 'qemu-img amend'Eric Blake
This was deprecated back in bc5ee6da7 (qcow2: Deprecate use of qemu-img amend to change backing file), and no one in the meantime has given any reasons why it should be supported. Time to make change attempts a hard error (but for convenience, specifying the _same_ backing chain is not forbidden). Update a couple of iotests to match. Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <20210503213600.569128-2-eblake@redhat.com> Reviewed-by: Connor Kuehl <ckuehl@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2021-07-09docs/system: ppc: Update ppce500 documentation with eTSEC supportBin Meng
This adds eTSEC support to the PowerPC `ppce500` machine documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-07-06Deprecate pmem=on with non-DAX capable backend fileIgor Mammedov
It is not safe to pretend that emulated NVDIMM supports persistence while backend actually failed to enable it and used non-persistent mapping as fall back. Instead of falling-back, QEMU should be more strict and error out with clear message that it's not supported. So if user asks for persistence (pmem=on), they should store backing file on NVDIMM. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210111203332.740815-1-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2021-07-05ui: Mark the '-no-quit' option as deprecatedThomas Huth
It's just a wrapper around the -display ...,window-close=off parameter, and the name "no-quit" is rather confusing compared to "window-close" (since there are still other means to quit the emulator), so we should rather tell our users to use the "window-close" parameter instead. While we're at it, update the documentation to state that "-no-quit" is available for GTK, too, not only for SDL. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210630163231.467987-4-thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-05ui: Fix the "-display sdl,window_close=..." parameterThomas Huth
According to the QAPI schema, there is a "-" and not a "_" between "window" and "close", and we're also talking about "window-close" in the long parameter description in qemu-options.hx, so we should make sure that we rather use the variant with the "-" by default instead of only allowing the one with the "_" here. The old way still stays enabled for compatibility, but we deprecate it, so that we can switch to a QAPIfied parameter one day more easily. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210630163231.467987-3-thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-07-02docs/system/arm: Add quanta-gbs-bmc referencePatrick Venture
Add line item reference to quanta-gbs-bmc machine. Signed-off-by: Patrick Venture <venture@google.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 20210615192848.1065297-3-venture@google.com [PMM: fixed underline Sphinx warning] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-02docs/system/arm: Add quanta-q7l1-bmc referencePatrick Venture
Adds a line-item reference to the supported quanta-q71l-bmc aspeed entry. Signed-off-by: Patrick Venture <venture@google.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 20210615192848.1065297-2-venture@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-06-29hw/nvme: add 'zoned.zasl' to documentationKeith Busch
Signed-off-by: Keith Busch <kbusch@kernel.org> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2021-06-29hw/nvme: default for namespace EUI-64Heinrich Schuchardt
On machines with version > 6.0 replace a missing EUI-64 by a generated value. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
2021-06-29hw/nvme: namespace parameter for EUI-64Heinrich Schuchardt
The EUI-64 field is the only identifier for NVMe namespaces in UEFI device paths. Add a new namespace property "eui64", that provides the user the option to specify the EUI-64. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
2021-06-24docs/system: arm: Add nRF boards descriptionAlexandre Iooss
This adds the target guide for BBC Micro:bit. Information is taken from https://wiki.qemu.org/Features/MicroBit and from hw/arm/nrf51_soc.c. Signed-off-by: Alexandre Iooss <erdnaxe@crans.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 20210621075625.540471-1-erdnaxe@crans.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-06-24target/arm: Implement MTE3Peter Collingbourne
MTE3 introduces an asymmetric tag checking mode, in which loads are checked synchronously and stores are checked asynchronously. Add support for it. Signed-off-by: Peter Collingbourne <pcc@google.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210616195614.11785-1-pcc@google.com [PMM: Add line to emulation.rst] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-06-21docs/system/arm: Document which architecture extensions we emulatePeter Maydell
These days the Arm architecture has a wide range of fine-grained optional extra architectural features. We implement quite a lot of these but by no means all of them. Document what we do implement, so that users can find out without having to dig through back-issues of our Changelog on the wiki. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20210617140328.28622-1-peter.maydell@linaro.org Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-17docs: add a table showing x86-64 ABI compatibility levelsDaniel P. Berrangé
It is useful to know which CPUs satisfy each x86-64 ABI compatibility level, when dealing with guest OS that require something newer than the baseline ABI. These ABI levels are defined in: https://gitlab.com/x86-psABIs/x86-64-ABI/ and supported by GCC, Clang, glibc and more. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20210607135843.196595-2-berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2021-06-14docs: recommend SCRAM-SHA-256 SASL mech instead of SHA-1 variantDaniel P. Berrangé
The SHA-256 variant better meats modern security expectations. Also warn that the password file is storing entries in clear text. Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2021-06-14docs: document usage of the authorization frameworkDaniel P. Berrangé
The authorization framework provides a way to control access to network services after a client has been authenticated. This documents how to actually use it. Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2021-06-14docs: document how to pass secret data to QEMUDaniel P. Berrangé
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2021-06-08docs/system: Move the RISC-V -bios information to removedAlistair Francis
QEMU 5.1 changed the behaviour of the default boot for the RISC-V virt and sifive_u machines. This patch moves that change from the deprecated.rst file to the removed-features.rst file and the target-riscv.rst. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: 4f1c261e7f69045ab8bb8926d85fe1d35e48ea5b.1620081256.git.alistair.francis@wdc.com
2021-06-08hw/riscv: microchip_pfsoc: Support direct kernel bootBin Meng
At present the Microchip Icicle Kit machine only supports using '-bios' to load the HSS, and does not support '-kernel' for direct kernel booting just like other RISC-V machines do. One has to use U-Boot which is chain-loaded by HSS, to load a kernel for testing. This is not so convenient. Adding '-kernel' support together with the existing '-bios', we follow the following table to select which payload we execute: -bios | -kernel | payload ------+------------+-------- N | N | HSS Y | don't care | HSS N | Y | kernel This ensures backwards compatibility with how we used to expose '-bios' to users. When '-kernel' is used for direct boot, '-dtb' must be present to provide a valid device tree for the board, as we don't generate device tree. When direct kernel boot is used, the OpenSBI fw_dynamic BIOS image is used to boot a payload like U-Boot or OS kernel directly. Documentation is updated to describe the direct kernel boot. Note as of today there is still no PolarFire SoC support in the upstream Linux kernel hence the document does not include instructions for that. It will be updated in the future. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210430071302.1489082-8-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-06-08docs/system/riscv: sifive_u: Document '-dtb' usageBin Meng
Update the 'sifive_u' machine documentation to mention the '-dtb' option that can be used to pass a custom DTB to QEMU. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210430071302.1489082-6-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-06-08docs/system/riscv: Correct the indentation level of supported devicesBin Meng
The supported device bullet list has an additional space before each entry, which makes a wrong indentation level. Correct it. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210430071302.1489082-5-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-06-03arm: Consistently use "Cortex-Axx", not "Cortex Axx"Peter Maydell
The official punctuation for Arm CPU names uses a hyphen, like "Cortex-A9". We mostly follow this, but in a few places usage without the hyphen has crept in. Fix those so we consistently use the same way of writing the CPU name. This commit was created with: git grep -z -l 'Cortex ' | xargs -0 sed -i 's/Cortex /Cortex-/' Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20210527095152.10968-1-peter.maydell@linaro.org
2021-06-03HMP: added info cpustats to removed_features.rstBruno Larsen (billionai)
Documented the removal of the HMP command info cpustats Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210531145629.21300-3-bruno.larsen@eldorado.org.br> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Lucas Mateus <lucas.araujo@eldorado.org.br> Reviewed-by: Greg Kurz <groug@kaod.org> [dwg: Fix a Sphinx formatting error] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-14sphinx: adopt kernel readthedoc themeMarc-André Lureau
The default "alabaster" sphinx theme has a couple shortcomings: - the navbar moves along the page - the search bar is not always at the same place - it lacks some contrast and colours The "rtd" theme from readthedocs.org is a popular third party theme used notably by the kernel, with a custom style sheet. I like it better, perhaps others do too. It also simplifies the "Edit on Gitlab" links. Tweak a bit the custom theme to match qemu.org style, use the QEMU logo, and favicon etc. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20210323115328.4146052-1-marcandre.lureau@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com>
2021-05-13Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2021-05-12' into ↵Peter Maydell
staging Miscellaneous patches for 2021-05-12 # gpg: Signature made Wed 12 May 2021 17:22:15 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-misc-2021-05-12: Drop the deprecated unicore32 target Drop the deprecated lm32 target block: Drop the sheepdog block driver Remove the deprecated moxie target monitor/qmp: fix race on CHR_EVENT_CLOSED without OOB Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-12Drop the deprecated unicore32 targetMarkus Armbruster
Target unicore32 was deprecated in commit 8e4ff4a8d2b, v5.2.0. See there for rationale. Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20210503084034.3804963-3-armbru@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com>
2021-05-12Drop the deprecated lm32 targetMarkus Armbruster
Target lm32 was deprecated in commit d8498005122, v5.2.0. See there for rationale. Some of its code lives on in device models derived from milkymist ones: hw/char/digic-uart.c and hw/display/bcm2835_fb.c. Cc: Michael Walle <michael@walle.cc> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20210503084034.3804963-2-armbru@redhat.com> Acked-by: Michael Walle <michael@walle.cc> [Trivial conflicts resolved, reST markup fixed]
2021-05-12block: Drop the sheepdog block driverMarkus Armbruster
It was deprecated in commit e1c4269763, v5.2.0. See that commit message for rationale. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20210501075747.3293186-1-armbru@redhat.com> ACKed-by: Peter Krempa <pkrempa@redhat.com>
2021-05-12Remove the deprecated moxie targetThomas Huth
There are no known users of this CPU anymore, and there are no binaries available online which could be used for regression tests, so the code has likely completely bit-rotten already. It's been marked as deprecated since two releases now and nobody spoke up that there is still a need to keep it, thus let's remove it now. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210430160355.698194-1-thuth@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [Commit message typos fixed, trivial conflicts resolved] Signed-off-by: Markus Armbruster <armbru@redhat.com>
2021-05-11docs: Add documentation for shakti_c machineVijai Kumar K
Add documentation for Shakti C reference platform. Signed-off-by: Vijai Kumar K <vijai@behindbytes.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210412174248.8668-1-vijai@behindbytes.com Signed-off-by: Bin Meng <bmeng.cn@gmail.com> [ Changes from Bin Meng: - Add missing TOC Message-id: 20210430070534.1487242-1-bmeng.cn@gmail.com ] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-05-11docs/system/generic-loader.rst: Fix styleAxel Heider
Fix style to have a proper description of the parameter 'force-raw'. Signed-off-by: Axel Heider <axelheider@gmx.de> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: a7e50a64-1c7c-2d41-96d3-d8a417a659ac@gmx.de Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-05-10hw/arm/mps2-tz: Implement AN524 memory remapping via machine propertyPeter Maydell
The AN524 FPGA image supports two memory maps, which differ in where the QSPI and BRAM are. In the default map, the BRAM is at 0x0000_0000, and the QSPI at 0x2800_0000. In the second map, they are the other way around. In hardware, the initial mapping can be selected by the user by writing either "REMAP: BRAM" (the default) or "REMAP: QSPI" in the board configuration file. The board config file is acted on by the "Motherboard Configuration Controller", which is an entirely separate microcontroller on the dev board but outside the FPGA. The guest can also dynamically change the mapping via the SCC CFG_REG0 register. Implement this functionality for QEMU, using a machine property "remap" with valid values "BRAM" and "QSPI" to allow the user to set the initial mapping, in the same way they can on the FPGA, and wiring up the bit from the SCC register to also switch the mapping. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210504120912.23094-4-peter.maydell@linaro.org
2021-05-10docs: fix link in sbsa descriptionAlex Bennée
A trailing _ makes all the difference to the rendered link. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20210428131316.31390-1-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-05Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210504' ↵Peter Maydell
into staging ppc patch queue 2021-05-04 Here's the first ppc pull request for qemu-6.1. It has a wide variety of stuff accumulated during the 6.0 freeze. Highlights are: * Multi-phase reset cleanups for PAPR * Preliminary cleanups towards allowing !CONFIG_TCG for the ppc target * Cleanup of AIL logic and extension to POWER10 * Further improvements to handling of hot unplug failures on PAPR * Allow much larger numbers of CPU on pseries * Support for the H_SCM_HEALTH hypercall * Add support for the Pegasos II board * Substantial cleanup to hflag handling * Assorted minor fixes and cleanups # gpg: Signature made Tue 04 May 2021 06:52:39 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.1-20210504: (46 commits) hw/ppc/pnv_psi: Use device_cold_reset() instead of device_legacy_reset() hw/ppc/spapr_vio: Reset TCE table object with device_cold_reset() hw/intc/spapr_xive: Use device_cold_reset() instead of device_legacy_reset() target/ppc: removed VSCR from SPR registration target/ppc: Reduce the size of ppc_spr_t target/ppc: Clean up _spr_register et al target/ppc: Add POWER10 exception model target/ppc: rework AIL logic in interrupt delivery target/ppc: move opcode table logic to translate.c target/ppc: code motion from translate_init.c.inc to gdbstub.c spapr_drc.c: handle hotunplug errors in drc_unisolate_logical() spapr.h: increase FDT_MAX_SIZE spapr.c: do not use MachineClass::max_cpus to limit CPUs ppc: Rename current DAWR macros and variables target/ppc: POWER10 supports scv target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour docs/system: ppc: Add documentation for ppce500 machine roms/u-boot: Bump ppce500 u-boot to v2021.04 to fix broken pci support roms/Makefile: Update ppce500 u-boot build directory name ppc/spapr: Add support for implement support for H_SCM_HEALTH ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-05Merge remote-tracking branch ↵Peter Maydell
'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging Trivial patches pull request 20210503 # gpg: Signature made Mon 03 May 2021 09:34:56 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.1-pull-request: (23 commits) hw/rx/rx-gdbsim: Do not accept invalid memory size docs: More precisely describe memory-backend-*::id's user scripts: fix generation update-binfmts templates docs/system: Document the removal of "compat" property for POWER CPUs mc146818rtc: put it into the 'misc' category Do not include exec/address-spaces.h if it's not really necessary Do not include cpu.h if it's not really necessary Do not include hw/boards.h if it's not really necessary Do not include sysemu/sysemu.h if it's not really necessary hw: Do not include qemu/log.h if it is not necessary hw: Do not include hw/irq.h if it is not necessary hw: Do not include hw/sysbus.h if it is not necessary hw: Remove superfluous includes of hw/hw.h ui: Fix memory leak in qemu_xkeymap_mapping_table() hw/usb: Constify VMStateDescription hw/display/qxl: Constify VMStateDescription hw/arm: Constify VMStateDescription vmstate: Constify some VMStateDescriptions Fix typo in CFI build documentation hw/pcmcia: Do not register PCMCIA type if not required ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-16 08:48:46 +0000