Age | Commit message (Expand) | Author |
---|---|---|
2022-01-08 | target/riscv: setup everything for rv64 to support rv128 execution | Frédéric Pétrot |
2021-10-07 | disas/riscv: Add Zb[abcs] instructions | Philipp Tomsich |
2019-06-27 | disas/riscv: Fix `rdinstreth` constraint | Wladimir J. van der Laan |
2019-06-27 | disas/riscv: Disassemble reserved compressed encodings as illegal | Michael Clark |
2019-04-18 | disas: Rename include/disas/bfd.h back to include/disas/dis-asm.h | Markus Armbruster |
2019-03-19 | RISC-V: Remove unnecessary disassembler constraints | Michael Clark |
2018-05-06 | RISC-V: Fix missing break statement in disassembler | Michael Clark |
2018-05-06 | RISC-V: Include instruction hex in disassembly | Michael Clark |
2018-03-28 | RISC-V: Fix incorrect disassembly for addiw | Michael Clark |
2018-03-07 | RISC-V Disassembler | Michael Clark |