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AgeCommit message (Expand)Author
2008-06-27More efficient target register / TC accesses.ths
2008-06-09CRIS: Emulate NMIs.edgar_igl
2008-06-07Multithreaded locking fixes.pbrook
2008-06-06CRIS: Add the P flag to the tb dependent flags.edgar_igl
2008-06-04reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworke...bellard
2008-06-02Restore ARM signal handler compilation on glibc < 2.5 (Blue Swirl).balrog
2008-05-29Remove unused (for now) reg_REGWPTR (original patch by Glauber Costa)blueswir1
2008-05-28SVM reworkbellard
2008-05-27removed unused codebellard
2008-05-27CRIS: Re-add the X flag to the tb flags, it allows for better code generation...edgar_igl
2008-05-27Move non-op functions from op_helper.c to helper.c and vice versa.blueswir1
2008-05-19Fix Sparc32 compilation broken by r4484blueswir1
2008-05-18Fix Sparc64 host signal handlingblueswir1
2008-05-17Improved workaround for the annoying glibc global register mangling bugblueswir1
2008-05-15Always process real timers regardless of singlestep mode (Jason Wessel).edgar_igl
2008-05-14Fix compilation on Sparc host, implement ld and stblueswir1
2008-05-13CRIS: Improve TLB management and handle delayslots at page boundaries.edgar_igl
2008-05-12use new helper namebellard
2008-05-12the double/triple fault handling was not tested in user mode.bellard
2008-05-10initial global prologue/epilogue implementationbellard
2008-05-10Fix compiler warnings in common filesblueswir1
2008-05-09Debugger single step without interrupts (Jason Wessel).edgar_igl
2008-05-07CRIS: Remove X flag from tb flags.edgar_igl
2008-05-06Fix signal handler compilation on __arm__.balrog
2008-05-04Fix crash due to invalid env->current_tb (Adam Lackorzynski, Paul Brook, me)blueswir1
2008-05-03CRIS: Reduce the number of tb dependent flags.edgar_igl
2008-05-02CRIS updates:edgar_igl
2008-04-13x86: Introduce CPU_INTERRUPT_NMIaurel32
2008-04-12HPPA (PA-RISC) host supportaurel32
2008-04-11Fix compiler warningsaurel32
2008-03-14* Add a model of the ETRAX interrupt controller.edgar_igl
2008-02-01reverted -translation option supportbellard
2008-02-01use the TCG code generatorbellard
2008-01-23Add option to disable TB cache, by Herve Poussineau.ths
2007-12-11 Partial fix to Sparc32 Linux host global register mangling problemblueswir1
2007-12-11 Fix code generation buffer overflow reported by TeLeManblueswir1
2007-12-02SH4: system emulator interrupt update, by Magnus Damm.ths
2007-12-02SH4 delay slot code update, by Magnus Damm.ths
2007-11-23Fix TB chaining for exceptions.pbrook
2007-11-11consistent types for cpu_x86_fsave and cpu_x86_frstorbellard
2007-11-11removed warningbellard
2007-11-11ARMv7 support.pbrook
2007-11-08removed obsolete x86 code copy supportbellard
2007-11-07 CPU specific boot mode (Robert Reif)blueswir1
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer
2007-10-08CRIS support in toplevel, by Edgar E. Iglesias.ths
2007-09-27SVM VINTR fix, by Alexander Graf.ths
2007-09-24 CPU boot modeblueswir1
2007-09-23SVM Support, by Alexander Graf.ths
2007-09-20Extend TB flags to 64 bits (Alexander Graf).j_mayer