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2014-05-13cpu: make CPU_INTERRUPT_RESET available on all targetsPaolo Bonzini
On the x86, some devices need access to the CPU reset pin (INIT#). Provide a generic service to do this, using one of the internal cpu_interrupt targets. Generalize the PPC-specific code for CPU_INTERRUPT_RESET to other targets. Since PPC does not support migration across QEMU versions (its machine types are not versioned yet), I picked the value that is used on x86, CPU_INTERRUPT_TGT_INT_1. Consequently, TGT_INT_2 and TGT_INT_3 are shifted down by one while keeping their value. Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-04-04cpu-exec: Unlock tb_lock if we longjmp out of code generationPeter Maydell
If the guest attempts to execute from unreadable memory, this will cause us to longjmp back to the main loop from inside the target frontend decoder. For linux-user mode, this means we will still hold the tb_ctx.tb_lock, and will deadlock when we try to start executing code again. Unlock the lock in the return-from-longjmp code path to avoid this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Andrei Warkentin <andrey.warkentin@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-03-13cpu-exec: Change cpu_resume_from_signal() argument to CPUStateAndreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13translate-all: Change tb_gen_code() argument to CPUStateAndreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move watchpoint fields from CPU_COMMON to CPUStateAndreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move jmp_env field from CPU_COMMON to CPUStateAndreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move tb_jmp_cache field from CPU_COMMON to CPUStateAndreas Färber
Clear it on reset. Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move icount_decr field from CPU_COMMON to CPUStateAndreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move icount_extra field from CPU_COMMON to CPUStateAndreas Färber
Reset it. Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber
Default to false. Tidy variable naming and inline cast uses while at it. Tested-by: Jia Liu <proljc@gmail.com> (or32) Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-26target-arm: Store AIF bits in env->pstate for AArch32Peter Maydell
To avoid complication in code that otherwise would not need to care about whether EL1 is AArch32 or AArch64, we should store the interrupt mask bits (CPSR.AIF in AArch32 and PSTATE.DAIF in AArch64) in one place consistently regardless of EL1's mode. Since AArch64 has an extra enable bit (D for debug exceptions) which isn't visible in AArch32, this means we need to keep the enables in env->pstate. (This is also consistent with the general approach we're taking that we handle 32 bit CPUs as being like AArch64/ARMv8 CPUs but which only run in 32 bit mode.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
2014-02-11exec: Make ldl_*_phys input an AddressSpaceEdgar E. Iglesias
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-01-10Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into stagingAnthony Liguori
QOM CPUState refactorings / X86CPU * TLB invalidation optimizations * X86CPU initialization cleanups * Preparations for X86CPU hot-unplug # gpg: Signature made Tue 24 Dec 2013 04:51:52 AM PST using RSA key ID 3E7E013F # gpg: Good signature from "Andreas Färber <afaerber@suse.de>" # gpg: aka "Andreas Färber <afaerber@suse.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 174F 0347 1BCC 221A 6175 6F96 FA2E D12D 3E7E 013F * afaerber/tags/qom-cpu-for-anthony: target-i386: Cleanup 'foo=val' feature handling target-i386: Cleanup 'foo' feature handling target-i386: Convert 'check' and 'enforce' to static properties target-i386: Convert 'hv_spinlocks' to static property target-i386: Convert 'hv_vapic' to static property target-i386: Convert 'hv_relaxed' to static property cpu-exec: Optimize X86CPU usage in cpu_exec() target-i386: Move apic_state field from CPUX86State to X86CPU cputlb: Tidy memset() of arrays cputlb: Use memset() when flushing entries
2014-01-07exec: Delay CPU_LOG_TB_CPU until we actually execute a TBRichard Henderson
The previous placement could result in duplicate logging while still processing interrupts. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-12-24cpu-exec: Optimize X86CPU usage in cpu_exec()Andreas Färber
Replace growing numbers of inline x86_env_get_cpu() with x86_cpu variable. Reviewed-by: Chen Fan <chen.fan@cn.fujitsu.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-23target-i386: Move apic_state field from CPUX86State to X86CPUChen Fan
This motion is preparing for refactoring vCPU APIC subsequently. Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-10-07cpu-exec: Also reload CPUClass *cc after longjmp return in cpu_exec()Juergen Lock
Local variable CPUClass *cc needs to be reloaded after return from longjmp, too. (This fixes a mips-softmmu crash observed on FreeBSD when QEMU is built with clang.) Reported-by: Dimitry Andric <dim@FreeBSD.org> Signed-off-by: Juergen Lock <nox@jelal.kn-bremen.de> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-09-02tcg: Fix next_tb type in cpu_execRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change tcg_qemu_tb_exec return to uintptr_tRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-23cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber
Prepares for changing cpu_single_step() argument to CPUState. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber
Where no extra implementation is needed, fall back to CPUClass::set_pc(). Acked-by: Michael Walle <michael@walle.cc> (for lm32) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09log: Change log_cpu_state[_mask]() argument to CPUStateAndreas Färber
Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is no longer needed. Add documentation and make the functions available through qemu/log.h outside NEED_CPU_H to allow use in qom/cpu.c. Moving them to qom/cpu.h was not yet possible due to convoluted include paths, so that some devices grow an implicit and unneeded dependency on qom/cpu.h for now. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Reviewed-by: Richard Henderson <rth@twiddle.net> [AF: Simplified mb_cpu_do_interrupt() and do_interrupt_all() changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09target-i386: Change do_smm_enter() argument to X86CPUAndreas Färber
Prepares for log_cpu_state_mask() changing argument to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09cpu: Replace cpu_single_env with CPUState current_cpuAndreas Färber
Move it to qom/cpu.h. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-15target-i386/helper: remove DF macroliguang
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-04-13Merge branch 'mingw' of git://qemu.weilnetz.de/qemuAurelien Jarno
* 'mingw' of git://qemu.weilnetz.de/qemu: qemu-timer: move timeBeginPeriod/timeEndPeriod to os-win32 Release SMP restriction on Windows Ensure good ordering of memory instruction in cpu_exec Check effective suspension of TCG thread
2013-04-12Ensure good ordering of memory instruction in cpu_execOlivier Hainque
The IO thread, when it senses cpu_single_env == 0, expects exit_request to be checked later on. A compiler scheduling constraint is not strong enough to ensure this on modern architecture. A memory fence is needed as well. Signed-off-by: Olivier Hainque <hainque@adacore.com> Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefan Weil <sw@weilnetz.de>
2013-04-12cpu-exec: Allow "-d exec" in non-debug builds (drop CONFIG_DEBUG_EXEC)Peter Maydell
The CONFIG_DEBUG_EXEC define compiles out a single qemu_log_mask() call, which is a pretty trivial cost even for something in the main cpu_exec() loop. Having this be conditionally defined means that '-d exec' on a non-debug build will silently do nothing. Drop the define and the configure machinery that sets it, in favour of just always allowing this log option to be enabled at runtime. As a concession to the mainloopiness, we use qemu_loglevel_mask()+qemu_log() rather than qemu_log_mask() to avoid the function call overhead. Note that DEBUG_DISAS is always defined, so removing the '|| defined(CONFIG_DEBUG_EXEC)' from those conditionals makes no behavioural change for that logging. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-03-23target-i386: Don't modify env->eflags around cpu_dump_stateRichard Henderson
We can compute the value in cpu_dump_state anyway, and gratuitous modifications to eflags creates heisenbugs. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-23Add top level changes for moxieAnthony Green
Signed-off-by: Anthony Green <green@moxielogic.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber
This removes a global per-target function and thus takes us one step closer to compiling multiple targets into one executable. It will also allow to override the interrupt handling for certain CPU families. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber
Both fields are used in VMState, thus need to be moved together. Explicitly zero them on reset since they were located before breakpoints. Pass PowerPCCPU to kvmppc_handle_halt(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-03Handle CPU interrupts by inline checking of a flagPeter Maydell
Fix some of the nasty TCG race conditions and crashes by implementing cpu_exit() as setting a flag which is checked at the start of each TB. This avoids crashes if a thread or signal handler calls cpu_exit() while the execution thread is itself modifying the TB graph (which may happen in system emulation mode as well as in linux-user mode with a multithreaded guest binary). This fixes the crashes seen in LP:668799; however there are another class of crashes described in LP:1098729 which stem from the fact that in linux-user with a multithreaded guest all threads will use and modify the same global TCG date structures (including the generated code buffer) without any kind of locking. This means that multithreaded guest binaries are still in the "unsupported" category. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-03cpu-exec: wrap tcg_qemu_tb_exec() in a fn to restore the PCPeter Maydell
If tcg_qemu_tb_exec() returns a value whose low bits don't indicate a link to an indexed next TB, this means that the TB execution never started (eg because the instruction counter hit zero). In this case the guest PC has to be reset to the address of the start of the TB. Refactor the cpu-exec code to make all tcg_qemu_tb_exec() calls pass through a wrapper function which does this restoration if necessary. Note that the apparent change in cpu_exec_nocache() from calling cpu_pc_from_tb() with the old TB to calling it with the TB returned by do_tcg_qemu_tb_exec() is safe, because in the nocache case we can guarantee that the TB we try to execute is not linked to any others, so the only possible returned TB is the one we started at. That is, we should arguably previously have included in cpu_exec_nocache() an assert(next_tb & ~TB_EXIT_MASK) == tb), since the API requires restore from next_tb but we were using tb. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-03tcg: Document tcg_qemu_tb_exec() and provide constants for low bit usesPeter Maydell
Document tcg_qemu_tb_exec(). In particular, its return value is a combination of a pointer to the next translation block and some extra information in the low two bits. Provide some #defines for the values passed in these bits to improve code clarity. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23Replace all setjmp()/longjmp() with sigsetjmp()/siglongjmp()Peter Maydell
The setjmp() function doesn't specify whether signal masks are saved and restored; on Linux they are not, but on BSD (including MacOSX) they are. We want to have consistent behaviour across platforms, so we should always use "don't save/restore signal mask" (this is also generally going to be faster). This also works around a bug in MacOSX where the signal-restoration on longjmp() affects the signal mask for a completely different thread, not just the mask for the thread which did the longjmp. The most visible effect of this was that ctrl-C was ignored on MacOSX because the CPU thread did a longjmp which resulted in its signal mask being applied to every thread, so that all threads had SIGINT and SIGTERM blocked. The POSIX-sanctioned portable way to do a jump without affecting signal masks is to siglongjmp() to a sigjmp_buf which was created by calling sigsetjmp() with a zero savemask parameter, so change all uses of setjmp()/longjmp() accordingly. [Technically POSIX allows sigsetjmp(buf, 0) to save the signal mask; however the following siglongjmp() must not restore the signal mask, so the pair can be effectively considered as "sigjmp/longjmp which don't touch the mask".] For Windows we provide a trivial sigsetjmp/siglongjmp in terms of setjmp/longjmp -- this is OK because no user will ever pass a non-zero savemask. The setjmp() uses in tests/tcg/test-i386.c and tests/tcg/linux-test.c are left untouched because these are self-contained singlethreaded test programs intended to be run under QEMU's Linux emulation, so they have neither the portability nor the multithreading issues to deal with. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Tested-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-16cpu: Move current_tb field to CPUStateAndreas Färber
Explictly NULL it on CPU reset since it was located before breakpoints. Change vapic_report_tpr_access() argument to CPUState. This also resolves the use of void* for cpu.h independence. Change vAPIC patch_instruction() argument to X86CPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16cpu: Move exit_request field to CPUStateAndreas Färber
Since it was located before breakpoints field, it needs to be reset. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16TCG: Move translation block variables to new context inside tcg_ctx: tb_ctxEvgeny Voevodin
It's worth to clean-up translation blocks variables and move them into one context as was suggested by Swirl. Also if we use this context directly inside tcg_ctx, then it speeds up code generation a bit. Signed-off-by: Evgeny Voevodin <evgenyvoevodin@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19misc: move include files to include/qemu/Paolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber
For target-mips also change the return type to bool. Make include paths for cpu-qom.h consistent for alpha and unicore32. Signed-off-by: Andreas Färber <afaerber@suse.de> [AF: Updated new target-openrisc function accordingly] Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
2012-10-05cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to genericPeter Maydell
Move the DUMP_FPU and DUMP_CCOP flags for cpu_dump_state() from being x86-specific flags to being generic ones. This allows us to drop some TARGET_I386 ifdefs in various places, and means that we can (potentially) be more consistent across architectures about which monitor commands or debug abort printouts include FPU register contents and info about QEMU's condition-code optimisations. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-08-27Revert "i8259: add -no-spurious-interrupt-hack option"malc
This reverts commit f278d4947fff814dcde2ef2acad36d172ff8be35. Signed-off-by: malc <av1474@comtv.ru>
2012-08-24i8259: add -no-spurious-interrupt-hack optionMatthew Ogilvie
This patch provides a way to optionally suppress spurious interrupts, as a workaround for systems described below: Some old operating systems do not handle spurious interrupts well, and qemu tends to generate them significantly more often than real hardware. Examples: - Microport UNIX System V/386 v 2.1 (ca 1987) (The main problem I'm fixing: Without this patch, it panics sporadically when accessing the hard disk.) - AT&T UNIX System V/386 Release 4.0 Version 2.1a (ca 1991) See screenshot in "QEMU Official OS Support List": http://www.claunia.com/qemu/objectManager.php?sClass=application&iId=9 (I don't have this system to test.) - A report about OS/2 boot lockup from 2004 by Hampa Hug: http://lists.nongnu.org/archive/html/qemu-devel/2004-09/msg00367.html (My patch was partially inspired by his.) Also: http://lists.nongnu.org/archive/html/qemu-devel/2005-06/msg00243.html (I don't have this system to test.) Signed-off-by: Matthew Ogilvie <mmogilvi_qemu@miniinfo.net> Signed-off-by: malc <av1474@comtv.ru>
2012-08-11unicore32-softmmu: Make UniCore32 cpuid & exceptions correct and runableGuan Xuetao
This patch initializes the cpuid to exactly correct value because linux kernel will check it. In addition, the exception types are specified in proper situations. Then it could make exceptions generated correctly and timely. Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-09Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemuBlue Swirl
* 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu: target-i386: move tcg initialization into x86_cpu_initfn() cleanup cpu_set_debug_excp_handler target-xtensa: drop usage of prev_debug_excp_handler target-i386: drop usage of prev_debug_excp_handler
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