Age | Commit message (Expand) | Author |
2004-04-12 | PowerPC system emulation fixes (Jocelyn Mayer) | bellard |
2004-03-31 | win32 port (initial patch by kazu) | bellard |
2004-03-21 | do not depend on thunk.h - more log items | bellard |
2004-03-17 | initial x86-64 host support (Gwenole Beauchesne) | bellard |
2004-02-25 | native FPU support in code copy mode | bellard |
2004-02-16 | experimental code copy support - CPU_INTERRUPT_EXITTB support | bellard |
2004-02-03 | temporary interrupt locking fix (need rework) | bellard |
2004-01-18 | PowerPC merge (Jocelyn Mayer) | bellard |
2004-01-18 | simpler second page physical address test | bellard |
2004-01-04 | PowerPC System emulation (Jocelyn Mayer) | bellard |
2004-01-04 | support for new TLB handling | bellard |
2004-01-04 | sparc fixes | bellard |
2003-11-23 | PowerPC target support (Jocelyn Mayer) - added better support for uid16 | bellard |
2003-11-19 | fixed TB linking in case of code invalidation (fixes random segfaults) | bellard |
2003-10-30 | unused functions in system mode | bellard |
2003-10-27 | fixed mmu fault priviledge logic | bellard |
2003-09-30 | sparc emulation target (thanx to Thomas M. Ogrisegg) | bellard |
2003-09-17 | removed x86 hacks | bellard |
2003-08-21 | faster and more accurate segment handling | bellard |
2003-08-20 | pop ss, mov ss, x and sti disable irqs for the next instruction - began dispa... | bellard |
2003-08-20 | no error code if hardware interrupt | bellard |
2003-08-10 | m68k host port (Richard Zidlicky) | bellard |
2003-08-10 | soft mmu support | bellard |
2003-07-29 | correct CPL support (should fix flat real mode support) | bellard |
2003-07-26 | real mode support | bellard |
2003-07-26 | gdb stub breakpoints support | bellard |
2003-07-09 | ARM fixes | bellard |
2003-06-30 | fixed invalid irq jump chaining | bellard |
2003-06-30 | reduced irq latency | bellard |
2003-06-25 | suppressed ring 0 hacks | bellard |
2003-06-24 | hardware interrupt support - support forfull ring 0 exception simulation | bellard |
2003-06-21 | new segment access | bellard |
2003-06-15 | main cpu loop is target independent | bellard |