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2008-05-29Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28moved halted field to CPU_COMMONbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-27Use correct types to enable > 2G support, based on a patch fromaurel32
Anthony Liguori. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4265 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22Revert "Use correct types to enable > 2G support" (r4238), it isaurel32
not yet ready. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4240 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22Use correct types to enable > 2G support, based on a patch fromaurel32
Anthony Liguori. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4238 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-08Use a common constant for temp_buf sizeblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4176 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01use the TCG code generatorbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-31use simpler REGPARM convention - make CPUTLBEntry size a power of twobellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3935 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17Break up vl.h.pbrook
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28Implement missing MIPS supervisor mode bits.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer
allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-19TARGET_FMT_lu may also be useful.j_mayer
Fix compilation warnings. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3190 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-26Fix writes to pages containing watchpoints for the RAM not at 0x0 cases.balrog
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3025 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-14Add TARGET_FMT_plx to properly display target_phys_addr_t variables.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2660 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05Infrastructure to support more than 2 MMU modes.j_mayer
Add example for Alpha and PowerPC hypervisor mode. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2596 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-04TARGET_FMT_ld may also be useful for debugging purposes.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2593 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-16Watchpoint support (previous commit got eaten by Savannah server crash).pbrook
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2479 c046a42c-6fe2-441c-8c8c-71466251a162
2006-11-12Speed up tlb_flush_page (Daniel Jacobowitz).pbrook
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2210 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-25C99 64 bit printfbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2018 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-28PAGE_EXEC support in TLBsbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1676 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-23better halted state supportbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1652 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-21SMP supportbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1640 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-20added CPU_COMMON and CPUState.tb_jmp_cache[]bellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1630 c046a42c-6fe2-441c-8c8c-71466251a162
2005-08-21ram_addr_t type for ram offsetsbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1542 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02simplified PowerPC exception handling (Jocelyn Mayer)bellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1492 c046a42c-6fe2-441c-8c8c-71466251a162
2005-06-05added HOST_LONG_BITS in configurebellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1457 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-0364 bit target supportbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1189 c046a42c-6fe2-441c-8c8c-71466251a162
2004-04-26amd64 port (Jocelyn Mayer)bellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@762 c046a42c-6fe2-441c-8c8c-71466251a162
2004-04-25added target_phys_addr_tbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@756 c046a42c-6fe2-441c-8c8c-71466251a162
2004-03-21do not depend on thunk.h - more log itemsbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@675 c046a42c-6fe2-441c-8c8c-71466251a162
2004-02-16use osdep.hbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@626 c046a42c-6fe2-441c-8c8c-71466251a162
2004-01-24correct target_ulong definitionbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@582 c046a42c-6fe2-441c-8c8c-71466251a162
2003-10-27commentsbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@405 c046a42c-6fe2-441c-8c8c-71466251a162
2003-08-10soft mmu supportbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@349 c046a42c-6fe2-441c-8c8c-71466251a162
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