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2024-10-30target/riscv: Enable RV32 CPU support in RV64 QEMUTANG Tiancheng
Add gdb XML files and adjust CPU initialization to allow running RV32 CPUs in RV64 QEMU. Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com> Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240919055048.562-7-zhiwei_liu@linux.alibaba.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-24config/targets: update aarch64_be-linux-user gdb XML listAlex Bennée
Attempting to run the binary asserts when it can't find the XML entry. We can fix it so we don't although I suspect other stuff is broken. Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2580 Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241023113406.1284676-13-alex.bennee@linaro.org>
2024-10-13target/i386/gdbstub: Expose orig_axIlya Leoshkevich
Copy XML files describing orig_ax from GDB and glue them with CPUX86State.orig_ax. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20240912093012.402366-5-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-02Merge tag 'pull-riscv-to-apply-20241002' of ↵Peter Maydell
https://github.com/alistair23/qemu into staging RISC-V PR for 9.2 * Add a property to set vl to ceil(AVL/2) * Enable numamem testing for RISC-V * Consider MISA bit choice in implied rule * Fix the za64rs priv spec requirements * Enable Bit Manip for OpenTitan Ibex CPU * Fix the group bit setting of AIA with KVM * Stop timer with infinite timecmp * Add 'fcsr' register to QEMU log as a part of F extension * Fix riscv64 build on musl libc * Add preliminary textra trigger CSR functions * RISC-V bsd-user support * Respect firmware ELF entry point * Add Svvptc extension support * Fix masking of rv32 physical address * Fix linking problem with semihosting disabled * Fix IMSIC interrupt state updates # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEaukCtqfKh31tZZKWr3yVEwxTgBMFAmb83lYACgkQr3yVEwxT # gBNndBAAmh66yWt9TeTHlQ/rgBhx2nUMBbfICBWQyNGvPlslffwrNoLkh8jpkuiP # PD0RQArAAGeM09cgCZCu14JzIBmmNiGgUxsUnqOZvUw18uIlLFlpt/tiT7iGw/Xb # pfI7waF66/FPXBErY2yiw9/RGQLlkiGNBC9FNYrD/kCahf9MSIobv85tOgSQ2qjH # nOJ+UBN0TQ1x0Z5lJMj9Pzl1WDvelRnCkYI5nXg1heKG73Hm7GmHt99QpTV2Okqn # T3jFzEfMTQeHO4nC/X2pbaesE62K+mTg/FZpId2iV8lMCSm1zKof+xJ4boKM9RB2 # 0HjXAT+MveLuLUNtgfbV9C+VgU25M+wnfy5tH0l801Y/Gez8Q1fbK2uykuiyiUSy # MNNk/KzmOYuffwItuyeL3mmWHXsN+izUIeMmMxfL9X9nssZXRsrDXc+MByS7w0fk # QOeZmXHTxXwxFymr0t0DLK2eKEG6cqQty1KWp6iLx3uwnMTGo+576P41Q+boj64s # VllWzmuR0Ta0xuSR4sDvEFCO7OCFEgVdn1j0FvhRFskPEDrbQgXRLq8i3awtU6z1 # NIh+A30XeK+EZLv0sEje6gav5lZHWMfAeCOKJstVzOl8+NQibuKTUrsqLgTrBK6K # plw8qwvZYjSnYErzHfywlq9ArufIvOHYcx9Nb76tLNy9E+y01yo= # =15Hm # -----END PGP SIGNATURE----- # gpg: Signature made Wed 02 Oct 2024 06:47:02 BST # gpg: using RSA key 6AE902B6A7CA877D6D659296AF7C95130C538013 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6AE9 02B6 A7CA 877D 6D65 9296 AF7C 9513 0C53 8013 * tag 'pull-riscv-to-apply-20241002' of https://github.com/alistair23/qemu: (35 commits) bsd-user: Add RISC-V 64-bit Target Configuration and Debug XML Files bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV bsd-user: Implement 'get_mcontext' for RISC-V bsd-user: Implement RISC-V signal trampoline setup functions bsd-user: Define RISC-V signal handling structures and constants bsd-user: Add generic RISC-V64 target definitions bsd-user: Define RISC-V system call structures and constants bsd-user: Define RISC-V VM parameters and helper functions bsd-user: Add RISC-V thread setup and initialization support bsd-user: Implement RISC-V sysarch system call emulation bsd-user: Add RISC-V signal trampoline setup function bsd-user: Define RISC-V register structures and register copying bsd-user: Add RISC-V ELF definitions and hardware capability detection bsd-user: Implement RISC-V TLS register setup bsd-user: Implement RISC-V CPU register cloning and reset functions bsd-user: Add RISC-V CPU execution loop and syscall handling bsd-user: Implement RISC-V CPU initialization and main loop hw/intc: riscv-imsic: Fix interrupt state updates. target/riscv/cpu_helper: Fix linking problem with semihosting disabled target/riscv32: Fix masking of physical address ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-10-02Merge tag 'pull-request-2024-10-02' of https://gitlab.com/thuth/qemu into ↵Peter Maydell
staging * Fix mips64el in the CI * Remove unused sh4eb target * Add an additional EXECUTE TCG test for s390x # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmb9QdARHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbWQsQ/+NyTWEdTVXYLKGjv17QE3s5irfH6pT6WB # Ea5HOkiT7mAOJZEzHS38fUzgySFA24MOpeqqPK6Dyi6O/fpXKkJL+e1Km2qWvc66 # NCKsicj271+AWHOrT2KnWnk6zRnxJBpeV/c/ajJnyjTAOYc5ItBPeNlfDsj1+sNP # UzQ3mTmiw6M9jDntvJCtC99NyBBZTuyFLp/5ZA/fXCJdmzVEHEOU/rjWuVIq1nDC # zm3MxUZwheHAkJ5wk7O+T3Qsio5iGBCeWBeNsH6hy6KyAf7fhU3h5vn4zaVzKQPB # 88I8BbPok5sIVB1ODseIZLiF4IWZt8cPV00SJVSNebyufJ6wsuEFLT+nbMcQy4K1 # hZMvqA2WY+MGyThF67iC8OtaeDksUBoYw6RM0cCGlRQ2fsR4QAahk8Cg1BIG6Hn7 # hYtKu68Rs+vrxH6lgjq9wWBrafl7MbROQxlTm8KsJJdHigQ4UUB23+OKKcJrePi+ # vQpFEWIEgLVrxUrnwyJPulqG5fVXNkOWYfu1Y/WARr7uNe4gf86UvBunQmSxlV3Y # 4Q1iQlKaVznzyUe8QEvP8LpZRols0v5BT9zpF0TJwC/vk+SjuAtz4/URWvLn5Qwd # zIhWp9ZUxHUJgCqiciNHAY1AzsG2CiSuihKgTbPBZo0b3oYMB7sMaDLq733M98k2 # lI6f5DjIyhg= # =V9nZ # -----END PGP SIGNATURE----- # gpg: Signature made Wed 02 Oct 2024 13:51:28 BST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2024-10-02' of https://gitlab.com/thuth/qemu: tests/tcg/s390x: Test modifying an EXECUTE target qemu-timer: Remove unused timer functions Remove the unused sh4eb target configs: Fix typo in the sh4-softmmu devices config file testing: bump mips64el cross to bookworm and fix package list Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-10-02Remove the unused sh4eb targetThomas Huth
Since the "shix" machine has been removed, the "r2d" machine is the only machine that is still available for the sh4 and sh4eb targets. However, the "r2d" machine apparently does not work in big endian mode, see here: https://lore.kernel.org/qemu-devel/87a5fwjjew.wl-ysato@users.sourceforge.jp/ So there is no working machine left in the sh4eb-softmmu target, i.e. it is currently completely useless. Thus remove it from the configuration now. (Note: The linux-user binary is not removed since it might still be used to run sh4 binaries in big endian mode). Message-ID: <20240926105843.81385-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-10-02configs: Fix typo in the sh4-softmmu devices config fileThomas Huth
This is the config file for the little endian target, so there should not be a "eb" in here. Message-ID: <20240920161045.84622-1-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-10-02bsd-user: Add RISC-V 64-bit Target Configuration and Debug XML FilesWarner Losh
Added configuration for RISC-V 64-bit target to the build system. Signed-off-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-18-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-01hw/arm: Remove 'n800' and 'n810' machinesPeter Maydell
Remove the 'n800' and 'n810' machine types, which modelled Nokia internet tablets. These were deprecated in 9.0 and so we can remove them for 9.2. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-26-peter.maydell@linaro.org [PMM: added removal of arm-n800-machine.c post-review]
2024-10-01hw/arm: Remove 'z2' machinePeter Maydell
The 'z2' machine was deprecated in 9.0, so we can remove it for 9.2. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-13-peter.maydell@linaro.org
2024-10-01hw/arm: Remove 'mainstone' machinePeter Maydell
The 'mainstone' machine has been deprecated since 9.0, and so we can remove it for the 9.2 release. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-11-peter.maydell@linaro.org
2024-10-01hw/arm: Remove 'connex' and 'verdex' machinesPeter Maydell
The connex and verdex machines have been deprecated since 9.0 and so can be removed for the 9.2 release. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-10-peter.maydell@linaro.org
2024-10-01hw/arm: Remove 'cheetah' machinePeter Maydell
The 'cheetah' machine has been deprecated since 9.0, so we can remove it for the 9.2 release. (tsc210x.c is also used by nseries, so move its MAINTAINER file line there; the nseries boards are also about to be removed.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240903160751.4100218-9-peter.maydell@linaro.org
2024-10-01hw/arm: Remove deprecated akita, borzoi, spitz, terrier, tosa boardsPeter Maydell
The Sharp XScale-based PDA board models akita, borzoi, spitz, terrier, and tosa were all deprecated in 9.0, so our deprecation cycle permits removing them for the 9.2 release. Remove the source files for the board models themselves, and their documentation. There were no tests for these boards. We will move the text describing the dropped boards from deprecated.rst to removed-features.rst when we've cleaned up all the boards it lists. Device models used only by removed board models will be removed in separate commits. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-2-peter.maydell@linaro.org
2024-09-22linux-user,loongarch: move to syscalltbl fileLaurent Vivier
Since kernel v6.11 loongarch has moved from syscall_nr.h file to syscall.tbl (26a3b85bac08 ("loongarch: convert to generic syscall table")) Update linux-user scripts to be able to retrieve syscall numbers from linux syscall.tbl instead of syscall_nr.h. New syscall.tbl is imported from linux v6.11 using updated scripts/update-syscalltbl.sh Remove scripts/gensyscalls.sh that is now useless. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20240920151034.859533-6-laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-09-22linux-user,hexagon: move to syscalltbl fileLaurent Vivier
Since kernel v6.11 hexagon has moved from syscall_nr.h file to syscall.tbl (36d69c29759e ("hexagon: use new system call table")) Update linux-user scripts to be able to retrieve syscall numbers from linux syscall.tbl instead of syscall_nr.h. New syscall.tbl is imported from linux v6.11 using updated scripts/update-syscalltbl.sh Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20240920151034.859533-5-laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-09-22linux-user,riscv: move to syscalltbl fileLaurent Vivier
Since kernel v6.11 riscv has moved from syscall_nr.h file to syscall.tbl (3db80c999deb ("riscv: convert to generic syscall table")) Update linux-user scripts to be able to retrieve syscall numbers from linux syscall.tbl instead of syscall_nr.h. New syscall.tbl is imported from linux v6.11 using updated scripts/update-syscalltbl.sh Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20240920151034.859533-4-laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-09-22linux-user,openrisc: move to syscalltbl fileLaurent Vivier
Since kernel v6.11 openrisc has moved from syscall_nr.h file to syscall.tbl (See 77122bf9e3df ("openrisc: convert to generic syscall table")) Update linux-user scripts to be able to retrieve syscall numbers from linux syscall.tbl instead of syscall_nr.h. New syscall.tbl is imported from linux v6.11 using updated scripts/update-syscalltbl.sh Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20240920151034.859533-3-laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-09-22linux-user,aarch64: move to syscalltbl fileLaurent Vivier
Since kernel v6.11 aarch64 has moved from syscall_nr.h file to syscall_64.tbl (See e632bca07c8e ("arm64: generate 64-bit syscall.tbl")) Update linux-user scripts to be able to retrieve syscall numbers from linux syscall_64.tbl instead of syscall_nr.h. New syscall_64.tbl is imported from linux v6.11 using updated scripts/update-syscalltbl.sh Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20240920151034.859533-2-laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-09-13system: Remove support for CRIS targetPhilippe Mathieu-Daudé
We are about to remove the CRIS target, so remove the sysemu part. This remove the CRIS 'none' machine. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Message-ID: <20240904143603.52934-13-philmd@linaro.org>
2024-09-13hw/cris: Remove the axis-dev88 machinePhilippe Mathieu-Daudé
This machine was deprecated for the v9.0 release in commit c7bbef4023 ("docs: mark CRIS support as deprecated"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Message-ID: <20240904143603.52934-6-philmd@linaro.org>
2024-09-13linux-user: Remove support for CRIS targetPhilippe Mathieu-Daudé
As per the deprecation notice in commit c7bbef4023: The CRIS architecture was pulled from Linux in 4.17 and the compiler is no longer packaged in any distro making it harder to run the `check-tcg` tests. Unless we can improve the testing situation there is a chance the code will bitrot without anyone noticing. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Message-ID: <20240904143603.52934-5-philmd@linaro.org>
2024-09-13hw/sh4: Remove the deprecated SHIX machinePhilippe Mathieu-Daudé
The SHIX machine is deprecated since v9.0 (commit 322b038c94 "target/sh4: Deprecate the shix machine"). Time to remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Message-ID: <20240903153959.18392-2-philmd@linaro.org>
2024-07-23bsd-user: Add aarch64 build to treeWarner Losh
Add the aarch64 bsd-user fragments needed to build the new aarch64 code. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2024-07-19target/loongarch/gdbstub: Add vector registers supportSong Gao
GDB already support LoongArch vector extension[1], QEMU gdb adds LoongArch vector registers support, so that users can use 'info all-registers' to get all vector registers values. [1]: https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=1e9569f383a3d5a88ee07d0c2401bd95613c222e Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewd-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240711024454.3075183-1-gaosong@loongson.cn>
2024-07-12target/loongarch/kvm: Add software breakpoint supportBibo Mao
With KVM virtualization, debug exception is injected to guest kernel rather than host for normal break intruction. Here hypercall instruction with special code is used for sw breakpoint usage, and detailed instruction comes from kvm kernel with user API KVM_REG_LOONGARCH_DEBUG_INST. Now only software breakpoint is supported, and it is allowed to insert/remove software breakpoint. We can debug guest kernel with gdb method after kernel is loaded, hardware breakpoint will be added in later. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Tested-by: Song Gao <gaosong@loongson.cn> Message-Id: <20240607035016.2975799-1-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2024-07-05gdbstub: Add support for MTE in user modeGustavo Romero
This commit implements the stubs to handle the qIsAddressTagged, qMemTag, and QMemTag GDB packets, allowing all GDB 'memory-tag' subcommands to work with QEMU gdbstub on aarch64 user mode. It also implements the get/set functions for the special GDB MTE register 'tag_ctl', used to control the MTE fault type at runtime. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-Id: <20240628050850.536447-11-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-40-alex.bennee@linaro.org>
2024-06-26target/riscv/kvm: define TARGET_KVM_HAVE_GUEST_DEBUGChao Du
To enable the KVM GUEST DEBUG for RISC-V at QEMU side. Signed-off-by: Chao Du <duchao@eswincomputing.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240606014501.20763-4-duchao@eswincomputing.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-05-10configs: disable emulators that require it if libfdt is not foundPaolo Bonzini
Since boards can express their dependency on libfdt and system/device_tree.c, only leave TARGET_NEED_FDT if the target has a hard dependency. Those emulators will be skipped if libfdt is disabled, or if it is "auto" and not found and --disable-download is passed; unless the target is mentioned explicitly in --target-list, in which case the build will fail. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03xtensa: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with Xtensa. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03tricore: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with TriCore. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03sparc: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with SPARC and SPARC64. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03sh4: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with SH. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03s390x: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with s390. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03rx: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with RX. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03riscv: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with RISC-V. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03ppc: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with PowerPC/POWER. No changes to generated config-devices.mak files, other than adding CONFIG_PPC to the ppc64-softmmu target. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03openrisc: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with OpenRISC. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03mips: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with MIPS. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03microblaze: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with Microblaze. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03m68k: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with m68k. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03loongarch: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with Loongarch. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03i386: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with i386. No changes to generated config-devices.mak files, other than adding CONFIG_I386 to the x86_64-softmmu target. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03hppa: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with PARISC. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03cris: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with CRIS. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03avr: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with AVR. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03arm: switch boards to "default y"Paolo Bonzini
For ARM targets, boards that require TCG are already using "default y". Switch ARM_VIRT to the same selection mechanism. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03alpha: switch boards to "default y"Paolo Bonzini
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Start with Alpha. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-03configs: list "implied" device groups in the default configsPaolo Bonzini
Match the optional device groups to what is actually included in the config-devices.mak files. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-04-24Merge tag 'housekeeping-20240424' of https://github.com/philmd/qemu into stagingRichard Henderson
Removal of deprecated code - Remove the Nios II target and hardware - Remove pvrdma device and rdmacm-mux helper - Remove GlusterFS RDMA protocol handling - Update Sriram Yagnaraman mail address # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmYpE0YACgkQ4+MsLN6t # wN5PIA//egomANjRHAUAf9tdjljgT/JR49ejM7iInyxspR/xaiq0TlP2kP6aDNps # y1HAWBwfj5lGxeMgQ1mSKJGka3v2AIPWb7RbNT+9AaiWHv+sx5OrEytozUsFHLo8 # gSgRQocq0NY2a9dPbtkDqfbmq/rkCC7wgZzwroHsyOdiqYsWDKPJFleBDMjGmEaf # colhiDmhUPgvE3NNpwfEVNh/2SzxUxY8k5FHal6qij5z56ZqBglgnziDZEvGVCZ1 # uF4Hca/kh7TV2MVsdStPbGWZYDhJ/Np/2FnRoThD1Hc4qq8d/SH997m2F94tSOud # YeH54Vp5lmCeYgba5y8VP0ZPx/b9XnTtLvKggNdoqB+T2LBWPRt8kehqoaxvammF # ALzbY/t2vUxL6nIVbosOaTyqVOXvynk3/Js5S0jbnlu+vP2WvvFEzfYKIs2DIA8w # z56o/rG4KfyxF0aDB+CvLNwtJS8THqeivPqmYoKTdN9FPpN2RyBNLITrKo389ygF # 3oWy3+xsKGIPdNFY0a4l25xntqWNhND89ejzyL9M6G1cQ9RdEmTIUGTrinPQQmfP # oHIJMBeTdj7EqPL4LB3BR/htw9U5PobeMNYKFsRkS39PjGDqba5wbIdk3w5/Rcxa # s/PKdspDKWPwZ5jhcLD0qxAGJFnqM2UFjPo+U8qyI3RXKXFAn0E= # =c8Aj # -----END PGP SIGNATURE----- # gpg: Signature made Wed 24 Apr 2024 07:12:22 AM PDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] * tag 'housekeeping-20240424' of https://github.com/philmd/qemu: block/gluster: Remove deprecated RDMA protocol handling hw/rdma: Remove deprecated pvrdma device and rdmacm-mux helper hw/timer: Remove the ALTERA_TIMER model target/nios2: Remove the deprecated Nios II target MAINTAINERS: Update Sriram Yagnaraman mail address Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.2.3 (git 2.26.2) at 2024-11-26 02:45:19 +0000