aboutsummaryrefslogtreecommitdiff
path: root/bsd-user/arm
AgeCommit message (Expand)Author
2022-02-26bsd-user: introduce target.hWarner Losh
2022-02-26bsd-user/arm/target_arch_thread.h: Assume a FreeBSD targetWarner Losh
2022-02-26bsd-user/arm/target_arch_cpu.h: Only support FreeBSD sys callsWarner Losh
2022-01-30bsd-user: Rename arg name for target_cpu_reset to envWarner Losh
2022-01-28bsd-user/arm/target_arch_cpu.h: Implement data faultsWarner Losh
2022-01-28bsd-user/arm/target_arch_cpu.h: Use force_sig_fault for EXCP_UDEFWarner Losh
2022-01-28bsd-user/arm/target_arch_cpu.h: Correct code pointerWarner Losh
2022-01-28bsd-user/arm/arget_arch_cpu.h: Move EXCP_DEBUG and EXCP_BKPT togetherWarner Losh
2022-01-28bsd-user/signal-common.h: Move signal functions prototypes to hereWarner Losh
2022-01-28bsd-user/arm/target_arch_cpu.h: Move EXCP_ATOMIC to match linux-userWarner Losh
2022-01-28bsd-user/arm/signal.c: get_mcontext should zero vfp dataWarner Losh
2022-01-28bsd-user/arm/signal.c: Implement setup_sigframe_arch for armWarner Losh
2022-01-07bsd-user/arm/signal.c: arm get_ucontext_sigreturnWarner Losh
2022-01-07bsd-user/arm/signal.c: arm set_mcontextWarner Losh
2022-01-07bsd-user/arm/signal.c: arm get_mcontextWarner Losh
2022-01-07bsd-user/arm/signal.c: arm set_sigtramp_argsWarner Losh
2022-01-07bsd-user/arm/target_arch_signal.h: Define size of *context_tWarner Losh
2022-01-07bsd-user/arm/target_arch_signal.h: arm machine context and trapframe for signalsWarner Losh
2022-01-07bsd-user/arm/target_arch_signal.h: arm specific signal registers and stackWarner Losh
2022-01-07bsd-user/arm/target_arch_elf.h: arm get_hwcap2 implWarner Losh
2022-01-07bsd-user/arm/target_arch_elf.h: arm get hwcapWarner Losh
2022-01-07bsd-user/arm/target_arch_elf.h: arm defines for ELFWarner Losh
2022-01-07bsd-user/arm/target_arch_thread.h: Routines to create and switch to a threadWarner Losh
2022-01-07bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for armWarner Losh
2022-01-07bsd-user/arm/target_arch_vmparam.h: Parameters for arm address spaceWarner Losh
2022-01-07bsd-user/arm/target_arch_reg.h: Implement core dump register copyingWarner Losh
2022-01-07bsd-user/arm/target_arch_cpu.h: Implement system call dispatchWarner Losh
2022-01-07bsd-user/arm/target_arch_cpu.h: Implement data abort exceptionsWarner Losh
2022-01-07bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptionsWarner Losh
2022-01-07bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementationWarner Losh
2022-01-07bsd-user/arm/target_arch_cpu.h: Implement target_cpu_clone_regsWarner Losh
2022-01-07bsd-user/arm/target_arch_cpu.h: CPU Loop definitionsWarner Losh
2022-01-07bsd-user/arm/target_arch_cpu.c: Target specific TLS routinesWarner Losh
2022-01-07bsd-user/arm/target_syscall.h: Add copyright and update nameWarner Losh
2022-01-07bsd-user/arm/target_arch_sysarch.h: Use consistent include guardsWarner Losh
2021-01-11bsd-user: move strace OS/arch dependent code to host/arch dirsStacey Son