aboutsummaryrefslogtreecommitdiff
path: root/accel/tcg
AgeCommit message (Expand)Author
2017-10-24translate-all: exit from tb_phys_invalidate if qht_remove failsEmilio G. Cota
2017-10-24tcg: enable multiple TCG contexts in softmmuEmilio G. Cota
2017-10-24tcg: introduce regions to split code_gen_bufferEmilio G. Cota
2017-10-24translate-all: use qemu_protect_rwx/none helpersEmilio G. Cota
2017-10-24tcg: distribute profiling counters across TCGContext'sEmilio G. Cota
2017-10-24tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota
2017-10-24tcg: take tb_ctx out of TCGContextEmilio G. Cota
2017-10-24translate-all: report correct avg host TB sizeEmilio G. Cota
2017-10-24exec-all: rename tb_free to tb_removeEmilio G. Cota
2017-10-24translate-all: use a binary search tree to track TBs in TBContextEmilio G. Cota
2017-10-24tcg: Remove CF_IGNORE_ICOUNTRichard Henderson
2017-10-24cpu-exec: lookup/generate TB outside exclusive region during step_atomicEmilio G. Cota
2017-10-24tcg: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota
2017-10-24tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota
2017-10-24tcg: Add CPUState cflags_next_tbRichard Henderson
2017-10-24tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASKEmilio G. Cota
2017-10-20accel/tcg: allow to invalidate a write TLB entry immediatelyDavid Hildenbrand
2017-10-16tcg: Fix off-by-one in assert in page_set_flagsRichard Henderson
2017-10-10exec-all: extract tb->tc_* into a separate struct tc_tbEmilio G. Cota
2017-10-10translate-all: define and use DEBUG_TB_CHECK_GATEEmilio G. Cota
2017-10-10translate-all: define and use DEBUG_TB_INVALIDATE_GATEEmilio G. Cota
2017-10-10exec-all: introduce TB_PAGE_ADDR_FMTEmilio G. Cota
2017-10-10translate-all: define and use DEBUG_TB_FLUSH_GATEEmilio G. Cota
2017-10-10exec-all: bring tb->invalid into tb->cflagsEmilio G. Cota
2017-10-10tcg: consolidate TB lookups in tb_lookup__cpu_stateEmilio G. Cota
2017-10-10tcg: remove addr argument from lookup_tb_ptrEmilio G. Cota
2017-10-10cpu-exec: rename have_tb_lock to acquired_tb_lock in tb_findEmilio G. Cota
2017-10-10translate-all: make have_tb_lock staticEmilio G. Cota
2017-10-10tcg: fix corruption of code_time profiling counter upon tb_flushEmilio G. Cota
2017-10-10cputlb: bring back tlb_flush_count under !TLB_DEBUGEmilio G. Cota
2017-09-25accel/tcg/cputlb: avoid recursive BQL (fixes #1706296)Alex Bennée
2017-09-17accel/tcg: move USER code to user-exec.cPhilippe Mathieu-Daudé
2017-09-17accel/tcg: move atomic_template.h to accel/tcg/Philippe Mathieu-Daudé
2017-09-17accel/tcg: move tcg-runtime to accel/tcg/Philippe Mathieu-Daudé
2017-09-17accel/tcg: move user-exec to accel/tcg/Philippe Mathieu-Daudé
2017-09-17accel/tcg: move softmmu_template.h to accel/tcg/Thomas Huth
2017-09-07tcg: Infrastructure for managing constant poolsRichard Henderson
2017-09-07tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu/tcg-target.hRichard Henderson
2017-09-06tcg: Add generic translation frameworkLluís Vilanova
2017-09-04cputlb: Support generating CPU exceptions on memory transaction failuresPeter Maydell
2017-08-01trace-events: fix code style: print 0x before hex numbersVladimir Sementsov-Ogievskiy
2017-07-19tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova
2017-07-17exec: [tcg] Use different TBs according to the vCPU's dynamic tracing stateLluís Vilanova
2017-07-14translate-all: remove redundant !tcg_enabled check in dump_exec_infoEmilio G. Cota
2017-07-09tcg/aarch64: Use ADRP+ADD to compute target addressPranith Kumar
2017-07-04monitor: disable "info jit" and "info opcount" if !TCGPaolo Bonzini
2017-07-04tcg: make tcg_allowed globalYang Zhong
2017-07-04cpu: move interrupt handling out of translate-common.cPaolo Bonzini
2017-07-04tcg: move page_size_init() functionYang Zhong
2017-07-04vl: convert -tb-size to qemu_strtoulPaolo Bonzini
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-06 00:59:53 +0000