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path: root/accel/tcg/cputlb.c
AgeCommit message (Expand)Author
2019-09-25cputlb: Pass retaddr to tb_invalidate_phys_page_fastRichard Henderson
2019-09-25cputlb: Remove cpu->mem_io_vaddrRichard Henderson
2019-09-25cputlb: Handle TLB_NOTDIRTY in probe_accessRichard Henderson
2019-09-25cputlb: Merge and move memory_notdirty_write_{prepare,complete}Richard Henderson
2019-09-25cputlb: Partially inline memory_region_section_get_iotlbRichard Henderson
2019-09-25cputlb: Move NOTDIRTY handling from I/O path to TLB pathRichard Henderson
2019-09-25cputlb: Move ROM handling from I/O path to TLB pathRichard Henderson
2019-09-25cputlb: Introduce TLB_BSWAPRichard Henderson
2019-09-25cputlb: Split out load/store_memopRichard Henderson
2019-09-25cputlb: Use qemu_build_not_reached in load/store_helpersRichard Henderson
2019-09-25cputlb: Disable __always_inline__ without optimizationRichard Henderson
2019-09-03tcg: Factor out probe_write() logic into probe_access()David Hildenbrand
2019-09-03tcg: Make probe_write() return a pointer to the host pageDavid Hildenbrand
2019-09-03tcg: Enforce single page access in probe_write()David Hildenbrand
2019-09-03tcg: Check for watchpoints in probe_write()David Hildenbrand
2019-09-03cputlb: Handle watchpoints via TLB_WATCHPOINTRichard Henderson
2019-09-03cputlb: Remove double-alignment in store_helperRichard Henderson
2019-09-03cputlb: Fix size operand for tlb_fill on unaligned storeRichard Henderson
2019-09-03cputlb: Fold TLB_RECHECK into TLB_INVALID_MASKRichard Henderson
2019-09-03cputlb: Byte swap memory transaction attributeTony Nguyen
2019-09-03memory: Single byte swap along the I/O pathTony Nguyen
2019-09-03cputlb: Replace size and endian operands for MemOpTony Nguyen
2019-09-03memory: Access MemoryRegion with endiannessTony Nguyen
2019-09-03cputlb: Access MemoryRegion with MemOpTony Nguyen
2019-09-03tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen
2019-06-12cputlb: cast size_t to target_ulong before using for address masksAlex Bennée
2019-06-12cputlb: use uint64_t for interim values for unaligned loadAlex Bennée
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson
2019-06-10tcg: Create struct CPUTLBRichard Henderson
2019-06-10tcg: Fold CPUTLBWindow into CPUTLBDescRichard Henderson
2019-05-16Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190510' into stagingPeter Maydell
2019-05-10cputlb: Do unaligned store recursion to outermost functionRichard Henderson
2019-05-10cputlb: Do unaligned load recursion to outermost functionRichard Henderson
2019-05-10cputlb: Drop attribute flattenRichard Henderson
2019-05-10cputlb: Move TLB_RECHECK handling into load/store_helperRichard Henderson
2019-05-10accel/tcg: demacro cputlbAlex Bennée
2019-05-10tcg: Use tlb_fill probe from tlb_vaddr_to_hostRichard Henderson
2019-05-10tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson
2019-04-25cputlb: Fix io_readx() to respect the access_typeShahab Vahedi
2019-02-11cputlb: update TLB entry/index after tlb_fillEmilio G. Cota
2019-01-30tcg: Fix LGPL version numberThomas Huth
2019-01-28cputlb: Remove static tlb sizingRichard Henderson
2019-01-28tcg: introduce dynamic TLB sizingEmilio G. Cota
2019-01-28cputlb: do not evict empty entries to the vtlbEmilio G. Cota
2018-10-31cputlb: Remove tlb_c.pending_flushesRichard Henderson
2018-10-31cputlb: Filter flushes on already clean tlbsRichard Henderson
2018-10-31cputlb: Count "partial" and "elided" tlb flushesRichard Henderson
2018-10-31cputlb: Merge tlb_flush_page into tlb_flush_page_by_mmuidxRichard Henderson
2018-10-31cputlb: Merge tlb_flush_nocheck into tlb_flush_by_mmuidx_async_workRichard Henderson
2018-10-31cputlb: Move env->vtlb_index to env->tlb_d.vindexRichard Henderson
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