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2011-10-26Sparc: split load and store op helpersBlue Swirl
Move load and store op helpers top ldst_helper.c. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26Sparc: split MMU helpersBlue Swirl
Move MMU helpers to mmu_helper.c. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26Sparc: avoid AREG0 for CWP and PSTATE helpersBlue Swirl
Make CWP and PSTATE helpers take a parameter for CPUState instead of relying on global env. Remove wrapper functions. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23Sparc: split CWP and PSTATE op helpersBlue Swirl
Move CWP and PSTATE op helpers to win_helper.c. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23Sparc: avoid AREG0 for lazy condition code helpersBlue Swirl
Make lazy condition code helpers take a parameter for CPUState instead of relying on global env. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23Sparc: split lazy condition code handling op helpersBlue Swirl
Move lazy condition code handling op helpers to cc_helper.c. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23Sparc: avoid AREG0 for float and VIS opsBlue Swirl
Make floating point and VIS ops take a parameter for CPUState instead of relying on global env. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23Sparc: split FPU and VIS op helpersBlue Swirl
Move FPU op helpers to fop_helper.c. Move VIS op helpers to vis_helper.c, compile it only for Sparc64. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23Sparc: split helper.cBlue Swirl
Move CPU init to cpu_init.c and interrupt handling to int32_helper.c for Sparc32 and int64_helper.c for Sparc64. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Move to hw libraryJan Kiszka
No target-specific bits remaining, let's move it over. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16target-xtensa: add Avnet LX60/LX110/LX200 boardsMax Filippov
These boards carry similar hardware: SDRAM (48M for LX110, 64M for LX60, 96M for LX200), 16 Mbyte FLASH, FPGA, 10/100 Mbps Ethernet PHY and 16550 UART. FPGA may be loaded with almost any Tensilica processor. It is also used to implement Ethernet MAC, e.g. OpenCores 10/100 Mbps Ethernet MAC and LED/DIP switches access. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16target-xtensa: rename dc232b board to simMax Filippov
This is to get aligned with the linux name for this machine. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16target-xtensa: add fsf coreMax Filippov
This is FSF big endian core implemented through linux overlay. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16target-xtensa: add dc232b coreMax Filippov
This is Diamond 232L Standard Core Rev.B (LE), implemented through linux/gdb overlay. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16target-xtensa: remove hand-written xtensa cores implementationsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-14Merge remote-tracking branch 'qemu-kvm-tmp/memory/batch' into stagingAnthony Liguori
2011-10-11Introduce PortioListAvi Kivity
Add a type and methods for manipulating a list of disjoint I/O ports, used in some older hardware devices. Based on original patch by Richard Henderson. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-10-10Merge remote-tracking branch 'qmp/queue/qmp' into stagingAnthony Liguori
2011-10-08target-alpha: Add CLIPPER emulation.Richard Henderson
This is a DP264 variant, SMP capable, no unusual hardware present. The emulation does not currently include any PCI IOMMU code. Hopefully the generic support for that can be merged to HEAD soon. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-06PPC: booke timersFabien Chouteau
While working on the emulation of the freescale p2010 (e500v2) I realized that there's no implementation of booke's timers features. Currently mpc8544 uses ppc_emb (ppc_emb_timers_init) which is close but not exactly like booke (for example booke uses different SPR). Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06PPC: Add new target config for pseriesAlexander Graf
We only support -M pseries when certain prerequisites are met, such as a PPC64 guest and libfdt. To only gather these requirements in a single place, this patch introduces a new CONFIG_PSERIES variable that gets set when all prerequisites are met. Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06PPC: E500: Add PV spinning codeAlexander Graf
CPUs that are not the boot CPU need to run in spinning code to check if they should run off to execute and if so where to jump to. This usually happens by leaving secondary CPUs looping and checking if some variable in memory changed. In an environment like Qemu however we can be more clever. We can just export the spin table the primary CPU modifies as MMIO region that would event based wake up the respective secondary CPUs. That saves us quite some cycles while the secondary CPUs are not up yet. So this patch adds a PV device that simply exports the spinning table into the guest and thus allows the primary CPU to wake up secondary ones. Signed-off-by: Alexander Graf <agraf@suse.de> --- v1 -> v2: - change into MMIO scheme - map the secondary NIP instead of 0 1:1 - only map 64MB for TLB, same as u-boot - prepare code for 64-bit spinnings v2 -> v3: - remove r6 - set MAS2_M - map EA 0 - use second TLB1 entry v3 -> v4: - change to memoryops v4 -> v5: - fix endianness bugs v5 -> v6: - add header
2011-10-06PPC: Move openpic to target specific code compilationAlexander Graf
The MPIC has some funny feature where it maps different registers to an MMIO region depending which CPU accesses them. To be able to reflect that, we need to make OpenPIC be compiled in the target code, so it can access cpu_single_env. Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-04qapi: use middle mode in QMP serverAnthony Liguori
Use the new middle mode within the existing QMP server. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2011-09-16build: Move tracing objects into libuser on usermode emulation targetsLluís Vilanova
This will apply libuser-specific compilation flags (like the ones added by --enable-user-pie), but keep softmmu emulation targets "as-is". Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-09-10target-xtensa: add dc232b core and boardMax Filippov
This is Diamond 232L Standard Core Rev.B (LE). Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10target-xtensa: implement SIMCALLMax Filippov
Tensilica iss provides support for applications running in freestanding environment through SIMCALL command. It is used by Tensilica libc to access argc/argv, for file I/O, etc. Note that simcalls that accept buffer addresses expect virtual addresses. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10target-xtensa: add sample boardMax Filippov
Sample board and sample CPU core are used for debug and may be used for development of custom SoC emulators. This board has two fixed size memory regions for DTCM and ITCM and variable length SRAM region. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10target-xtensa: add target stubsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10g364fb: compile in hwlibBlue Swirl
Compile g364fb in hwlib. Two compilations less for the full build. Acked-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-04ReadWriteHandler: removeAvi Kivity
No longer used. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-09-02Rename qemu -> qemu-system-i386Anthony Liguori
This has been discussed before in the past. The special casing really makes no sense anymore. This seems like a good change to make for 1.0. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-09-01trace: [configure] rename CONFIG_*_TRACE into CONFIG_TRACE_*Lluís
Provides a more hierarchical view of the variable domain. Also adds the CONFIG_TRACE_* variables for all backends. [Stefan added missing 'test' in stap if statement] Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-09-01build: Fix linkage of QEMU_PROGLluís
Using '$^' to establish the files to link with will remove any repeated entries in the list of dependencies. Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
2011-08-27Fix build on OpenBSD with BSD userland emu and smartcard NSS enabledBrad
The first issue is the hard coded POSIX Real Time extensions library in the libcacard/Makefile. From looking at the code it doesn't seem this is necessary anyway. Robert Relyea seems to think it most likely isn't necessary. The second issue was the missing exclusion of the BSD userland binary builds from the addition of this Makefile target for the smartcard NSS code which breaks the builds if smartcard NSS support is enabled. pastebin clip of the build failure.. http://pastebin.com/raw.php?i=BLCKd3s6 Signed-off-by: Brad Smith <brad@comstyle.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-25Revert "Merge remote-tracking branch 'qemu-kvm/memory/batch' into staging"Anthony Liguori
This reverts commit 8ef9ea85a2cc1007eaefa53e6871f1f83bcef22d, reversing changes made to 444dc48298c480e42e15a8fe676be737d8a6b2a1. From Avi: Please revert the entire pull (git revert 8ef9ea85a2cc1) while I work this out - it isn't trivial. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-24ReadWriteHandler: removeAvi Kivity
No longer used. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-08-20Remove qemu_malloc/qemu_freeAnthony Liguori
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-09etrax: Remove hw/etraxfs.c.Edgar E. Iglesias
The Bare ETRAX FS board was a fictive machine that I used when developing the CRIS system emulation. Since we support the real AXIS-dev88 developer boards, there is no reason to keep the fictive one around. This commit also removes the double registration of the axis-dev88 board. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-07-30Add TCG optimizations stubKirill Batuzov
Added file tcg/optimize.c to hold TCG optimizations. Function tcg_optimize is called from tcg_gen_code_common. It calls other functions performing specific optimizations. Stub for constant folding was added. Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-30Add support for Zipit Z2 machineVasily Khoruzhick
Zipit Z2 is small PXA270 based handheld. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-07-29Hierarchical memory region APIAvi Kivity
The memory API separates the attributes of a memory region (its size, how reads or writes are handled, dirty logging, and coalescing) from where it is mapped and whether it is enabled. This allows a device to configure a memory region once, then hand it off to its parent bus to map it according to the bus configuration. Hierarchical registration also allows a device to compose a region out of a number of sub-regions with different properties; for example some may be RAM while others may be MMIO. Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-07-21Add hard build dependency on glibAnthony Liguori
GLib is an extremely common library that has a portable thread implementation along with tons of other goodies. GLib and GObject have a fantastic amount of infrastructure we can leverage in QEMU including an object oriented programming infrastructure. Short term, it has a very nice thread pool implementation that we could leverage in something like virtio-9p. It also has a test harness implementation that this series will use. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Luiz Capitulino <lcapitulino@gmail.com>
2011-07-20Avoid CPU endian memory accesses in devicesBlue Swirl
Don't compile virtio.c in hwlib, it depends on memory accesses performed in CPU endianness. Make loads and stores in CPU endianness unavailable to devices and poison them to avoid further bugs. Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-20Merge branch 'for-upstream' of git://git.linaro.org/people/pmaydell/qemu-armBlue Swirl
* 'for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: target-arm: Fix BASEPRI, BASEPRI_MAX, and FAULTMASK access target-arm: Minimal implementation of performance counters Revert "Makefile.target: Allow target helpers to be in any *_helper.c file" Revert "target-arm: Use global env in neon_helper.c helpers" target-arm: Pass fp status pointer explicitly to neon fp helpers target-arm: Make VFP binop helpers take pointer to fpstatus, not CPUState target-arm: Add helper function to generate code to get fpstatus pointer Revert "target-arm: Use global env in iwmmxt_helper.c helpers" Conflicts: Makefile.target
2011-07-17xen: Fold CONFIG_XEN_MAPCACHE into CONFIG_XENJan Kiszka
Xen won't be enabled if there is no backend support available for the host. And that also means the map cache will work. So drop the separate config switch and move the required stubs over to xen-stub.c. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-07-17xen: Clean up build systemJan Kiszka
Introduce CONFIG_XEN_BACKEND so that this new config solely controls the target-independent backend build and CONFIG_XEN can focus on per-target building. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-07-01Merge branch 'ppc-next' of git://repo.or.cz/qemu/agrafBlue Swirl
* 'ppc-next' of git://repo.or.cz/qemu/agraf: PPC: move TLBs to their own arrays PPC: 440: Use 440 style MMU as default, so Qemu knows the MMU type PPC: E500: Use MAS registers instead of internal TLB representation PPC: Only set lower 32bits with mtmsr PPC: update openbios firmware PPC: mpc8544ds: Add hypervisor node PPC: calculate kernel,initrd,cmdline locations dynamically target-ppc: Handle memory-forced I/O controller access PPC: E500: Implement reboot controller
2011-06-26cpu-exec.c: avoid AREG0 useBlue Swirl
Make functions take a parameter for CPUState instead of relying on global env. Pass CPUState pointer to TCG prologue, which moves it to AREG0. Thanks to Peter Maydell and Laurent Desnogues for the ARM prologue change. Revert the hacks to avoid AREG0 use on Sparc hosts. Move cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. Compile the file without HELPER_CFLAGS. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26Fix fallouts from Linux header inclusionJan Kiszka
This is an all-in-one fix for the smaller and bigger mistakes of the build system changes for accompanied Linux headers: - only enable KVM and vhost on Linux hosts - fix powerpc asm header symlink - do not use Linux headers on non-Linux hosts - fix kvmclock for !CONFIG_KVM - fix s390 build on non-Linux hosts Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Tested-by: Andreas Färber <andreas.faerber@web.de> Tested-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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