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2022-10-24m25p80: Add basic support for the SFDP commandCédric Le Goater
JEDEC STANDARD JESD216 for Serial Flash Discovery Parameters (SFDP) provides a mean to describe the features of a serial flash device using a set of internal parameter tables. This is the initial framework for the RDSFDP command giving access to a private SFDP area under the flash. This area now needs to be populated with the flash device characteristics, using a new 'sfdp_read' handler under FlashPartInfo. Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Message-Id: <20220722063602.128144-2-clg@kaod.org> Message-Id: <20221013161241.2805140-2-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-10-18Merge tag 'pull-ppc-20221017' of https://gitlab.com/danielhb/qemu into stagingStefan Hajnoczi
ppc patch queue for 2022-10-18: This queue contains improvements in the e500 and ppc4xx boards, changes in the maintainership of the project, a new QMP/HMP command and bug fixes: - Cedric is stepping back from qemu-ppc maintainership; - ppc4xx_sdram: QOMification and clean ups; - e500: add new types of flash and clean ups; - QMP/HMP: introduce dumpdtb command; - spapr_pci, booke doorbell interrupt and xvcmp* bit fixes; The 'dumpdtb' implementation is also making changes to RISC-V files that were acked by Alistair Francis and are being included in this queue. # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCY02qEgAKCRA82cqW3gMx # ZIadAQCYY9f+NFrSJBm3z4JjUaP+GmbgEjibjZW05diyKwbqzQEAjE1KXFCcd40D # 3Brs2Dm4YruaJCwb68vswVQAYteXaQ8= # =hl94 # -----END PGP SIGNATURE----- # gpg: Signature made Mon 17 Oct 2022 15:16:34 EDT # gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164 # gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164 * tag 'pull-ppc-20221017' of https://gitlab.com/danielhb/qemu: (38 commits) hw/riscv: set machine->fdt in spike_board_init() hw/riscv: set machine->fdt in sifive_u_machine_init() hw/ppc: set machine->fdt in spapr machine hw/ppc: set machine->fdt in pnv_reset() hw/ppc: set machine->fdt in pegasos2_machine_reset() hw/ppc: set machine->fdt in xilinx_load_device_tree() hw/ppc: set machine->fdt in sam460ex_load_device_tree() hw/ppc: set machine->fdt in bamboo_load_device_tree() hw/nios2: set machine->fdt in nios2_load_dtb() qmp/hmp, device_tree.c: introduce dumpdtb hw/ppc/spapr_pci.c: Use device_cold_reset() rather than device_legacy_reset() target/ppc: Fix xvcmp* clearing FI bit hw/ppc/e500: Remove if statement which is now always true hw/ppc/mpc8544ds: Add platform bus hw/ppc/mpc8544ds: Rename wrongly named method hw/ppc/e500: Reduce usage of sysbus API docs/system/ppc/ppce500: Add heading for networking chapter hw/gpio/meson: Introduce dedicated config switch for hw/gpio/mpc8xxx hw/ppc/meson: Allow e500 boards to be enabled separately ppc440_uc.c: Remove unneeded parenthesis ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-10-17MAINTAINERS: Replace my amsat.org email addressPhilippe Mathieu-Daudé
The amsat.org domain is having issues with DMARC / SPF / DKIM: https://lore.kernel.org/qemu-devel/CAMVc7JUy5NeEN0q=4zfZvn_rppgqn9wicV1z=TsLuHKS3RY3Sw@mail.gmail.com/ Consolidate all of my MAINTAINERS entries on my work address. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20221017182005.43015-1-philmd@linaro.org Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-10-17MAINTAINERS: step back from PPCCédric Le Goater
I am not active anymore on the PPC maintainership, degrade my self as standard Reviewer. Also degrade PowerNV and XIVE status since I am not funded for this work. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929180946.848721-1-clg@kaod.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-07vhost-user-blk: dynamically resize config space based on featuresDaniil Tatianin
Make vhost-user-blk backwards compatible when migrating from older VMs running with modern features turned off, the same way it was done for virtio-blk in 20764be0421c ("virtio-blk: set config size depending on the features enabled") It's currently impossible to migrate from an older VM with vhost-user-blk (with disable-legacy=off) because of errors like this: qemu-system-x86_64: get_pci_config_device: Bad config data: i=0x10 read: 41 device: 1 cmask: ff wmask: 80 w1cmask:0 qemu-system-x86_64: Failed to load PCIDevice:config qemu-system-x86_64: Failed to load virtio-blk:virtio qemu-system-x86_64: error while loading state for instance 0x0 of device '0000:00:05.0:00.0:02.0/virtio-blk' qemu-system-x86_64: load of migration failed: Invalid argument This is caused by the newer (destination) VM requiring a bigger BAR0 alignment because it has to cover a bigger configuration space, which isn't actually needed since those additional config fields are not active (write-zeroes/discard). Signed-off-by: Daniil Tatianin <d-tatianin@yandex-team.ru> Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com> Message-Id: <20220906073111.353245-6-d-tatianin@yandex-team.ru> Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-10-07virtio-blk: move config size params to virtio-blk-commonDaniil Tatianin
This way we can reuse it for other virtio-blk devices, e.g vhost-user-blk, which currently does not control its config space size dynamically. Signed-off-by: Daniil Tatianin <d-tatianin@yandex-team.ru> Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com> Message-Id: <20220906073111.353245-3-d-tatianin@yandex-team.ru> Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-10-07tests/qtest: enable tests for virtio-gpioAlex Bennée
We don't have a virtio-gpio implementation in QEMU and only support a vhost-user backend. The QEMU side of the code is minimal so it should be enough to instantiate the device and pass some vhost-user messages over the control socket. To do this we hook into the existing vhost-user-test code and just add the bits required for gpio. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Eric Auger <eric.auger@redhat.com> Message-Id: <20220408155704.2777166-1-alex.bennee@linaro.org> Message-Id: <20220802095010.3330793-23-alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-10-07hw/virtio: add vhost-user-gpio-pci boilerplateViresh Kumar
This allows is to instantiate a vhost-user-gpio device as part of a PCI bus. It is mostly boilerplate which looks pretty similar to the vhost-user-fs-pci device. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <5f560cab92d0d789b1c94295ec74b9952907d69d.1641987128.git.viresh.kumar@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220802095010.3330793-14-alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-10-07hw/virtio: add boilerplate for vhost-user-gpio deviceViresh Kumar
This creates the QEMU side of the vhost-user-gpio device which connects to the remote daemon. It is based of vhost-user-i2c code. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <5390324a748194a21bc99b1538e19761a8c64092.1641987128.git.viresh.kumar@linaro.org> [AJB: fixes for qtest, tweaks to feature bits] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Cc: Vincent Whitchurch <vincent.whitchurch@axis.com> Message-Id: <20220802095010.3330793-13-alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-10-06gdbstub: move into its own sub directoryAlex Bennée
This is in preparation of future refactoring as well as cleaning up the source tree. Aside from the minor tweaks to meson and trace.h this is pure code motion. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-43-alex.bennee@linaro.org>
2022-09-27Merge tag 'pull-request-2022-09-26' of https://gitlab.com/thuth/qemu into ↵Stefan Hajnoczi
staging * Fix emulation of the LZRF instruction * Fix "noexec" TCG test on s390x * Implement SHA-512 and random number generator instructions * Support for zPCI interpretation on s390x hosts * Removal of the "slirp" submodule # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmMx26URHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbUaOw/7Bu1ghYJyzjR8raXSzOP8KmyltKb0s0zd # rFpagZCeBiNGHAL2IaKHc3vw+oFy/TTWhrFLt+imDo2swDIIAWCb/bY2/snKX4c8 # feF0io7JTdNCWvS/9ng6qL/fGSNM6V2osYyN5fEm46DM7gC3GlAu5vP2TCVoIifw # AXDANd6XngoCAFBdixGNi0yxAmiLCou/1S+lJ7hCbx1oICPPTrzuGBwyQ+IELJOD # DUGFb+Dl4z+tv8OYRhdvoSTCz75IhsAXeny2+coffvW70BDSyhzIAtVeo2azVGvT # aOVRJt+g7H/mJ0vH20M/7pakdwvHs3zciw5oHUJSsEW1HzsqNgl+AEEUzXivipaN # LYp5//klqjjAu12hFQbzmbhD/vUw2+8mRgbJdKOz7rSrZ/K8f+jqIbbU5r8t1oyy # BqLo2i0EVBfAomzbHMD/kmrumiSNIlfSDwScAoIKAO6P3oy/Sg2twMhPlFRWAnI0 # 46dQS1rLuU0nV4tMCAQoXxRxjQXytCOhaF9G+qe9ogLufHG+Uy+j3IeunyAUl9GR # EcnRB0GFjWfZKeUsR9qev2pvgOZXeg4u+wpjGM7pmfpZw89nBqCj0UVAthXlSKoz # ru3HcuBJTBtxwYkSCsPMEDCk/FhJN0D+N205qg+6SY28R57WjTPFLvZPRmhkH03E # jN8rurLISAM= # =FeSy # -----END PGP SIGNATURE----- # gpg: Signature made Mon 26 Sep 2022 13:04:37 EDT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2022-09-26' of https://gitlab.com/thuth/qemu: Remove the slirp submodule (i.e. compile only with an external libslirp) s390x/s390-virtio-ccw: add zpcii-disable machine property s390x/pci: reflect proper maxstbl for groups of interpreted devices s390x/pci: let intercept devices have separate PCI groups s390x/pci: enable adapter event notification for interpreted devices s390x/pci: don't fence interpreted devices without MSI-X s390x/pci: enable for load/store interpretation s390x/pci: add routine to get host function handle from CLP info Update linux headers to v6.0-rc4 configure: Add -Wno-gnu-variable-sized-type-not-at-end target/s390x: support PRNO_TRNG instruction target/s390x: support SHA-512 extensions linux-user/host/s390: Add vector instructions to host_signal_write() s390x/tcg: Fix opcode for lzrf Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-09-27audio: Add sndio backendAlexandre Ratchov
sndio is the native API used by OpenBSD, although it has been ported to other *BSD's and Linux (packages for Ubuntu, Debian, Void, Arch, etc.). Signed-off-by: Brad Smith <brad@comstyle.com> Signed-off-by: Alexandre Ratchov <alex@caoua.org> Reviewed-by: Volker Rümelin <vr_qemu@t-online.de> Tested-by: Volker Rümelin <vr_qemu@t-online.de> Message-Id: <YxibXrWsrS3XYQM3@vm1.arverb.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2022-09-26Remove the slirp submodule (i.e. compile only with an external libslirp)Thomas Huth
Since QEMU 7.1 we don't support Ubuntu 18.04 anymore, so the last big important Linux distro that did not have a pre-packaged libslirp has been dismissed. All other major distros seem to have a libslirp package in their distribution already - according to repology.org: Fedora 35: 4.6.1 CentOS 8 (RHEL-8): 4.4.0 Debian 11: 4.4.0 OpenSUSE Leap 15.3: 4.3.1 Ubuntu LTS 20.04: 4.1.0 FreeBSD Ports: 4.7.0 NetBSD pkgsrc: 4.7.0 Homebrew: 4.7.0 MSYS2 mingw: 4.7.0 The only one that was still missing a libslirp package is OpenBSD - but the next version (OpenBSD 7.2 which will be shipped in October) is going to include a libslirp package. Since QEMU 7.2 will be published after OpenBSD 7.2, we should be fine there, too. So there is no real urgent need for keeping the slirp submodule in the QEMU tree anymore. Thus let's drop the slirp submodule now and rely on the libslirp packages from the distributions instead. Message-Id: <20220824151122.704946-7-thuth@redhat.com> Acked-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-09-20gitlab-ci: update aarch32/aarch64 custom runner jobsAlex Bennée
The custom runner is now using 22.04 so we can drop our hacks to deal with broken libssh and glusterfs. The provisioning scripts will be updated in a separate commit. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220914155950.804707-21-alex.bennee@linaro.org>
2022-08-31ppc/ppc405: Remove taihu machineCédric Le Goater
It has been deprecated since 7.0. Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220809153904.485018-2-clg@kaod.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-07-29hw/loongarch: Rename file 'loongson3.XXX' to 'virt.XXX'Xiaojuan Yang
1. Rename 'loongson3.c' to 'virt.c' and change the meson.build file. 2. Rename 'loongson3.rst' to 'virt.rst'. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220729073018.27037-2-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-18MAINTAINERS: Add myself as Guest Agent co-maintainerKonstantin Kostiuk
Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com> Acked-by: Michael Roth <michael.roth@amd.com>
2022-07-15Merge tag 'pull-aspeed-20220714' of https://github.com/legoater/qemu into ↵Peter Maydell
staging aspeed queue: * New ISL69259 device model * New fby35 multi-SoC machine (AST1030 BIC + AST2600 BMC) * Aspeed GPIO fixes * Extension of m25p80 with write protect bits * More avocado tests using the Aspeed SDK # gpg: Signature made Thu 14 Jul 2022 15:28:09 BST # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20220714' of https://github.com/legoater/qemu: aspeed: Add fby35-bmc slot GPIO's hw/gpio/aspeed: Don't let guests modify input pins qtest/aspeed_gpio: Add input pin modification test hw: m25p80: add tests for BP and TB bit write protect hw: m25p80: Add Block Protect and Top Bottom bits for write protect test/avocado/machine_aspeed.py: Add SDK tests docs: aspeed: Minor updates docs: aspeed: Add fby35 multi-SoC machine section aspeed: Add AST1030 (BIC) to fby35 aspeed: fby35: Add a bootrom for the BMC aspeed: Add AST2600 (BMC) to fby35 aspeed: Add fby35 skeleton aspeed: Make aspeed_board_init_flashes public aspeed: Refactor UART init for multi-SoC machines aspeed: Create SRAM name from first CPU index hw/sensor: Add Renesas ISL69259 device model hw/sensor: Add IC_DEVICE_ID to ISL voltage regulators hw/i2c/pmbus: Add idle state to return 0xff's aspeed: sbc: Allow per-machine settings Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-07-14aspeed: Add fby35 skeletonPeter Delevoryas
Signed-off-by: Peter Delevoryas <peter@pjd.dev> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220705191400.41632-6-peter@pjd.dev> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-07-13MAINTAINERS: Add myself as Guest Agent reviewerKonstantin Kostiuk
Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com> Message-Id: <20220712092715.2136898-1-kkostiuk@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
2022-07-05disas: Remove libvixl disassemblerThomas Huth
The disassembly via capstone should be superiour to our old vixl sources nowadays, so let's finally cut this old disassembler out of the QEMU source tree. Message-Id: <20220603164249.112459-1-thuth@redhat.com> Tested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-06-30Merge tag 'trivial-branch-for-7.1-pull-request' of ↵Richard Henderson
https://gitlab.com/laurent_vivier/qemu into staging trivial patches pull request 20220629 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmK8FmsSHGxhdXJlbnRA # dml2aWVyLmV1AAoJEPMMOL0/L7482EkP/19M/AAUkGqIdU9Dj7H46r+LEKtrT7Xu # jNRDDrkhVQvx42mklSB+fO/ptMKUDgxvLs4mnuZFxM7SrTOb4h5jfZzyYjk73ENQ # YZ/TLxRtxAfRCcGwso7NGyk85mwt+sBFKZXfW6qsfc9AjDphLUOblfSieeFegz69 # BUtzbMOPSMR7e54y6azJX3gCkxLytSXYgk4otSLTrL233sT7pnwPRdxKGzCTA5vs # fRxKb4p/R05lWepcjrL2d2lB1TabsV0kqmNkHDvubVWlgyoK3Vt/1dzD1UP7CrvF # WghlZWmxCHrmLlBb+VSDUa22kpfv5fi/feauuug+dya+s1Mlq8HZTL8VtjUJHwLL # 92xRPeP/RfEJdoQDuMKXP9DWAAYM03HGgR37cE5NMDCyHG0XRKOJ+i2P7DQLVDjW # QyWX6bX1WV6FovdwwMnZR9OclvKtsZnb1jlfj+G2DdKXpLliDH6DkFm8mPQTM1L7 # w53iMtK88erEc+NP6+fPbbZmySvDVUcLmcTiBceZK6Vjo4oTGNrAWP+VgjBTJaz+ # 71ulkJ6vo39ZnEQOUlWrL/yW+8sQNaeO1tO67HZZ8dgTvAnPwyvKq88jSMzGCNpz # Wpcf4yVAEvU+fP3KkEaqQqmQeK/Vc+H6044O00tcLVICkpCdN/FwRjgfZanX9CIJ # xQjxW5mkb1Z3 # =fgtJ # -----END PGP SIGNATURE----- # gpg: Signature made Wed 29 Jun 2022 02:37:55 PM +0530 # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [undefined] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [undefined] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * tag 'trivial-branch-for-7.1-pull-request' of https://gitlab.com/laurent_vivier/qemu: hw/i386/xen/xen-hvm: Inline xen_piix_pci_write_config_client() and remove it hw/i386/xen/xen-hvm: Allow for stubbing xen_set_pci_link_route() hw/ide/atapi.c: Correct typos (CD-CDROM -> CD-ROM) common-user: Only compile the common user code if have_user is set hw/pci-host/i440fx: Remove unused parameter from i440fx_init() MAINTAINERS: Add softmmu/runstate.c to "Main loop" trivial typos: namesapce Trivial: 3 char repeat typos util: Return void on iova_tree_remove qom/object: Remove circular include dependency vga: avoid crash if no default vga card Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-28MAINTAINERS: Add softmmu/runstate.c to "Main loop"Markus Armbruster
Signed-off-by: Markus Armbruster <armbru@redhat.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220615122338.340426-1-armbru@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-06-27MAINTAINERS: Collect memory device files in "Memory devices"David Hildenbrand
Xiao Guangrong doesn't have enough time to actively review or contribute to our NVDIMM implementation. Let's dissolve the "NVDIMM" section, moving relevant ACPI parts to "ACPI/SMBIOS" and moving memory device stuff into a new "Memory devices" section. Make that new section cover other memory device stuff as well. We can now drop the "hw/mem/*" rule from "ACPI/SMBIOS". Note that hw/acpi/nvdimm.c is already covered by "ACPI/SMBIOS". The following files in hw/mem don't fall into the TYPE_MEMPORY_DEVICE category: * hw/mem/cxl_type3.c is CXL specific and belongs to "Compute Express Link" * hw/mem/sparse-mem.c is already covered by "Device Fuzzing" * hw/mem/npcm7xx_mc.c is already covered by "Nuvoton NPCM7xx" Thanks Xiao for your work on NVDIMM! Cc: Ben Widawsky <ben.widawsky@intel.com> Cc: Jonathan Cameron <jonathan.cameron@huawei.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Ani Sinha <ani@anisinha.ca> Cc: Xiao Guangrong <xiaoguangrong.eric@gmail.com> Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org> Cc: Richard Henderson <richard.henderson@linaro.org> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Julia Suvorova <jusual@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20220617123151.103033-1-david@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-24vduse-blk: Implement vduse-blk exportXie Yongji
This implements a VDUSE block backends based on the libvduse library. We can use it to export the BDSs for both VM and container (host) usage. The new command-line syntax is: $ qemu-storage-daemon \ --blockdev file,node-name=drive0,filename=test.img \ --export vduse-blk,node-name=drive0,id=vduse-export0,writable=on After the qemu-storage-daemon started, we need to use the "vdpa" command to attach the device to vDPA bus: $ vdpa dev add name vduse-export0 mgmtdev vduse Also the device must be removed via the "vdpa" command before we stop the qemu-storage-daemon. Signed-off-by: Xie Yongji <xieyongji@bytedance.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20220523084611.91-7-xieyongji@bytedance.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-06-24libvduse: Add VDUSE (vDPA Device in Userspace) libraryXie Yongji
VDUSE [1] is a linux framework that makes it possible to implement software-emulated vDPA devices in userspace. This adds a library as a subproject to help implementing VDUSE backends in QEMU. [1] https://www.kernel.org/doc/html/latest/userspace-api/vduse.html Signed-off-by: Xie Yongji <xieyongji@bytedance.com> Message-Id: <20220523084611.91-6-xieyongji@bytedance.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-06-24block/export: Abstract out the logic of virtio-blk I/O processXie Yongji
Abstract the common logic of virtio-blk I/O process to a function named virtio_blk_process_req(). It's needed for the following commit. Signed-off-by: Xie Yongji <xieyongji@bytedance.com> Message-Id: <20220523084611.91-4-xieyongji@bytedance.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-06-15vfio-user: handle device interruptsJagannathan Raman
Forward remote device's interrupts to the guest Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Signed-off-by: John G Johnson <john.g.johnson@oracle.com> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Message-id: 9523479eaafe050677f4de2af5dd0df18c27cfd9.1655151679.git.jag.raman@oracle.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-06-15vfio-user: IOMMU support for remote deviceJagannathan Raman
Assign separate address space for each device in the remote processes. Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Signed-off-by: John G Johnson <john.g.johnson@oracle.com> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: afe0b0a97582cdad42b5b25636a29c523265a10a.1655151679.git.jag.raman@oracle.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-06-15vfio-user: define vfio-user-server objectJagannathan Raman
Define vfio-user object which is remote process server for QEMU. Setup object initialization functions and properties necessary to instantiate the object Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Signed-off-by: John G Johnson <john.g.johnson@oracle.com> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: e45a17001e9b38f451543a664ababdf860e5f2f2.1655151679.git.jag.raman@oracle.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-06-15vfio-user: build libraryJagannathan Raman
add the libvfio-user library as a submodule. build it as a meson subproject. libvfio-user is distributed with BSD 3-Clause license and json-c with MIT (Expat) license Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Signed-off-by: John G Johnson <john.g.johnson@oracle.com> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: c2adec87958b081d1dc8775d4aa05c897912f025.1655151679.git.jag.raman@oracle.com [Changed submodule URL to QEMU's libvfio-user mirror on GitLab. The QEMU project mirrors its dependencies so that it can provide full source code even in the event that its dependencies become unavailable. Note that the mirror repo is manually updated, so please contact me to make newer libvfio-user commits available. If I become a bottleneck we can set up a cronjob. Updated scripts/meson-buildoptions.sh to match the meson_options.txt change. Failure to do so can result in scripts/meson-buildoptions.sh being modified by the build system later on and you end up with a dirty working tree. --Stefan] Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-06-15MAINTAINERS: update Vladimir's address and repositoriesVladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Message-id: 20220526115432.138384-1-vsementsov@yandex-team.ru Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-06-14MAINTAINERS: add myself as CanoKey maintainerHongren (Zenithal) Zheng
Signed-off-by: Hongren (Zenithal) Zheng <i@zenithal.me> Message-Id: <YoY61xI0IcFT1fOP@Sun> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2022-06-11target/mips: Undeprecate nanoMIPS ISA support in QEMUStefan Pejic
nanoMIPS ISA support in QEMU is actively used by MediaTek and is planned to be maintained and potentially extended by MediaTek in future. Un-orphan nanoMIPS ISA support in QEMU by setting a maintainer from MediaTek and remove deprecation notes from documentation as well. Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com> Message-Id: <20220504110403.613168-8-stefan.pejic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-06-10MAINTAINERS: Cover hw/core/uboot_image.h within Generic Loader sectionAlistair Francis
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220509091339.26016-1-alistair.francis@wdc.com>
2022-06-06tests/tcg/loongarch64: Add hello/memory test in loongarch64 systemXiaojuan Yang
- We write a very minimal softmmu harness. - This is a very simple smoke test with no need to run a full Linux/kernel. - The Makefile.softmmu-target record the rule to run. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-43-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-06target/loongarch: Add gdb support.Xiaojuan Yang
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-42-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-06hw/loongarch: Add LoongArch ls7a rtc device supportXiaojuan Yang
This patch add ls7a rtc device support. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-39-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-06hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)Xiaojuan Yang
This patch realize the PCH-PIC interrupt controller. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-33-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-06hw/loongarch: Add LoongArch ipi interrupt support(IPI)Xiaojuan Yang
This patch realize the IPI interrupt controller. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-32-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-06hw/loongarch: Add support loongson3 virt machine type.Xiaojuan Yang
Emulate a 3A5000 board use the new loongarch instruction. 3A5000 belongs to the Loongson3 series processors. The board consists of a 3A5000 cpu model and the virt bridge. The host 3A5000 board is really complicated and contains many functions.Now for the tcg softmmu mode only part functions are emulated. More detailed info you can see https://github.com/loongson/LoongArch-Documentation Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-31-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-06target/loongarch: Add system emulation introductionXiaojuan Yang
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-19-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-06target/loongarch: Add READMESong Gao
This patch gives an introduction to the LoongArch target. Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-2-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-03MAINTAINERS: Update maintainers for Guest x86 HAXM CPUsWenchao Wang
Clean up the maintainer list. Reviewed-by: Hang Yuan <hang.yuan@intel.com> Signed-off-by: Wenchao Wang <wenchao.wang@intel.com> Message-Id: <DM6PR11MB4090A58ACCA4AD8C752AEEA587199@DM6PR11MB4090.namprd11.prod.outlook.com> [thuth: Note: Colin Xu's address bounces] Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-06-03MAINTAINERS: Change my email addressHailiang Zhang
The zhang.zhanghailiang@huawei.com email address has been stopped. Change it to my new email address. Signed-off-by: Hailiang Zhang <zhanghailiang@xfusion.com> Message-Id: <20211214075424.6920-1-zhanghailiang@xfusion.com> Acked-by: Gonglei <arei.gonglei@huawei.com> Acked-by: Zhang Chen <chen.zhang@intel.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-06-03MAINTAINERS: Update s390 vhost entriesEric Farman
Commit 7a523d96a0 ("virtio-ccw: move vhost_ccw_scsi to a separate file") introduced a new file hw/s390x/vhost-scsi-ccw.c, which received a couple comments [1][2] to update MAINTAINERS that were missed. Fix that by making the vhost CCW entries a wildcard. [1] https://lore.kernel.org/r/d8d2bbd5021076bdba444d31a6da74f507baede3.camel@linux.ibm.com/ [2] https://lore.kernel.org/r/87k0c4gb9f.fsf@redhat.com/ Signed-off-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20220525145814.2750501-1-farman@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-05-30MAINTAINERS: Add myself as the maintainer for Hyper-V VMBusMaciej S. Szmigiero
This way there is some contact point for incoming patches, and somebody to review and pick up them. Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
2022-05-13MAINTAINERS: Add entry for Compute Express Link EmulationJonathan Cameron
The CXL emulation will be jointly maintained by Ben Widawsky and Jonathan Cameron. Broken out as a separate patch to improve visibility. Signed-off-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220429144110.25167-4-Jonathan.Cameron@huawei.com>
2022-05-12nbd/server: Allow MULTI_CONN for shared writable exportsEric Blake
According to the NBD spec, a server that advertises NBD_FLAG_CAN_MULTI_CONN promises that multiple client connections will not see any cache inconsistencies: when properly separated by a single flush, actions performed by one client will be visible to another client, regardless of which client did the flush. We always satisfy these conditions in qemu - even when we support multiple clients, ALL clients go through a single point of reference into the block layer, with no local caching. The effect of one client is instantly visible to the next client. Even if our backend were a network device, we argue that any multi-path caching effects that would cause inconsistencies in back-to-back actions not seeing the effect of previous actions would be a bug in that backend, and not the fault of caching in qemu. As such, it is safe to unconditionally advertise CAN_MULTI_CONN for any qemu NBD server situation that supports parallel clients. Note, however, that we don't want to advertise CAN_MULTI_CONN when we know that a second client cannot connect (for historical reasons, qemu-nbd defaults to a single connection while nbd-server-add and QMP commands default to unlimited connections; but we already have existing means to let either style of NBD server creation alter those defaults). This is visible by no longer advertising MULTI_CONN for 'qemu-nbd -r' without -e, as in the iotest nbd-qemu-allocation. The harder part of this patch is setting up an iotest to demonstrate behavior of multiple NBD clients to a single server. It might be possible with parallel qemu-io processes, but I found it easier to do in python with the help of libnbd, and help from Nir and Vladimir in writing the test. Signed-off-by: Eric Blake <eblake@redhat.com> Suggested-by: Nir Soffer <nsoffer@redhat.com> Suggested-by: Vladimir Sementsov-Ogievskiy <v.sementsov-og@mail.ru> Message-Id: <20220512004924.417153-3-eblake@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-05-09Merge tag 'pull-target-arm-20220509' of ↵Richard Henderson
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * MAINTAINERS/.mailmap: update email for Leif Lindholm * hw/arm: add version information to sbsa-ref machine DT * Enable new features for -cpu max: FEAT_Debugv8p2, FEAT_Debugv8p4, FEAT_RAS (minimal version only), FEAT_IESB, FEAT_CSV2, FEAT_CSV2_2, FEAT_CSV3, FEAT_DGH * Emulate Cortex-A76 * Emulate Neoverse-N1 * Fix the virt board default NUMA topology # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmJ5AbsZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3vyFEACZZ6tRVJYB6YpIzI7rho9x # hVQIMTc4D5lmVetJnbLdLazifIy60oIOtSKV3Y3oj5DLMcsf6NITrPaFPWNRX3Nm # mcbTCT5FGj8i7b1CkpEylLwvRQbIaoz2GnJPckdYelxxAq1uJNog3fmoG8nVtJ1F # HfXVCVkZGQyiyr6Y2/zn3vpdp9n6/4RymN8ugizkcgIRII87DKV+DNDalw613JG4 # 5xxBOGkYzo5DZM8TgL8Ylmb5Jy9XY0EN1xpkyHFOg6gi0B3UZTxHq5SvK6NFoZLJ # ogyhmMh6IjEfhUIDCtWG9VCoPyWpOXAFoh7D7akFVB4g2SIvBvcuGzFxCAsh5q3K # s+9CgNX1SZpJQkT1jLjQlNzoUhh8lNc7QvhPWVrbAj3scc+1xVnS5MJsokEV21Cx # /bp3mFwCL+Q4gjsMKx1nKSvxLv8xlxRtIilmlfj+wvpkenIfIwHYjbvItJTlAy1L # +arx8fqImNQorxO6oMjOuAlSbNnDKup5qvwGghyu/qz/YEnGQVzN6gI324Km081L # 1u31H/B3C2rj3qMsYMp5yOqgprXi1D5c6wfYIpLD/C4UfHgIlRiprawZPDM7fAhX # vxhUhhj3e9OgkbC9yqd6SUR2Uk3YaQlp319LyoZa3VKSvjBTciFsMXXnIV1UitYp # BGtz8+FypPVkYH7zQB9c7Q== # =ey1m # -----END PGP SIGNATURE----- # gpg: Signature made Mon 09 May 2022 04:57:47 AM PDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] * tag 'pull-target-arm-20220509' of https://git.linaro.org/people/pmaydell/qemu-arm: (32 commits) hw/acpi/aml-build: Use existing CPU topology to build PPTT table hw/arm/virt: Fix CPU's default NUMA node ID qtest/numa-test: Correct CPU and NUMA association in aarch64_numa_cpu() hw/arm/virt: Consider SMP configuration in CPU topology qtest/numa-test: Specify CPU topology in aarch64_numa_cpu() qapi/machine.json: Add cluster-id hw/arm: add versioning to sbsa-ref machine DT target/arm: Define neoverse-n1 target/arm: Define cortex-a76 target/arm: Enable FEAT_DGH for -cpu max target/arm: Enable FEAT_CSV3 for -cpu max target/arm: Enable FEAT_CSV2_2 for -cpu max target/arm: Enable FEAT_CSV2 for -cpu max target/arm: Enable FEAT_IESB for -cpu max target/arm: Enable FEAT_RAS for -cpu max target/arm: Implement ESB instruction target/arm: Implement virtual SError exceptions target/arm: Enable SCR and HCR bits for RAS target/arm: Add minimal RAS registers target/arm: Enable FEAT_Debugv8p4 for -cpu max ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-13 21:23:30 +0000