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2020-06-05MAINTAINERS: add Thomas as additional s390x maintainerCornelia Huck
...because two people are better than one. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Cc: Thomas Huth <thuth@redhat.com> Message-Id: <20200525155855.225564-1-cohuck@redhat.com>
2020-06-03riscv: Initial commit of OpenTitan machineAlistair Francis
This adds a barebone OpenTitan machine to QEMU. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-05-28gitlab-ci: Move edk2 and opensbi YAML files to .gitlab-ci.d folderThomas Huth
We have a dedicated folder for the gitlab-ci - so there is no need to clutter the top directory with these .yml files. Message-Id: <20200525131823.715-5-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-05-28MAINTAINERS: Add Philippe, Alex and Wainer to the Gitlab-CI sectionThomas Huth
Initially, I was the only one who was using Gitlab while most developers had their git trees still on other systems, but that has changed nowadays. There is now much more interest in the Gitlab-CI today, so it would be good to have more than only one maintainer / reviewer for the gitlab-ci.yml file. Alex, Wainer and Philippe kindly offered their help here, so let's add them to the corresponding section in the MAINTAINERS file now. Message-Id: <20200210155115.9371-1-thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-05-26MAINTAINERS: Change Aleksandar Rikalo's email addressAleksandar Markovic
Aleksandar Rikalo wants to use a different email address from now on. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200518200920.17344-18-aleksandar.qemu.devel@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/mips: Rename malta/mipssim/r4k/jazz filesAleksandar Markovic
Machine file names should not have prefix "mips_". Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200518200920.17344-22-aleksandar.qemu.devel@gmail.com> [PMD: Fixed Fuloong line conflict due to rebase] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26hw/mips/fuloong2e: Fix typo in Fuloong machine namePhilippe Mathieu-Daudé
We always miswrote the Fuloong machine... Fix its name. Add an machine alias to the previous name for backward compatibility. Suggested-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200526104726.11273-11-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-05-26MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainerHuacai Chen
I submitted the MIPS/fuloong2e support about ten years ago, and after that I became a MIPS kernel developer. Last year, Philippe Mathieu- Daudé asked me that whether I can be a reviewer of MIPS/fuloong2e, and I promised that I will do some QEMU work in the next year (i.e., 2020 and later). I think now (and also in future) I can have some spare time, so I can finally do some real work on QEMU/MIPS. And if possible, I hope I can be a co-maintainer of MIPS/fuloong2e. Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Message-Id: <1586337380-25217-3-git-send-email-chenhc@lemote.com> [PMD: Added Jiaxun Yang as reviewer] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200510210128.18343-2-f4bug@amsat.org>
2020-05-21hw: Move i.MX watchdog driver to hw/watchdogGuenter Roeck
In preparation for a full implementation, move i.MX watchdog driver from hw/misc to hw/watchdog. While at it, add the watchdog files to MAINTAINERS. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200517162135.110364-2-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-21docs/system: Document Musca boardsPeter Maydell
Provide a minimal documentation of the Musca boards. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200507151819.28444-6-peter.maydell@linaro.org
2020-05-21docs/system: Document the various MPS2 modelsPeter Maydell
Add basic documentation of the MPS2 board models. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200507151819.28444-5-peter.maydell@linaro.org
2020-05-21docs/system: Document Arm Versatile Express boardsPeter Maydell
Provide a minimal documentation of the Versatile Express boards (vexpress-a9, vexpress-a15). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200507151819.28444-4-peter.maydell@linaro.org
2020-05-21tests/acceptance: Add a test for the canon-a1100 machineThomas Huth
The canon-a1100 machine can be used with the Barebox firmware. The QEMU Advent Calendar 2018 features a pre-compiled image which we can use for testing. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Tested-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200514190422.23645-1-f4bug@amsat.org Message-Id: <20200129090420.13954-1-thuth@redhat.com> [PMD: Rebased MAINTAINERS] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-19blockdev: Split off basic bitmap operations for qemu-imgEric Blake
Upcoming patches want to add some basic bitmap manipulation abilities to qemu-img. But blockdev.o is too heavyweight to link into qemu-img (among other things, it would drag in block jobs and transaction support - qemu-img does offline manipulation, where atomicity is less important because there are no concurrent modifications to compete with), so it's time to split off the bare bones of what we will need into a new file block/monitor/bitmap-qmp-cmds.o. This is sufficient to expose 6 QMP commands for use by qemu-img (add, remove, clear, enable, disable, merge), as well as move the three helper functions touched in the previous patch. Regarding MAINTAINERS, the new file is automatically part of block core, but also makes sense as related to other dirty bitmap files. Signed-off-by: Eric Blake <eblake@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-Id: <20200513011648.166876-6-eblake@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
2020-05-19bitmaps: Update maintainerEric Blake
Dirty bitmaps are important to incremental backups, including exposure over NBD where I'm already maintainer. Also, I'm aware that lately I have been doing as much code/review on bitmaps as John Snow who is trying to scale back in order to focus elsewhere; and many of the recent patches have come from Vladimir, who is also interested in taking on maintainer duties, but would like to start with co-maintainership. Therefore, it's time to revamp the ownership of this category, as agreed between the three of us. Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <20200514180003.325406-1-eblake@redhat.com> Acked-by: John Snow <jsnow@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com>
2020-05-15MAINTAINERS: update the orphaned cpus-common.c fileAlex Bennée
We forgot to update MAINTAINERS when this code was re-factored. Fixes: 267f685b8b Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200513173200.11830-5-alex.bennee@linaro.org>
2020-05-14Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20200514' into staging target-arm queue: * target/arm: Use correct GDB XML for M-profile cores * target/arm: Code cleanup to use gvec APIs better * aspeed: Add support for the sonorapass-bmc board * target/arm: Support reporting KVM host memory errors to the guest via ACPI notifications * target/arm: Finish conversion of Neon 3-reg-same insns to decodetree # gpg: Signature made Thu 14 May 2020 15:19:15 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200514: (45 commits) target/arm: Convert NEON VFMA, VFMS 3-reg-same insns to decodetree target/arm: Convert Neon fp VMAX/VMIN/VMAXNM/VMINNM/VRECPS/VRSQRTS to decodetree target/arm: Move 'env' argument of recps_f32 and rsqrts_f32 helpers to usual place target/arm: Convert Neon 3-reg-same compare insns to decodetree target/arm: Convert Neon fp VMUL, VMLA, VMLS 3-reg-same insns to decodetree target/arm: Convert Neon VPMIN/VPMAX/VPADD float 3-reg-same insns to decodetree target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree target/arm: Convert Neon VQDMULH/VQRDMULH 3-reg-same to decodetree target/arm: Convert Neon VPADD 3-reg-same insns to decodetree target/arm: Convert Neon VPMAX/VPMIN 3-reg-same insns to decodetree target/arm: Convert Neon VQSHL, VRSHL, VQRSHL 3-reg-same insns to decodetree target/arm: Convert Neon VRHADD, VHSUB 3-reg-same insns to decodetree target/arm: Convert Neon VABA/VABD 3-reg-same to decodetree target/arm: Convert Neon VHADD 3-reg-same insns target/arm: Convert Neon 64-bit element 3-reg-same insns target/arm: Convert Neon 3-reg-same SHA to decodetree target/arm: Convert Neon 3-reg-same VQRDMLAH/VQRDMLSH to decodetree MAINTAINERS: Add ACPI/HEST/GHES entries target-arm: kvm64: handle SIGBUS signal from kernel or KVM ACPI: Record Generic Error Status Block(GESB) table ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-14MAINTAINERS: Add ACPI/HEST/GHES entriesDongjiu Geng
I and Xiang are willing to review the APEI-related patches and volunteer as the reviewers for the HEST/GHES part. Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com> Signed-off-by: Xiang Zheng <zhengxiang9@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200512030609.19593-11-gengdongjiu@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-14MAINTAINERS: Add myself as streams maintainerEdgar E. Iglesias
Since we're missing a maintainer, add myself. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200506082513.18751-10-edgar.iglesias@gmail.com>
2020-05-14MAINTAINERS: Upgrade myself as 9pfs co-maintainerChristian Schoenebeck
As suggested by Greg, let's upgrade myself as co-maintainer of 9pfs. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <E1jEYz4-0004pt-Cs@lizzy.crudebyte.com> Signed-off-by: Greg Kurz <groug@kaod.org>
2020-05-04MAINTAINERS: Update Keith Busch's email addressPhilippe Mathieu-Daudé
keith.busch@intel.com address is being rejected. Replace by the email address Keith is actively using. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Keith Busch <kbusch@kernel.org> Message-Id: <20200421122236.24867-1-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-05-04MAINTAINERS: Mark the LatticeMico32 target as orphanPhilippe Mathieu-Daudé
Michael Walle expressed his desire to orphan the lm32 target [*]: I guess it is time to pull the plug. Mainly, because I have no time for this anymore. I've always worked on this on my spare time and life changed. And secondly, I guess RISC-V is taking over ;) It has a far better ecosystem. Also, to my knowledge the only (public) user of LM32 is milkymist and this project is dead for years now.. So time to say goodbye. It was fun and I've learned a lot - technically and also how a huge open source project works. Thank you everyone for that :) Basically everything still works and there are even TCG test cases which covers all instructions the processor has. Many thanks to Michael for his substantial contributions to QEMU, and for maintaining the LM32 target for various years! [*] https://www.mail-archive.com/qemu-devel@nongnu.org/msg605024.html Acked-by: Michael Walle <michael@walle.cc> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316142827.20867-1-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-04-30Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20200430-1' into staging target-arm queue: * xlnx-zdma: Fix endianness handling of descriptor loading * nrf51: Fix last GPIO CNF address * gicv3: Use gicr_typer in arm_gicv3_icc_reset * msf2: Add EMAC block to SmartFusion2 SoC * New clock modelling framework * hw/arm: versal: Setup the ADMA with 128bit bus-width * Cadence: gem: fix wraparound in 64bit descriptors * cadence_gem: clear RX control descriptor * target/arm: Vectorize integer comparison vs zero * hw/arm/virt: dt: add kaslr-seed property * hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes # gpg: Signature made Thu 30 Apr 2020 15:43:54 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200430-1: (30 commits) hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes hw/arm: xlnx-zcu102: Move arm_boot_info into XlnxZCU102 device_tree: Constify compat in qemu_fdt_node_path() device_tree: Allow name wildcards in qemu_fdt_node_path() target/arm/cpu: Update coding style to make checkpatch.pl happy target/arm: Make cpu_register() available for other files target/arm: Restrict the Address Translate write operation to TCG accel hw/arm/virt: dt: add kaslr-seed property hw/arm/virt: dt: move creation of /secure-chosen to create_fdt() target/arm: Vectorize integer comparison vs zero net: cadence_gem: clear RX control descriptor Cadence: gem: fix wraparound in 64bit descriptors hw/arm: versal: Setup the ADMA with 128bit bus-width qdev-monitor: print the device's clock with info qtree hw/arm/xilinx_zynq: connect uart clocks to slcr hw/char/cadence_uart: add clock support hw/misc/zynq_slcr: add clock generation for uarts docs/clocks: add device's clock documentation qdev-clock: introduce an init array to ease the device construction qdev: add clock input&output support to devices. ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30hw/net: Add Smartfusion2 emac blockSubbaraya Sundeep
Modelled Ethernet MAC of Smartfusion2 SoC. Micrel KSZ8051 PHY is present on Emcraft's SOM kit hence same PHY is emulated. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1587048891-30493-2-git-send-email-sundeep.lkml@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-29s390x: protvirt: Support unpack facilityJanosch Frank
The unpack facility provides the means to setup a protected guest. A protected guest cannot be introspected by the hypervisor or any user/administrator of the machine it is running on. Protected guests are encrypted at rest and need a special boot mechanism via diag308 subcode 8 and 10. Code 8 sets the PV specific IPLB which is retained separately from those set via code 5. Code 10 is used to unpack the VM into protected memory, verify its integrity and start it. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Co-developed-by: Christian Borntraeger <borntraeger@de.ibm.com> [Changes to machine] Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20200323083606.24520-1-frankja@linux.ibm.com> [CH: fixed up KVM_PV_VM_ -> KVM_PV_] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2020-04-14scripts/run-coverity-scan: Script to run Coverity Scan buildPeter Maydell
Add a new script to automate the process of running the Coverity Scan build tools and uploading the resulting tarball to the website. This is intended eventually to be driven from Travis, but it can be run locally, if you are a maintainer of the QEMU project on the Coverity Scan website and have the secret upload token. The script must be run on a Fedora 30 system. Support for using a Docker container is added in a following commit. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200319193323.2038-6-peter.maydell@linaro.org
2020-04-13MAINTAINERS: Add myself as vhost-user-blk maintainerRaphael Norwitz
As suggested by Michael, let's add me as a maintainer of vhost-user-blk and vhost-user-scsi. CC: Michael S. Tsirkin <mst@redhat.com> CC Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Raphael Norwitz <raphael.norwitz@nutanix.com> Message-Id: <1585213047-20089-1-git-send-email-raphael.norwitz@nutanix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-04-07Merge remote-tracking branch 'remotes/stsquad/tags/pull-misc-fixes-070420-1' ↵Peter Maydell
into staging Various fixes: - add .github repo lockdown config - better handle missing symbols in elf-ops - protect fcntl64 with #ifdef - remove unused macros from test - fix handling of /proc/self/maps - avoid BAD_SHIFT in x80 softfloat - properly terminate on .hex EOF - fix configure probe on windows cross build - fix %r12 guest_base initialization # gpg: Signature made Tue 07 Apr 2020 16:31:14 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-misc-fixes-070420-1: tcg/i386: Fix %r12 guest_base initialization configure: Add -Werror to PIE probe hw/core: properly terminate loading .hex on EOF record linux-user: clean-up padding on /proc/self/maps linux-user: factor out reading of /proc/self/maps softfloat: Fix BAD_SHIFT from normalizeFloatx80Subnormal gdbstub: fix compiler complaining target/xtensa: add FIXME for translation memory leak linux-user: more debug for init_guest_space tests/tcg: remove extraneous pasting macros linux-user: protect fcntl64 with an #ifdef elf-ops: bail out if we have no function symbols .github: Enable repo-lockdown bot to refuse GitHub pull requests Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-07.github: Enable repo-lockdown bot to refuse GitHub pull requestsPhilippe Mathieu-Daudé
Some GitHub users try to open pull requests against the GitHub mirror. Unfortunate these get ignored until eventually someone notices and closes the request. Enable the 'Repo Lockdown' [*] 3rd party bot which can autorespond to pull requests with a friendly comment, close the request, and then lock it to prevent further comments. [*] https://github.com/dessant/repo-lockdown Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: John Snow <jsnow@redhat.com> Message-Id: <20200406214125.18538-1-f4bug@amsat.org> [AJB: s/fill/file/ and point at canonical qemu.org/contribute] Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2020-04-07MAINTAINERS: Add xen-usb.c to Xen sectionAnthony PERARD
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20200406165043.1447837-1-anthony.perard@citrix.com>
2020-04-04scripts/coccinelle: add error-use-after-free.cocciVladimir Sementsov-Ogievskiy
Add script to find and fix trivial use-after-free of Error objects. How to use: spatch --sp-file scripts/coccinelle/error-use-after-free.cocci \ --macro-file scripts/cocci-macro-file.h --in-place \ --no-show-diff ( FILES... | --use-gitgrep . ) Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20200324153630.11882-2-vsementsov@virtuozzo.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Pastos in commit message and comment fixed, globbing in MAINTAINERS expanded] Signed-off-by: Markus Armbruster <armbru@redhat.com>
2020-04-01MAINTAINERS: Add an entry for the HVF acceleratorRoman Bolshakov
Cc: Nikita Leshenko <nikita.leshchenko@oracle.com> Cc: Sergio Andres Gomez Del Real <sergio.g.delreal@gmail.com> Cc: Patrick Colp <patrick.colp@oracle.com> Cc: Cameron Esfahani <dirty@apple.com> Cc: Liran Alon <liran.alon@oracle.com> Cc: Heiher <r@hev.cc> Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Message-Id: <20200316171825.42544-1-r.bolshakov@yadro.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-29MAINTAINERS: Add myself as virtio-balloon co-maintainerDavid Hildenbrand
As suggested by Michael, let's add me as co-maintainer of virtio-balloon. While at it, also add "balloon.c" and "include/sysemu/balloon.h" to the file list. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20200312133725.8192-1-david@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-03-23Documentation: create/move s390x documentationCornelia Huck
Create a subdirectory for s390x under docs/system/ and move the existing vfio-ap documentation there. Create an initial document describing s390x system emulation. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Message-Id: <20200318103940.1169-1-cohuck@redhat.com>
2020-03-20Merge remote-tracking branch ↵Peter Maydell
'remotes/vivier2/tags/linux-user-for-5.0-pull-request' into staging update syscall numbers to linux 5.5 (with scripts) add clock_gettime64/clock_settime64 add AT_EXECFN v4: restore syscall.tbl series but remove vsyscall series v3: remove syscall.tbl series v2: guard copy_to_user_timezone() with TARGET_NR_gettimeofday remove "Support futex_time64" patch guard sys_futex with TARGET_NR_exit # gpg: Signature made Fri 20 Mar 2020 15:23:29 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-5.0-pull-request: (32 commits) linux-user, openrisc: sync syscall numbers with kernel v5.5 linux-user, nios2: sync syscall numbers with kernel v5.5 linux-user, aarch64: sync syscall numbers with kernel v5.5 scripts: add a script to generate syscall_nr.h linux-user,mips: update syscall-args-o32.c.inc linux-user,mips: move content of mips_syscall_args linux-user: update syscall.tbl from linux 0bf999f9c5e7 linux-user, scripts: add a script to update syscall.tbl linux-user, mips64: add syscall table generation support linux-user, mips: add syscall table generation support linux-user, x86_64: add syscall table generation support linux-user, i386: add syscall table generation support linux-user, x86_64, i386: cleanup TARGET_NR_arch_prctl linux-user, sparc, sparc64: add syscall table generation support linux-user, s390x: add syscall table generation support linux-user, s390x: remove syscall definitions for !TARGET_S390X linux-user, ppc: add syscall table generation support linux-user, arm: add syscall table generation support linux-user, microblaze: add syscall table generation support linux-user, sh4: add syscall table generation support ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-20scripts: add a script to generate syscall_nr.hLaurent Vivier
This script is needed for targets based on asm-generic syscall numbers generation Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316085620.309769-2-laurent@vivier.eu> [lv: added file in MAINTAINERS]
2020-03-20linux-user,mips: update syscall-args-o32.c.incLaurent Vivier
Add a script to update the file from strace github and run it Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20200310103403.3284090-22-laurent@vivier.eu> [lv: added file in MAINTAINERS] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-03-20linux-user, scripts: add a script to update syscall.tblLaurent Vivier
scripts/update-syscalltbl.sh has the list of syscall.tbl to update and can copy them from the linux source directory Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200310103403.3284090-19-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-03-20Merge remote-tracking branch ↵Peter Maydell
'remotes/ehabkost/tags/python-next-pull-request' into staging Python queue for 5.0 soft freeze * Add scripts/simplebench (Vladimir Sementsov-Ogievskiy) # gpg: Signature made Wed 18 Mar 2020 01:11:49 GMT # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/python-next-pull-request: MAINTAINERS: add simplebench scripts/simplebench: add example usage of simplebench scripts/simplebench: add qemu/bench_block_job.py scripts/simplebench: add simplebench.py Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-19MAINTAINERS: Add entry for the Renesas RX architectureYoshinori Sato
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200224141923.82118-2-ysato@users.sourceforge.jp> Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-03-17MAINTAINERS: add simplebenchVladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <20200228071914.11746-5-vsementsov@virtuozzo.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-17Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
* Bugfixes all over the place * get/set_uint cleanups (Felipe) * Lock guard support (Stefan) * MemoryRegion ownership cleanup (Philippe) * AVX512 optimization for buffer_is_zero (Robert) # gpg: Signature made Tue 17 Mar 2020 15:01:54 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (62 commits) hw/arm: Let devices own the MemoryRegion they create hw/arm: Remove unnecessary memory_region_set_readonly() on ROM alias hw/ppc/ppc405: Use memory_region_init_rom() with read-only regions hw/arm/stm32: Use memory_region_init_rom() with read-only regions hw/char: Let devices own the MemoryRegion they create hw/riscv: Let devices own the MemoryRegion they create hw/dma: Let devices own the MemoryRegion they create hw/display: Let devices own the MemoryRegion they create hw/core: Let devices own the MemoryRegion they create scripts/cocci: Patch to let devices own their MemoryRegions scripts/cocci: Patch to remove unnecessary memory_region_set_readonly() scripts/cocci: Patch to detect potential use of memory_region_init_rom hw/sparc: Use memory_region_init_rom() with read-only regions hw/sh4: Use memory_region_init_rom() with read-only regions hw/riscv: Use memory_region_init_rom() with read-only regions hw/ppc: Use memory_region_init_rom() with read-only regions hw/pci-host: Use memory_region_init_rom() with read-only regions hw/net: Use memory_region_init_rom() with read-only regions hw/m68k: Use memory_region_init_rom() with read-only regions hw/display: Use memory_region_init_rom() with read-only regions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-17Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-mar-17-2020' ↵Peter Maydell
into staging MIPS queue for March 17th, 2020 # gpg: Signature made Tue 17 Mar 2020 12:53:50 GMT # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [full] # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-mar-17-2020: MAINTAINERS: Add a file to the main MIPS section MAINTAINERS: Adjust maintainer's email MAINTAINERS: Adjust maintainer's status for some MIPS items Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-17scripts/cocci: Rename memory-region-{init-ram -> housekeeping}Philippe Mathieu-Daudé
As we are going to add various semantic changes related to the memory region API, rename this script to be more generic. Add a 'usage' header, and an entry in MAINTAINERS to avoid checkpatch warning. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-03-17MAINTAINERS: Add a file to the main MIPS sectionAleksandar Markovic
A recently added acceptance test is important not only for Malta machine, but for overall MIPS target, since it tests smp feature. CC: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <1584061252-16635-4-git-send-email-aleksandar.markovic@rt-rk.com>
2020-03-17MAINTAINERS: Adjust maintainer's emailAleksandar Markovic
For some longish time I've been using multiple email addresses for mailing list communication, and would like to consolidate it into a single email address that is the most convenient to me. My other emails, from rt-rk.com and wavecomp.com domains remain active and I will respond from them too, if needed, but I would like to manage almost all communication using gmail.com account. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <1584061252-16635-3-git-send-email-aleksandar.markovic@rt-rk.com>
2020-03-17MAINTAINERS: Adjust maintainer's status for some MIPS itemsAleksandar Markovic
Aurelien has been and will forever remain an idol in QEMU for MIPS world. However, since he decided to move on to other projects, acknowledge the reality, and formally releive him from maintainer's duties for QEMU for MIPS items. Aurelien is though welcome to come back at any time. Some empty spots caused by this are filled in by Aleksandar. CC: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <1584061252-16635-2-git-send-email-aleksandar.markovic@rt-rk.com>
2020-03-17hw/usb: Add basic i.MX USB Phy supportGuenter Roeck
Add basic USB PHY support as implemented in i.MX23, i.MX28, i.MX6, and i.MX7 SoCs. The only support really needed - at least to boot Linux - is support for soft reset, which needs to reset various registers to their initial value. Otherwise, just record register values. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200313014551.12554-2-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-16MAINTAINERS: Add entry for Guest X86 HAXM CPUsColin Xu
HAXM covers below files: include/sysemu/hax.h target/i386/hax-* V2: Add HAXM github page for wiki and issue tracking. Cc: Wenchao Wang <wenchao.wang@intel.com> Cc: Hang Yuan <hang.yuan@intel.com> Reviewed-by: Hang Yuan <hang.yuan@intel.com> Signed-off-by: Colin Xu <colin.xu@intel.com> Message-Id: <20200228012046.6629-1-colin.xu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-12docs: add Orange Pi PC documentNiek Linnenbank
The Xunlong Orange Pi PC machine is a functional ARM machine based on the Allwinner H3 System-on-Chip. It supports mainline Linux, U-Boot, NetBSD and is covered by acceptance tests. This commit adds a documentation text file with a description of the machine and instructions for the user. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-19-nieklinnenbank@gmail.com [PMM: moved file into docs/system/arm to match the reorg of the arm target part of the docs; tweaked heading to match other boards] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>