aboutsummaryrefslogtreecommitdiff
path: root/MAINTAINERS
AgeCommit message (Collapse)Author
2020-12-16i386: move kvm accel files into kvm/Claudio Fontana
Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201212155530.23098-2-cfontana@suse.de> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ↵Peter Maydell
staging * New -action option and set-action QMP command (Alejandro) * More vl.c cleanup (myself with help from Daniel and Igor) * Remove deprecated options (Philippe, Thomas) * Dirty bitmap fix (Zenghui) * icount caching speedup (Pavel) * SCSI race fix (Maxim) * Remove pre-GCC 4.8 code (Marc-André) # gpg: Signature made Tue 15 Dec 2020 17:53:24 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (45 commits) build: -no-pie is no functional linker flag scripts/git.orderfile: Keep files with .inc extension sorted compiler.h: remove QEMU_GNUC_PREREQ linux-user: remove GNUC check compiler: remove GNUC check xen: remove GNUC check poison: remove GNUC check compiler.h: explicit case for Clang printf attribute virtiofsd: replace _Static_assert with QEMU_BUILD_BUG_ON tests: remove GCC < 4 fallbacks qemu-plugin.h: remove GCC < 4 compiler.h: remove GCC < 3 __builtin_expect fallback accel/tcg: Remove special case for GCC < 4.6 qemu/atomic: Drop special case for unsupported compiler hw/core: Restrict 'fw-path-provider.c' to system mode emulation docs: set CONFDIR when running sphinx vl: rename local variable in configure_accelerators qemu-option: pass QemuOptsList to opts_accepts_any qemu-option: simplify search for end of key kvm: Take into account the unaligned section size when preparing bitmap ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # softmmu/vl.c
2020-12-15qmp: generalize watchdog-set-action to -no-reboot/-no-shutdownAlejandro Jimenez
Add a QMP command to allow for the behaviors specified by the -no-reboot and -no-shutdown command line option to be set at runtime. The new command is named set-action and takes optional arguments, named after an event, that provide a corresponding action to take. Example: -> { "execute": "set-action", "arguments": { "reboot": "none", "shutdown": "poweroff", "watchdog": "debug" } } <- { "return": {} } Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com> Message-Id: <1607705564-26264-4-git-send-email-alejandro.j.jimenez@oracle.com> [Split the series differently, with -action based on the QMP command. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-15Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20201215' into staging target-arm queue: * gdbstub: Correct misparsing of vCont C/S requests * openrisc: Move pic_cpu code into CPU object proper * nios2: Move IIC code into CPU object proper * Improve reporting of ROM overlap errors * xlnx-versal: Add USB support * hw/misc/zynq_slcr: Avoid #DIV/0! error * Numonyx: Fix dummy cycles and check for SPI mode on cmds # gpg: Signature made Tue 15 Dec 2020 13:59:46 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201215: hw/block/m25p80: Fix Numonyx fast read dummy cycle count hw/block/m25p80: Check SPI mode before running some Numonyx commands hw/block/m25p80: Fix when VCFG XIP bit is set for Numonyx hw/block/m25p80: Make Numonyx config field names more accurate hw/misc/zynq_slcr: Avoid #DIV/0! error arm: xlnx-versal: Connect usb to virt-versal usb: xlnx-usb-subsystem: Add xilinx usb subsystem usb: Add DWC3 model usb: Add versal-usb2-ctrl-regs module elf_ops.h: Be more verbose with ROM blob names elf_ops.h: Don't truncate name of the ROM blobs we create hw/core/loader.c: Improve reporting of ROM overlap errors hw/core/loader.c: Track last-seen ROM in rom_check_and_register_reset() target/nios2: Use deposit32() to update ipending register target/nios2: Move nios2_check_interrupts() into target/nios2 target/nios2: Move IIC code into CPU object proper target/openrisc: Move pic_cpu code into CPU object proper hw/openrisc/openrisc_sim: Abstract out "get IRQ x of CPU y" hw/openrisc/openrisc_sim: Use IRQ splitter when connecting IRQ to multiple CPUs gdbstub: Correct misparsing of vCont C/S requests Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-15Merge remote-tracking branch ↵Peter Maydell
'remotes/ehabkost/tags/machine-next-pull-request' into staging Machine queue, 2020-12-15 * qdev code cleanup * Convert some QOM instance properties to class properties * Update git URLs on MAINTAINERS # gpg: Signature made Tue 15 Dec 2020 15:18:47 GMT # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: (25 commits) MAINTAINERS: Update my git repository URLs qdev: Move UUID property to qdev-properties-system.c qdev: Make qdev_propinfo_get_uint16() static qdev: Make error_set_from_qdev_prop_error() get Object* argument qdev: Make check_prop_still_unset() get Object* argument qdev: Make qdev_find_global_prop() get Object* argument qdev: Make qdev_get_prop_ptr() get Object* arg qdev: Make bit_prop_set() get Object* argument qdev: Make PropertyInfo.print method get Object* argument qdev: Don't use dev->id on set_size32() error message sparc: Check dev->realized at sparc_set_nwindows() qdev: Check dev->realized at set_size() qdev: Move property code to qdev-properties.[ch] cpu: Move cpu_common_props to hw/core/cpu.c cs4231: Get rid of empty property array netfilter: Use class properties netfilter: Reorder functions can_host: Use class properties arm/cpu64: Register "aarch64" as class property virt: Register "its" as class property ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-15MAINTAINERS: Update my git repository URLsEduardo Habkost
I'm moving my git repositories to gitlab.com, update MAINTAINERS to point to the correct URL. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20201214212032.2999853-1-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15target/nios2: Move IIC code into CPU object properPeter Maydell
The Nios2 architecture supports two different interrupt controller options: * The IIC (Internal Interrupt Controller) is part of the CPU itself; it has 32 IRQ input lines and no NMI support. Interrupt status is queried and controlled via the CPU's ipending and istatus registers. * The EIC (External Interrupt Controller) interface allows the CPU to connect to an external interrupt controller. The interface allows the interrupt controller to present a packet of information containing: - handler address - interrupt level - register set - NMI mode QEMU does not model an EIC currently. We do model the IIC, but its implementation is split across code in hw/nios2/cpu_pic.c and hw/intc/nios2_iic.c. The code in those two files has no state of its own -- the IIC state is in the Nios2CPU state struct. Because CPU objects now inherit (indirectly) from TYPE_DEVICE, they can have GPIO input lines themselves, so we can implement the IIC directly in the CPU object the same way that real hardware does. Create named "IRQ" GPIO inputs to the Nios2 CPU object, and make the only user of the IIC wire up directly to those instead. Note that the old code had an "NMI" concept which was entirely unused and also as far as I can see not architecturally correct, since only the EIC has a concept of an NMI. This fixes a Coverity-reported trivial memory leak of the IRQ array allocated in nios2_cpu_pic_init(). Fixes: Coverity CID 1421916 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201129174022.26530-2-peter.maydell@linaro.org Reviewed-by: Wentong Wu <wentong.wu@intel.com> Tested-by: Wentong Wu <wentong.wu@intel.com>
2020-12-14Merge remote-tracking branch ↵Peter Maydell
'remotes/vivier2/tags/trivial-branch-for-6.0-pull-request' into staging Pull request trivial-patches 20201214 # gpg: Signature made Mon 14 Dec 2020 15:52:07 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.0-pull-request: configure / meson: Move check for linux/btrfs.h to meson.build configure / meson: Move check for sys/kcov.h to meson.build configure / meson: Move check for sys/signal.h to meson.build configure / meson: Move check for drm.h to meson.build configure / meson: Move check for pty.h to meson.build configure: Remove the obsolete check for ifaddrs.h blockdev: Fix a memleak in drive_backup_prepare() block/file-posix: fix a possible undefined behavior elf2dmp/pdb: Plug memleak in pdb_init_from_file elf2dmp/qemu_elf: Plug memleak in QEMU_Elf_init configure: Test if $make actually exists ads7846: moves from the hw/display folder to the hw/input folder. CODING_STYLE.rst: Be less strict about 80 character limit fsdev: open brace '{' following struct go on the same line hw/pci-host/pam: Replace magic number by PAM_REGIONS_COUNT definition hw/xen: Don't use '#' flag of printf format MAINTAINERS: update my email address qemu-options.hx: Fix minor issues in icount documentation target/i386: tracing: format length values as hex Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-14Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20201213' into ↵Peter Maydell
staging MIPS patches queue . Allow executing MSA instructions on Loongson-3A4000 . Update Huacai Chen email address . Various cleanups: - unused headers removal - use definitions instead of magic values - remove dead code - avoid calling unused code . Various code movements CI jobs results: https://gitlab.com/philmd/qemu/-/pipelines/229120169 https://cirrus-ci.com/build/4857731557359616 # gpg: Signature made Sun 13 Dec 2020 20:18:52 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/mips-20201213: (26 commits) target/mips: Use FloatRoundMode enum for FCR31 modes conversion target/mips: Remove unused headers from fpu_helper.c target/mips: Inline cpu_mips_realize_env() in mips_cpu_realizefn() target/mips: Move cpu definitions, reset() and realize() to cpu.c target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c target/mips: Extract cpu_supports*/cpu_set* translate.c hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit() hw/mips/malta: Do not initialize MT registers if MT ASE absent target/mips: Do not initialize MT registers if MT ASE absent target/mips: Introduce ase_mt_available() helper target/mips: Remove mips_def_t unused argument from mvp_init() target/mips: Remove unused headers from op_helper.c target/mips: Remove unused headers from translate.c hw/mips: Move address translation helpers to target/mips/ target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT() target/mips: Explicit Release 6 MMU types target/mips: Allow executing MSA instructions on Loongson-3A4000 target/mips: Also display exception names in user-mode target/mips: Remove unused headers from cp0_helper.c ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-14MAINTAINERS: Add Greg Kurz as co-maintainer for ppcDavid Gibson
Greg has agreed to be co-maintainer of the ppc target and machines. This should avoid repeats of the problem we had in qemu-5.2 where a last minute fix was needed while I was on holiday. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Greg Kurz <groug@kaod.org>
2020-12-13MAINTAINERS: update my email addressMichael Roth
I've recently switched employers and the current email address is out of date. Signed-off-by: Michael Roth <michael.roth@amd.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201027060253.353054-1-michael.roth@amd.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13MAINTAINERS: chenhc@lemote.com -> chenhuacai@kernel.orgHuacai Chen
Use @kernel.org address as the main communications end point. Update the corresponding M-entries and .mailmap (for git shortlog translation). Signed-off-by: Huacai Chen <chenhuacai@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1607160121-9977-1-git-send-email-chenhuacai@kernel.org>
2020-12-12Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into stagingPeter Maydell
Block layer patches: - Support for FUSE exports - Fix deadlock in bdrv_co_yield_to_drain() - Use lock guard macros - Some preparational patches for 64 bit block layer - file-posix: Fix request extension to INT64_MAX in raw_do_pwrite_zeroes() # gpg: Signature made Fri 11 Dec 2020 17:06:19 GMT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: (34 commits) block: Fix deadlock in bdrv_co_yield_to_drain() block: Fix locking in qmp_block_resize() block: Simplify qmp_block_resize() error paths block: introduce BDRV_MAX_LENGTH block/io: bdrv_check_byte_request(): drop bdrv_is_inserted() block/io: bdrv_refresh_limits(): use ERRP_GUARD block/file-posix: fix workaround in raw_do_pwrite_zeroes() can-host: Fix crash when 'canbus' property is not set iotests/221: Discard image before qemu-img map file-posix: check the use_lock before setting the file lock iotests/308: Add test for FUSE exports iotests: Enable fuse for many tests iotests: Allow testing FUSE exports iotests: Give access to the qemu-storage-daemon storage-daemon: Call bdrv_close_all() on exit iotests/287: Clean up subshell test image iotests: Let _make_test_img guess $TEST_IMG_FILE iotests: Restrict some Python tests to file iotests/091: Use _cleanup_qemu instad of "wait" iotests: Derive image names from $TEST_IMG ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-11Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20201211' into stagingPeter Maydell
First set of 6.0 patches for s390x: - acceptance test for device detection - bugfixes # gpg: Signature made Fri 11 Dec 2020 12:21:45 GMT # gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF # gpg: issuer "cohuck@redhat.com" # gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [unknown] # gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full] # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full] # gpg: aka "Cornelia Huck <cohuck@kernel.org>" [unknown] # gpg: aka "Cornelia Huck <cohuck@redhat.com>" [unknown] # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF * remotes/cohuck/tags/s390x-20201211: s390x/cpu: Use timer_free() in the finalize function to avoid memleaks tests/acceptance: test s390x zpci fid propagation tests/acceptance: verify s390x device detection tests/acceptance: test virtio-ccw revision handling tests/acceptance: add a test for devices on s390x hw/watchdog/wdt_diag288: Remove unnecessary includes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-11fuse: Allow exporting BDSs via FUSEMax Reitz
block-export-add type=fuse allows mounting block graph nodes via FUSE on some existing regular file. That file should then appears like a raw disk image, and accesses to it result in accesses to the exported BDS. Right now, we only implement the necessary block export functions to set it up and shut it down. We do not implement any access functions, so accessing the mount point only results in errors. This will be addressed by a followup patch. We keep a hash table of exported mount points, because we want to be able to detect when users try to use a mount point twice. This is because we invoke stat() to check whether the given mount point is a regular file, but if that file is served by ourselves (because it is already used as a mount point), then this stat() would have to be served by ourselves, too, which is impossible to do while we (as the caller) are waiting for it to settle. Therefore, keep track of mount point paths to at least catch the most obvious instances of that problem. Signed-off-by: Max Reitz <mreitz@redhat.com> Message-Id: <20201027190600.192171-3-mreitz@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-12-11tests/acceptance: add a test for devices on s390xCornelia Huck
This adds a very basic test for checking that we present devices in a way that Linux can consume: boot with both virtio-net-ccw and virtio-net-pci attached and then verify that Linux is able to see and detect these devices. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Message-Id: <20201126130158.1471985-1-cohuck@redhat.com>
2020-12-10WHPX: support for the kernel-irqchip on/offSunil Muthuswamy
This patch adds support the kernel-irqchip option for WHPX with on or off value. 'split' value is not supported for the option. The option only works for the latest version of Windows (ones that are coming out on Insiders). The change maintains backward compatibility on older version of Windows where this option is not supported. Signed-off-by: Sunil Muthuswamy <sunilmut@microsoft.com> Message-Id: <SN4PR2101MB0880B13258DA9251F8459F4DC0170@SN4PR2101MB0880.namprd21.prod.outlook.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-12-10MAINTAINERS: Add maintainer entry for Xilinx ZynqMP CAN controllerVikram Garhwal
Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com> Message-id: 1605728926-352690-5-git-send-email-fnu.vikram@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-23Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20201123' into staging target-arm queue: * incorporate 'orphan' rST docs into manuals * linux-user/arm: Deliver SIGTRAP for UDF patterns used as breakpoints * target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0 * document raspi boards and tosa * docs/system: Deprecate raspi2/raspi3 machine aliases * docs/system/arm: Document OpenPOWER Witherspoon BMC model Front LEDs * MAINTAINERS: add lines for docs files for Arm boards * hw/intc: fix heap-buffer-overflow in rxicu_realize() * hw/arm: Fix bad print format specifiers * target/arm: fix stage 2 page-walks in 32-bit emulation # gpg: Signature made Mon 23 Nov 2020 11:42:02 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201123: (24 commits) docs/system/pr-manager.rst: Fix minor docs nits docs: Split qemu-pr-helper documentation into tools manual docs: Move pr-manager.rst into the system manual docs: Move microvm.rst into the system manual docs: Split out 'pc' machine model docs into their own file docs/system/virtio-pmem.rst: Fix minor style issues docs: Move virtio-pmem.rst into the system manual docs: Move cpu-hotplug.rst into the system manual docs: Move virtio-net-failover.rst into the system manual linux-user/arm: Deliver SIGTRAP for UDF patterns used as breakpoints target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0 docs/system/arm: Document the Sharp Zaurus SL-6000 docs/system/arm: Document OpenPOWER Witherspoon BMC model Front LEDs docs/system/arm: Document the various raspi boards docs/system: Deprecate raspi2/raspi3 machine aliases MAINTAINERS: Cover system/arm/sx1.rst with OMAP machines MAINTAINERS: Cover system/arm/sbsa.rst with SBSA-REF machine MAINTAINERS: Fix system/arm/orangepi.rst path MAINTAINERS: Cover system/arm/nuvoton.rst with Nuvoton NPCM7xx MAINTAINERS: Cover system/arm/aspeed.rst with ASPEED BMC machines ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-23Merge remote-tracking branch ↵Peter Maydell
'remotes/stefanha-gitlab/tags/block-pull-request' into staging Pull request for 5.2 NVMe fixes to solve IOMMU issues on non-x86 and error message/tracing improvements. Elena Afanasova's ioeventfd fixes are also included. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> # gpg: Signature made Wed 04 Nov 2020 15:18:16 GMT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha-gitlab/tags/block-pull-request: (33 commits) util/vfio-helpers: Assert offset is aligned to page size util/vfio-helpers: Convert vfio_dump_mapping to trace events util/vfio-helpers: Improve DMA trace events util/vfio-helpers: Trace where BARs are mapped util/vfio-helpers: Trace PCI BAR region info util/vfio-helpers: Trace PCI I/O config accesses util/vfio-helpers: Improve reporting unsupported IOMMU type block/nvme: Fix nvme_submit_command() on big-endian host block/nvme: Fix use of write-only doorbells page on Aarch64 arch block/nvme: Align iov's va and size on host page size block/nvme: Change size and alignment of prp_list_pages block/nvme: Change size and alignment of queue block/nvme: Change size and alignment of IDENTIFY response buffer block/nvme: Correct minimum device page size block/nvme: Set request_alignment at initialization block/nvme: Simplify nvme_cmd_sync() block/nvme: Simplify ADMIN queue access block/nvme: Correctly initialize Admin Queue Attributes block/nvme: Use definitions instead of magic values in add_io_queue() block/nvme: Introduce Completion Queue definitions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-23docs/system/arm: Document the various raspi boardsPhilippe Mathieu-Daudé
Document the following Raspberry Pi models: - raspi0 Raspberry Pi Zero (revision 1.2) - raspi1ap Raspberry Pi A+ (revision 1.1) - raspi2b Raspberry Pi 2B (revision 1.1) - raspi3ap Raspberry Pi 3A+ (revision 1.0) - raspi3b Raspberry Pi 3B (revision 1.2) Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201120173953.2539469-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-23MAINTAINERS: Cover system/arm/sx1.rst with OMAP machinesPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201120154545.2504625-7-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-23MAINTAINERS: Cover system/arm/sbsa.rst with SBSA-REF machinePhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201120154545.2504625-6-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-23MAINTAINERS: Fix system/arm/orangepi.rst pathPhilippe Mathieu-Daudé
Fixes: 0553ef42571 ("docs: add Orange Pi PC document") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20201120154545.2504625-5-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-23MAINTAINERS: Cover system/arm/nuvoton.rst with Nuvoton NPCM7xxPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201120154545.2504625-4-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-23MAINTAINERS: Cover system/arm/aspeed.rst with ASPEED BMC machinesPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 20201120154545.2504625-3-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-23MAINTAINERS: Cover system/arm/cpu-features.rst with ARM TCG CPUsPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201120154545.2504625-2-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-12MAINTAINERS: Replace my twiddle.net addressRichard Henderson
Consolidate all of my MAINTAINERS entries on my work address. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-11-10docs/fuzz: rST-ify the fuzzing documentationAlexander Bulekov
Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20201106180600.360110-2-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-11-10MAINTAINERS: Add gitlab-pipeline-status script to GitLab CI sectionPhilippe Mathieu-Daudé
Do not let the gitlab-pipeline-status script unmaintained, add it to the 'GitLab Continuous Integration' section. Fixes: c02b2eac55e ("GitLab Gating CI: introduce pipeline-status contrib script") Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20201108204535.2319870-5-philmd@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-11-09Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2020-11-09' into ↵Peter Maydell
staging QAPI patches patches for 2020-11-09 # gpg: Signature made Mon 09 Nov 2020 08:16:33 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2020-11-09: block: Remove unused BlockDeviceMapEntry qapi/block-core: Improve MapEntry documentation qapi: Fix missing headers in QMP Reference Manual MAINTAINERS: Add QAPI schema modules to their subsystems docs/devel/qapi-code-gen: Fix up examples Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-09Merge remote-tracking branch ↵Peter Maydell
'remotes/philmd-gitlab/tags/renesas-fixes-20201109' into staging Renesas patches queue - Demote target & hardware sections to 'Odd Fixes' - Fix memory leak (CID 1432307) CI jobs results: . https://cirrus-ci.com/build/5340929353580544 . https://gitlab.com/philmd/qemu/-/pipelines/213407241 . https://travis-ci.org/github/philmd/qemu/builds/742315021 # gpg: Signature made Sun 08 Nov 2020 23:58:37 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/renesas-fixes-20201109: hw/rx/rx-gdbsim: Fix memory leak (CID 1432307) MAINTAINERS: Demote Renesas target & hardware to 'Odd Fixes' Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-09MAINTAINERS: Add QAPI schema modules to their subsystemsMarkus Armbruster
Add the relevant QAPI schema modules to section Audio, QMP, Tracing, Cryptography. Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Stefan Hajnoczi <stefanha@redhat.com> Cc: Daniel P. Berrange <berrange@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20201102081550.171061-2-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Acked-by: Daniel P. Berrangé <berrange@redhat.com>
2020-11-09MAINTAINERS: Demote Renesas target & hardware to 'Odd Fixes'Philippe Mathieu-Daudé
To be fair with other subsystems listed as 'Odd Fixes' but having maintainers more present, demote the Renesas sections from being 'Maintained' to 'Odd Fixes' (has a maintainer but they don't have time to do much other than throw the odd patch in.) This matches Magnus's possibilities so far: https://www.mail-archive.com/qemu-devel@nongnu.org/msg710319.html Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201102104001.2062572-1-f4bug@amsat.org>
2020-11-09target/mips: Deprecate nanoMIPS ISAPhilippe Mathieu-Daudé
The nanoMIPS ISA has been announced in 2018 for various projects: GCC: https://gcc.gnu.org/legacy-ml/gcc/2018-05/msg00012.html Linux: https://lwn.net/Articles/753605/ QEMU: https://www.mail-archive.com/qemu-devel@nongnu.org/msg530721.html Unfortunately the links referenced doesn't work anymore (www.mips.com). From this Wayback machine link [1] we can get to a working place to download a toolchain (a more recent release than the one referenced in the announcement mails): http://codescape.mips.com/components/toolchain/nanomips/2018.04-02/downloads.html The toolchain page mention LLVM but simply links http://llvm.org/ where there is no reference on nanoMIPS. The only reference in the GCC mailing list, is the nanoMIPS announcement: https://gcc.gnu.org/pipermail/gcc/2018-May.txt The developer who authored the announcements have been emailed [2] to ask for more information but all their emails are now bouncing: - Your message to Stefan.Markovic@mips.com couldn't be delivered. - Your message to smarkovic@wavecomp.com couldn't be delivered. - Couldn't deliver the message to the following recipients: Robert.Suchanek@mips.com, matthew.fortune@mips.com, marcin.nowakowski@mips.com Our deprecation policy do not allow feature removal before 2 release, therefore declare the nanoMIPS ISA code deprecated as of QEMU 5.2. This gives time to developers to update the QEMU community, or interested parties to step in to maintain this code. [1] https://web.archive.org/web/20180904044530/https://www.mips.com/develop/tools/compilers/ [2] https://www.mail-archive.com/qemu-devel@nongnu.org/msg756392.html Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201102202710.2224691-1-f4bug@amsat.org>
2020-11-04Merge remote-tracking branch ↵Peter Maydell
'remotes/philmd-gitlab/tags/mips-fixes-20201103' into staging MIPS patches queue - Removal of the 'r4k' machine (deprecated before 5.0) - Fix LGPL license text (Chetan Pant) - Support unaligned accesses on Loongson-3 (Huacai Chen) - Fix out-of-bound access in Loongson-3 embedded I/O interrupt controller (Alex Chen) CI jobs results: . https://cirrus-ci.com/build/6324890389184512 . https://gitlab.com/philmd/qemu/-/pipelines/211275262 . https://travis-ci.org/github/philmd/qemu/builds/741188958 # gpg: Signature made Tue 03 Nov 2020 17:30:30 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/mips-fixes-20201103: target/mips: Add unaligned access support for MIPS64R6 and Loongson-3 target/mips: Fix Lesser GPL version number hw/intc/loongson: Fix incorrect 'core' calculation in liointc_read/write hw/mips/boston: Fix Lesser GPL version number hw/mips: Fix Lesser GPL version number hw/mips: Remove the 'r4k' machine Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-03MAINTAINERS: Cover "block/nvme.h" filePhilippe Mathieu-Daudé
The "block/nvme.h" header is shared by both the NVMe block driver and the NVMe emulated device. Add the 'F:' entry on both sections, so all maintainers/reviewers are notified when it is changed. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Message-Id: <20200701140634.25994-1-philmd@redhat.com>
2020-11-03hw/mips: Remove the 'r4k' machinePhilippe Mathieu-Daudé
We deprecated the support for the 'r4k' machine for the 5.0 release (commit d32dc61421), which means that our deprecation policy allows us to drop it in release 5.2. Remove the code. To repeat the rationale from the deprecation note: - this virtual machine has no specification - the Linux kernel dropped support for it 10 years ago Users are recommended to use the Malta board instead. Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> ACKed-by: Peter Krempa <pkrempa@redhat.com> Message-Id: <20201102201311.2220005-1-f4bug@amsat.org>
2020-11-03hw/misc: Add Microchip PolarFire SoC SYSREG module supportBin Meng
This creates a minimum model for Microchip PolarFire SoC SYSREG module. It only implements the ENVM_CR register to tell guest software that eNVM is running at the configured divider rate. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-7-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/misc: Add Microchip PolarFire SoC IOSCB module supportBin Meng
This creates a model for PolarFire SoC IOSCB [1] module. It actually contains lots of sub-modules like various PLLs to control different peripherals. Only the mininum capabilities are emulated to make the HSS DDR memory initialization codes happy. Lots of sub-modules are created as an unimplemented devices. [1] PF_SoC_RegMap_V1_1/MPFS250T/mpfs250t_ioscb_memmap_dri.htm in https://www.microsemi.com/document-portal/doc_download/1244581-polarfire-soc-register-map Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-5-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/misc: Add Microchip PolarFire SoC DDR Memory Controller supportBin Meng
The PolarFire SoC DDR Memory Controller mainly includes 2 modules, called SGMII PHY module and the CFG module, as documented in the chipset datasheet. This creates a single file that groups these 2 modules, providing the minimum functionalities that make the HSS DDR initialization codes happy. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-3-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-02Merge remote-tracking branch 'remotes/nvme/tags/pull-nvme-20201102' into stagingPeter Maydell
nvme pull 2 Nov 2020 # gpg: Signature made Mon 02 Nov 2020 15:20:30 GMT # gpg: using RSA key DBC11D2D373B4A3755F502EC625156610A4F6CC0 # gpg: Good signature from "Keith Busch <kbusch@kernel.org>" [unknown] # gpg: aka "Keith Busch <keith.busch@gmail.com>" [unknown] # gpg: aka "Keith Busch <keith.busch@intel.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: DBC1 1D2D 373B 4A37 55F5 02EC 6251 5661 0A4F 6CC0 * remotes/nvme/tags/pull-nvme-20201102: (30 commits) hw/block/nvme: fix queue identifer validation hw/block/nvme: fix create IO SQ/CQ status codes hw/block/nvme: fix prp mapping status codes hw/block/nvme: report actual LBA data shift in LBAF hw/block/nvme: add trace event for requests with non-zero status code hw/block/nvme: add nsid to get/setfeat trace events hw/block/nvme: reject io commands if only admin command set selected hw/block/nvme: support for admin-only command set hw/block/nvme: validate command set selected hw/block/nvme: support per-namespace smart log hw/block/nvme: fix log page offset check hw/block/nvme: remove pointless rw indirection hw/block/nvme: update nsid when registered hw/block/nvme: change controller pci id pci: allocate pci id for nvme hw/block/nvme: support multiple namespaces hw/block/nvme: refactor identify active namespace id list hw/block/nvme: add support for sgl bit bucket descriptor hw/block/nvme: add support for scatter gather lists hw/block/nvme: harden cmb access ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-01s390x/pci: Move header files to include/hw/s390xMatthew Rosato
Seems a more appropriate location for them. Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2020-10-29Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20201027-1' into staging target-arm queue: * raspi: add model of cprman clock manager * sbsa-ref: add an SBSA generic watchdog device * arm/trace: Fix hex printing * raspi: Add models of Pi 3 model A+, Pi Zero and Pi A+ * hw/arm/smmuv3: Set the restoration priority of the vSMMUv3 explicitly * Nuvoton NPCM7xx: Add USB, RNG, GPIO and watchdog support * hw/arm: fix min_cpus for xlnx-versal-virt platform * hw/arm/highbank: Silence warnings about missing fallthrough statements * linux-user: Support Aarch64 BTI * Armv7M systick: fix corner case bugs by rewriting to use ptimer # gpg: Signature made Tue 27 Oct 2020 11:27:10 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201027-1: (48 commits) hw/timer/armv7m_systick: Rewrite to use ptimers hw/core/ptimer: Support ptimer being disabled by timer callback hw/arm/sbsa-ref: add SBSA watchdog device hw/watchdog: Implement SBSA watchdog device hw/arm/bcm2835_peripherals: connect the UART clock hw/char/pl011: add a clock input hw/misc/bcm2835_cprman: add sane reset values to the registers hw/misc/bcm2835_cprman: add the DSI0HSCK multiplexer hw/misc/bcm2835_cprman: implement clock mux behaviour hw/misc/bcm2835_cprman: add a clock mux skeleton implementation hw/misc/bcm2835_cprman: implement PLL channels behaviour hw/misc/bcm2835_cprman: add a PLL channel skeleton implementation hw/misc/bcm2835_cprman: implement PLLs behaviour hw/misc/bcm2835_cprman: add a PLL skeleton implementation hw/arm/raspi: add a skeleton implementation of the CPRMAN hw/arm/raspi: fix CPRMAN base address hw/core/clock: trace clock values in Hz instead of ns hw/core/clock: provide the VMSTATE_ARRAY_CLOCK macro arm/trace: Fix hex printing hw/arm/raspi: Add the Raspberry Pi 3 model A+ ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27hw/timer: Adding watchdog for NPCM7XX Timer.Hao Wu
The watchdog is part of NPCM7XX's timer module. Its behavior is controlled by the WTCR register in the timer. When enabled, the watchdog issues an interrupt signal after a pre-set amount of cycles, and issues a reset signal shortly after that. Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: deleted blank line at end of npcm_watchdog_timer-test.c] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27pci: allocate pci id for nvmeKlaus Jensen
The emulated nvme device (hw/block/nvme.c) is currently using an internal Intel device id. Prepare to change that by allocating a device id under the 1b36 (Red Hat, Inc.) vendor id. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-26hw/misc/led: Add a LED devicePhilippe Mathieu-Daudé
Add a LED device which can be connected to a GPIO output. They can also be dimmed with PWM devices. For now we do not implement the dimmed mode, but in preparation of a future implementation, we start using the LED intensity. LEDs are limited to a fixed set of colors. Reviewed-by: Luc Michel <luc.michel@greensocs.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200912134041.946260-2-f4bug@amsat.org>
2020-10-23util/vhost-user-server: move header to include/Stefan Hajnoczi
Headers used by other subsystems are located in include/. Also add the vhost-user-server and vhost-user-blk-server headers to MAINTAINERS. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 20200924151549.913737-13-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2020-10-23MAINTAINERS: Add vhost-user block device backend server maintainerCoiby Xu
Suggested-by: Stefano Garzarella <sgarzare@redhat.com> Signed-off-by: Coiby Xu <coiby.xu@gmail.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20200918080912.321299-8-coiby.xu@gmail.com [Removed reference to vhost-user-blk-test.c, it will be sent in a separate pull request. --Stefan] Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2020-10-20MAINTAINERS: Add Python library stanzaJohn Snow
I'm proposing that I split the actual Python library off from the other miscellaneous python scripts we have and declare it maintained. Add myself as a maintainer of this folder, along with Cleber. I will be actively working to add CI style guide checks, strict typing, and an actual package infrastructure to this folder specifically which differentiates it from loose, miscellaneous scripts which are generally maintained by other individuals with subject matter expertise. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Cleber Rosa <crosa@redhat.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-25 03:05:05 +0000