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2021-03-15hw/usb: Extract VT82C686 UHCI PCI function into a new unitPhilippe Mathieu-Daudé
Extract the VT82C686 PCI UHCI function into a new unit so it is only build when the VT82C686 south bridge is selected. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210309190802.830969-4-f4bug@amsat.org> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-03-14Merge remote-tracking branch ↵Peter Maydell
'remotes/thuth-gitlab/tags/pull-request-2021-03-12' into staging * Move unit and bench tests into separate directories * Clean-up and improve gitlab-ci jobs * Drop the non-working "check-speed" makefile target * Minor documentation updates # gpg: Signature made Fri 12 Mar 2021 17:18:45 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/thuth-gitlab/tags/pull-request-2021-03-12: README: Add Documentation blurb MAINTAINERS: Merge the Gitlab-CI section into the generic CI section tests: remove "make check-speed" in favor of "make bench" gitlab-ci.yml: Merge check-crypto-old jobs into the build-crypto-old jobs gitlab-ci.yml: Merge one of the coroutine jobs with the tcg-disabled job gitlab-ci.yml: Add some missing dependencies to the jobs gitlab-ci.yml: Move build-tools-and-docs-debian to a better place tests: Move benchmarks into a separate folder tests: Move unit tests into a separate directory Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-12MAINTAINERS: Merge the Gitlab-CI section into the generic CI sectionThomas Huth
The status of the gitlab-CI files is currently somewhat confusing, and it is often not quite clear whether a patch should go via my tree or via the testing tree of Alex. That situation has grown historically... Initially, I was the only one using the gitlab-CI, just for my private repository there. But in the course of time, the gitlab-CI switched to use the containers from tests/docker/ (which is not part of the gitlab-CI section in the MAINTAINERS file), and QEMU now even switched to gitlab.com completely for the repository and will soon use it as its gating CI, too, so it makes way more sense if the gitlab-ci.yml files belong to the people who are owning the qemu-project on gitlab.com and take care of the gitlab CI there. Thus let's merge the gitlab-ci section into the common "test and build automation" section. And while we're at it, I'm also removing the line with Fam there for now, since he was hardly active during the last years in this area anymore. If he ever gets more time for this part again in the future, we surely can add the line back again. I'm also removing the Patchew URL from this section now since Patchew's files are not tracked in the main QEMU repo and it is also not maintained by Alex, Philippe and myself. The maintainers of Patchew are still listed more accurately in the wiki on https://wiki.qemu.org/AdminContacts & https://wiki.qemu.org/Testing/CI/Patchew instead. Now to avoid that Alex is listed here in this section alone, Philippe and I agreed to help as backup maintainers here, too. And Willian volunteered to be an additional reviewer. Message-Id: <20210309112356.737266-1-thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Willian Rampazzo <willianr@redhat.com> Acked-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Acked-by: Fam Zheng <fam@euphon.net> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-03-12tests: Move benchmarks into a separate folderThomas Huth
Make it clear that these files are related to benchmarks by moving them into a new folder called "bench". Message-Id: <20210312092238.79509-1-thuth@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-03-12tests: Move unit tests into a separate directoryThomas Huth
The main tests directory still looks very crowded, and it's not clear which files are part of a unit tests and which belong to a different test subsystem. Let's clean up the mess and move the unit tests to a separate directory. Message-Id: <20210310063314.1049838-1-thuth@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-03-11Merge remote-tracking branch ↵Peter Maydell
'remotes/vivier2/tags/trivial-branch-for-6.0-pull-request' into staging Pull request # gpg: Signature made Wed 10 Mar 2021 21:56:09 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.0-pull-request: (22 commits) sysemu: Let VMChangeStateHandler take boolean 'running' argument sysemu/runstate: Let runstate_is_running() return bool hw/lm32/Kconfig: Have MILKYMIST select LM32_DEVICES hw/lm32/Kconfig: Rename CONFIG_LM32 -> CONFIG_LM32_DEVICES hw/lm32/Kconfig: Introduce CONFIG_LM32_EVR for lm32-evr/uclinux boards qemu-common.h: Update copyright string to 2021 tests/fp/fp-test: Replace the word 'blacklist' qemu-options: Replace the word 'blacklist' seccomp: Replace the word 'blacklist' scripts/tracetool: Replace the word 'whitelist' ui: Replace the word 'whitelist' virtio-gpu: Adjust code space style exec/memory: Use struct Object typedef fuzz-test: remove unneccessary debugging flags net: Use id_generate() in the network subsystem, too MAINTAINERS: Fix the location of tools manuals vhost_user_gpu: Drop dead check for g_malloc() failure backends/dbus-vmstate: Fix short read error handling target/hexagon/gen_tcg_funcs: Fix a typo hw/elf_ops: Fix a typo ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-11Merge remote-tracking branch ↵Peter Maydell
'remotes/stsquad/tags/pull-testing-docs-xen-updates-100321-2' into staging Testing, guest-loader and other misc tweaks - add warning text to quickstart example - add CFI tests to CI - use --arch-only for docker pre-requisites - fix .editorconfig for emacs - add guest-loader for Xen-like hypervisor testing - move generic-loader docs into manual proper - move semihosting out of hw/ # gpg: Signature made Wed 10 Mar 2021 15:35:31 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-docs-xen-updates-100321-2: semihosting: Move hw/semihosting/ -> semihosting/ semihosting: Move include/hw/semihosting/ -> include/semihosting/ tests/avocado: add boot_xen tests docs: add some documentation for the guest-loader docs: move generic-loader documentation into the main manual hw/core: implement a guest-loader to support static hypervisor guests device_tree: add qemu_fdt_setprop_string_array helper hw/riscv: migrate fdt field to generic MachineState hw/board: promote fdt from ARM VirtMachineState to MachineState .editorconfig: update the automatic mode setting for Emacs tests/docker: Use --arch-only when building Debian cross image gitlab-ci.yml: Add jobs to test CFI flags gitlab-ci.yml: Allow custom # of parallel linkers tests/docker: add a test-tcg for building then running check-tcg docs/system: add a gentle prompt for the complexity to come Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-11Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2021-03-09' into ↵Peter Maydell
staging nbd patches for 2021-03-09 - Add Vladimir as NBD co-maintainer - Fix reporting of holes in NBD_CMD_BLOCK_STATUS - Improve command-line parsing accuracy of large numbers (anything going through qemu_strtosz), including the deprecation of hex+suffix - Improve some error reporting in the block layer # gpg: Signature made Tue 09 Mar 2021 15:38:10 GMT # gpg: using RSA key 71C2CC22B1C4602927D2F3AAA7A16B4A2527436A # gpg: Good signature from "Eric Blake <eblake@redhat.com>" [full] # gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" [full] # gpg: aka "[jpeg image of size 6874]" [full] # Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 436A * remotes/ericb/tags/pull-nbd-2021-03-09: block/qcow2: refactor qcow2_update_options_prepare error paths block/qed: bdrv_qed_do_open: deal with errp block/qcow2: simplify qcow2_co_invalidate_cache() block/qcow2: read_cache_sizes: return status value block/qcow2-bitmap: return status from qcow2_store_persistent_dirty_bitmaps block/qcow2-bitmap: improve qcow2_load_dirty_bitmaps() interface block/qcow2: qcow2_get_specific_info(): drop error propagation blockjob: return status from block_job_set_speed() block/mirror: drop extra error propagation in commit_active_start() block: drop extra error propagation for bdrv_set_backing_hd blockdev: fix drive_backup_prepare() missed error block: check return value of bdrv_open_child and drop error propagation utils: Deprecate hex-with-suffix sizes utils: Improve qemu_strtosz() to have 64 bits of precision utils: Enhance testsuite for do_strtosz() nbd: server: Report holes for raw images MAINTAINERS: add Vladimir as co-maintainer of NBD Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-10Merge remote-tracking branch ↵Peter Maydell
'remotes/thuth-gitlab/tags/pull-request-2021-03-09' into staging * Add some missing gitlab-CI job dependencies * Re-enable "make check SPEED=slow" * Improve the gitlab-pipeline-status script * Clean up inclusing of qtest.h headers * Improve libqos/qgraph documentation * Fix downloading problem in the acceptance tests * Remove deprecated target tilegx * Add new bsd-user maintainers # gpg: Signature made Tue 09 Mar 2021 10:27:29 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/thuth-gitlab/tags/pull-request-2021-03-09: bsd-user: Add new maintainers Remove deprecated target tilegx Acceptance Tests: restore filtering of tests by target arch Acceptance Tests: restore downloading of VM images docs/devel/qgraph: improve qgraph documentation libqos/qgraph: format qgraph comments for sphinx documentation scripts/ci/gitlab-pipeline-status: give more info when pipeline not found scripts/ci/gitlab-pipeline-status: give more information on failures scripts/ci/gitlab-pipeline-status: split utlity function for HTTP GET meson: Re-enable the possibility to run "make check SPEED=slow" docker: OpenSBI build job depends on OpenSBI container docker: EDK2 build job depends on EDK2 container docker: Alpine build job depends on Alpine container qtest: delete superfluous inclusions of qtest.h Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-10semihosting: Move hw/semihosting/ -> semihosting/Philippe Mathieu-Daudé
With the exception of hw/core/, the hw/ directory only contains device models used in system emulation. Semihosting is also used by user emulation. As a generic feature, move it out of hw/ directory. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210226131356.3964782-3-f4bug@amsat.org> Message-Id: <20210305135451.15427-3-alex.bennee@linaro.org>
2021-03-10semihosting: Move include/hw/semihosting/ -> include/semihosting/Philippe Mathieu-Daudé
We want to move the semihosting code out of hw/ in the next patch. This patch contains the mechanical steps, created using: $ git mv include/hw/semihosting/ include/ $ sed -i s,hw/semihosting,semihosting, $(git grep -l hw/semihosting) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210226131356.3964782-2-f4bug@amsat.org> Message-Id: <20210305135451.15427-2-alex.bennee@linaro.org>
2021-03-10tests/avocado: add boot_xen testsAlex Bennée
These tests make sure we can boot the Xen hypervisor with a Dom0 kernel using the guest-loader. We currently have to use a kernel I built myself because there are issues using the Debian kernel images. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Cleber Rosa <crosa@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Cleber Rosa <crosa@redhat.com> Message-Id: <20210303173642.3805-8-alex.bennee@linaro.org>
2021-03-10docs: add some documentation for the guest-loaderAlex Bennée
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210303173642.3805-7-alex.bennee@linaro.org>
2021-03-10docs: move generic-loader documentation into the main manualAlex Bennée
We might as well surface this useful information in the manual so users can find it easily. It is a fairly simple conversion to rst with the only textual fixes being QemuOps to QemuOpts. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210303173642.3805-6-alex.bennee@linaro.org>
2021-03-10hw/core: implement a guest-loader to support static hypervisor guestsAlex Bennée
Hypervisors, especially type-1 ones, need the firmware/bootcode to put their initial guest somewhere in memory and pass the information to it via platform data. The guest-loader is modelled after the generic loader for exactly this sort of purpose: $QEMU $ARGS -kernel ~/xen.git/xen/xen \ -append "dom0_mem=1G,max:1G loglvl=all guest_loglvl=all" \ -device guest-loader,addr=0x42000000,kernel=Image,bootargs="root=/dev/sda2 ro console=hvc0 earlyprintk=xen" \ -device guest-loader,addr=0x47000000,initrd=rootfs.cpio Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210303173642.3805-5-alex.bennee@linaro.org>
2021-03-10Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20210310' into staging target-arm queue: * Add new mps3-an547 board * target/arm: Restrict v7A TCG cpus to TCG accel * Implement a Xilinx CSU DMA model * hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() # gpg: Signature made Wed 10 Mar 2021 13:56:20 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210310: (54 commits) hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_ hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips hw/ssi: xilinx_spips: Clean up coding convention issues hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI hw/arm: xlnx-zynqmp: Clean up coding convention issues hw/dma: Implement a Xilinx CSU DMA model target/arm: Restrict v7A TCG cpus to TCG accel tests/qtest/sse-timer-test: Test counter scaling changes tests/qtest/sse-timer-test: Test the system timer tests/qtest/sse-timer-test: Add simple test of the SSE counter docs/system/arm/mps2.rst: Document the new mps3-an547 board hw/arm/mps2-tz: Add new mps3-an547 board hw/arm/mps2-tz: Make initsvtor0 setting board-specific hw/arm/mps2-tz: Support running APB peripherals on different clock hw/misc/mps2-scc: Implement changes for AN547 hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate hw/arm/mps2-tz: Make UART overflow IRQ board-specific hw/arm/armsse: Add SSE-300 support ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-09Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into stagingPeter Maydell
Block layer patches: - qemu-storage-daemon: add --pidfile option - qemu-storage-daemon: CLI error messages include the option name now - vhost-user-blk export: Misc fixes - docs: Improvements for qemu-storage-daemon documentation - parallels: load bitmap extension - backup-top: Don't crash on post-finalize accesses - Improve error messages related to node-name options - iotests improvements # gpg: Signature made Mon 08 Mar 2021 17:01:41 GMT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: (30 commits) blockdev: Clarify error messages pertaining to 'node-name' block: Clarify error messages pertaining to 'node-name' docs: qsd: Explain --export nbd,name=... default MAINTAINERS: update parallels block driver iotests: add parallels-read-bitmap test iotests.py: add unarchive_sample_image() helper parallels: support bitmap extension for read-only mode block/parallels: BDRVParallelsState: add cluster_size field parallels.txt: fix bitmap L1 table description qcow2-bitmap: make bytes_covered_by_bitmap_cluster() public block/export: port virtio-blk read/write range check block/export: port virtio-blk discard/write zeroes input validation block/export: fix vhost-user-blk export sector number calculation block/export: use VIRTIO_BLK_SECTOR_BITS block/export: fix blk_size double byteswap libqtest: add qtest_remove_abrt_handler() libqtest: add qtest_kill_qemu() libqtest: add qtest_socket_server() vhost-user-blk: fix blkcfg->num_queues endianness docs: replace insecure /tmp examples in qsd docs ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-09MAINTAINERS: Fix the location of tools manualsWainer dos Santos Moschetta
The qemu-img.rst, qemu-nbd.rst, virtfs-proxy-helper.rst, qemu-trace-stap.rst, and virtiofsd.rst manuals were moved to docs/tools, so this update MAINTAINERS accordingly. Fixes: a08b4a9fe6c ("docs: Move tools documentation to tools manual") Signed-off-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210204135425.1380280-1-wainersm@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-03-09bsd-user: Add new maintainersWarner Losh
The FreeBSD project has a number of enhancements to bsd-user. These changes have evolved over the past 10 year, and aren't currently updated to the latest version of qemu due to fluxuations in staffing causing us to fall behind in the past. We're working on porting all the changes forward and contributing all the changes back to qemu. Add myself as maintainer and Kyle Evans as a reviewer for changes. In addition, add a pointer to our github repo in the interim while this work is ongoing. Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210308224023.75187-1-imp@bsdimp.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-03-09libqos/qgraph: format qgraph comments for sphinx documentationEmanuele Giuseppe Esposito
Change documentation style and fix minor typos in tests/qtest/libqos/qgraph.h to automatically generate sphinx documentation in docs/devel/qgraph.rst The mechanism explanation that once was in qgraph.h is now moved to qgraph.rst There is no functional change intended. Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-Id: <20210308073240.6363-1-eesposit@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-03-08MAINTAINERS: add Vladimir as co-maintainer of NBDVladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20210304103503.21008-1-vsementsov@virtuozzo.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Eric Blake <eblake@redhat.com>
2021-03-08tests/qtest/sse-timer-test: Add simple test of the SSE counterPeter Maydell
Add a simple qtest to exercise the new system counter device in the SSE-300. We'll add tests of the system timer device here too, so this includes scaffolding (register definitions, etc) for those. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210219144617.4782-45-peter.maydell@linaro.org
2021-03-08hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register blockPeter Maydell
The SSE-300 has a new register block CPU<N>_PWRCTRL. There is one instance of this per CPU in the system (so just one for the SSE-300), and as well as the usual CIDR/PIDR ID registers it has just one register, CPUPWRCFG. This register allows the guest to configure behaviour of the system in power-down and deep-sleep states. Since QEMU does not model those, we make the register a dummy reads-as-written implementation. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210219144617.4782-21-peter.maydell@linaro.org
2021-03-08hw/timer/sse-timer: Model the SSE Subsystem System TimerPeter Maydell
The SSE-300 includes some timers which are a different kind to those in the SSE-200. Model them. These timers are documented in the SSE-123 Example Subsystem Technical Reference Manual: https://developer.arm.com/documentation/101370/latest/ Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210219144617.4782-13-peter.maydell@linaro.org
2021-03-08hw/timer/sse-counter: Model the SSE Subsystem System CounterPeter Maydell
The SSE-300 includes a counter module; implement a model of it. This counter is documented in the SSE-123 Example Subsystem Technical Reference Manual: https://developer.arm.com/documentation/101370/latest/ Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210219144617.4782-12-peter.maydell@linaro.org
2021-03-08MAINTAINERS: update parallels block driverVladimir Sementsov-Ogievskiy
Add new parallels-ext.c and myself as co-maintainer. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20210304095151.19358-1-vsementsov@virtuozzo.com> Reviewed-by: Denis V. Lunev <den@openvz.org> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2021-03-06hw/pci-host: Introduce SH_PCI Kconfig entryPhilippe Mathieu-Daudé
We want to be able to use the 'SH4' config for architecture specific features. Add more fine-grained selection by adding a CONFIG_SH_PCI selector for the SH4 PCI controller. Move the file with the other PCI host devices in hw/pci-host and add its missing MAINTAINERS entries. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210222141514.2646278-8-f4bug@amsat.org>
2021-03-06hw/block: Introduce TC58128 eeprom Kconfig entryPhilippe Mathieu-Daudé
Add more fine-grained selection by adding a CONFIG_TC58128 selector for the TC58128 eeprom. As this device is only used by the Shix machine, add an entry to the proper section in MAINTAINERS. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210222141514.2646278-7-f4bug@amsat.org>
2021-03-06hw/timer: Introduce SH_TIMER Kconfig entryPhilippe Mathieu-Daudé
We want to be able to use the 'SH4' config for architecture specific features. Add more fine-grained selection by adding a CONFIG_SH_TIMER selector for the SH4 timer control unit. Add the missing MAINTAINERS entries. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210222141514.2646278-6-f4bug@amsat.org>
2021-03-06hw/char: Introduce SH_SCI Kconfig entryPhilippe Mathieu-Daudé
We want to be able to use the 'SH4' config for architecture specific features. Add more fine-grained selection by adding a CONFIG_SH_SCI selector for the SH4 serial controller. Add the missing MAINTAINERS entries. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210222141514.2646278-5-f4bug@amsat.org>
2021-03-04MAINTAINERS: Add a SiFive machine sectionAlistair Francis
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Bin Meng <bin.meng@windriver.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 6bc077e5ae4a9512c8adf81ae194718f2f17c402.1612836645.git.alistair.francis@wdc.com
2021-02-21Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210221' into ↵Peter Maydell
staging MIPS patches queue - Drop redundant struct MemmapEntry (Bin) - Fix for Coverity CID 1438965 and 1438967 (Jiaxun) - Add MIPS bootloader API (Jiaxun) - Use MIPS bootloader API on fuloong2e and boston machines (Jiaxun) - Add PMON test for Loongson-3A1000 CPU (Jiaxun) - Convert to translator API (Philippe) - MMU cleanups (Philippe) - Promote 128-bit multimedia registers as global ones (Philippe) - Various cleanups/fixes on the VT82C686B southbridge (Zoltan) # gpg: Signature made Sun 21 Feb 2021 18:43:57 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/mips-20210221: (43 commits) vt82c686: Fix superio_cfg_{read,write}() functions vt82c686: Log superio_cfg unimplemented accesses vt82c686: Simplify by returning earlier vt82c686: Reduce indentation by returning early vt82c686: Remove index field of SuperIOConfig vt82c686: Move creation of ISA devices to the ISA bridge vt82c686: Simplify vt82c686b_realize() vt82c686: Make vt82c686b-pm an abstract base class and add vt8231-pm based on it vt82c686: Set user_creatable=false for VT82C686B_PM vt82c686: Fix up power management io base and config vt82c686: Correctly reset all registers to default values on reset vt82c686: Correct vt82c686-pm I/O size vt82c686: Make vt82c686-pm an I/O tracing region vt82c686: Fix SMBus IO base and configuration registers vt82c686: Reorganise code vt82c686: Move superio memory region to SuperIOConfig struct target/mips: Use GPR move functions in gen_HILO1_tx79() target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers target/mips: Rename 128-bit upper halve GPR registers target/mips: Promote 128-bit multimedia registers as global ones ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-21tests/acceptance: Test PMON with Loongson-3A1000 CPUJiaxun Yang
Test booting of PMON bootloader on loongson3-virt platform. $ (venv) AVOCADO_ALLOW_UNTRUSTED_CODE=1 \ avocado --show=app,console \ run -t machine:loongson3-virt tests/acceptance Fetching asset from tests/acceptance/machine_mips_loongson3v.py:MipsLoongson3v.test_pmon_serial_console JOB ID : 8e202b3727847c9104d0d3d6546ed225d35f6706 JOB LOG : /home/flygoat/avocado/job-results/job-2021-01-12T10.02-8e202b3/job.log (1/1) tests/acceptance/machine_mips_loongson3v.py:MipsLoongson3v.test_pmon_serial_console: console: PMON2000 MIPS Initializing. Standby... console: 00000000Jump to 9fc console: Init Memory done. console: The uncache data is: console: 00000000: 5555555555555555 console: 00000008: aaaaaaaaaaaaaaaa console: 00000010: 3333333333333333 console: 00000018: cccccccccccccccc console: 00000020: 7777777777777777 console: 00000028: 8888888888888888 console: 00000030: 1111111111111111 console: 00000038: eeeeeeeeeeeeeeee console: The cached data is: console: 00000000: 5555555555555555 console: 00000008: aaaaaaaaaaaaaaaa console: 00000010: 3333333333333333 console: 00000018: cccccccccccccccc console: 00000020: 7777777777777777 console: 00000028: 8888888888888888 console: 00000030: 1111111111111111 console: 00000038: eeeeeeeeeeeeeeee console: Copy PMON to execute location... console: start = 0x8f900000 console: s0 = 0x30300000 console: _edata = 0x8f989010 console: _end = 0x8f98a028copy text section done. console: Copy PMON to execute location done. console: sp=8f8fc000 console: Uncompressing Bios............................................................................OK,Booting Bios console: FREQ console: DONE console: DEVI console: ENVI console: MAPV console: NVRAM@8f7ff898 console: STDV console: 80100000: memory between 8f7ff400-8f800000 is already been allocated,heap is already above this point console: SBDD console: P12PCIH console: PCIH console: PCID console: setting up 1 bus console: PCI bus 0 slot 1: probe...completed console: PCI bus 0 slot 1/0: vendor/product: 0x106b/0x003f (serialbus, USB, interface: 0x10, revision: 0x00) console: PCI bus 0 slot 1/0: reg 0x10 = 0xffffff00 console: PCI bus 0 slot 2: probe...completed console: PCI bus 0 slot 2/0: vendor/product: 0x1af4/0x1000 (network, ethernet, interface: 0x00, revision: 0x00) console: PCI bus 0 slot 2/0: reg 0x10 = 0xffffffe1 console: PCI bus 0 slot 2/0: reg 0x14 = 0xfffff000 console: PCI bus 0 slot 2/0: reg 0x20 = 0xffffc00c console: PCI bus 0 slot 2/0: reg 0x30 = 0xfffc0000 console: PCI bus 0 slot 3: probe...completed console: PCI bus 0 slot 4: probe...completed console: PCI bus 0 slot 5: probe...completed console: PCI bus 0 slot 6: probe...completed console: PCI bus 0 slot 7: probe...completed console: PCI bus 0 slot 8: probe...completed console: PCI bus 0 slot 9: probe...completed console: PCI bus 0 slot 10: probe...completed console: PCI bus 0 slot 11: probe...completed console: PCI bus 0 slot 12: probe...completed console: PCI bus 0 slot 13: probe...completed console: PCI bus 0 slot 14: probe...completed console: PCI bus 0 slot 15: probe...completed console: PCI bus 0 slot 16: probe...completed console: PCI bus 0 slot 17: probe...completed console: PCI bus 0 slot 18: probe...completed console: PCI bus 0 slot 19: probe...completed console: PCI bus 0 slot 20: probe...completed console: PCI bus 0 slot 21: probe...completed console: PCI bus 0 slot 22: probe...completed console: PCI bus 0 slot 23: probe...completed console: PCI bus 0 slot 24: probe...completed console: PCI bus 0 slot 25: probe...completed console: PCI bus 0 slot 26: probe...completed console: PCI bus 0 slot 27: probe...completed console: PCI bus 0 slot 28: probe...completed console: PCI bus 0 slot 29: probe...completed console: PCI bus 0 slot 30: probe...completed console: PCI bus 0 slot 31: probe...completed console: PCIS console: PCIR console: PCIW console: PCI bus 0 slot 2/0: mem @0x40000000, reg 0x30 262144 bytes console: PCI bus 0 slot 2/0: mem @0x40040000, reg 0x20 16384 bytes console: PCI bus 0 slot 2/0: mem @0x40044000, reg 0x14 4096 bytes console: PCI bus 0 slot 1/0: mem @0x40045000, reg 0x10 256 bytes console: PCI bus 0 slot 2/0: exp @0x40000000, 262144 bytes console: PCI bus 0 slot 2/0: i/o @0x00004000, reg 0x10 32 bytes console: NETI console: RTCL console: PCID console: VGAI console: memorysize=c000000,base=8f6ff508,sysMem=8f6ef500 console: in setup_int_vect!done!VESA console: vga bios init failed, rc=-1 console: in configure console: mainbus0 (root) console: localbus0 at mainbus0 console: loopdev0 at mainbus0pcibr0 at mainbus0 console: pci0 at pcibr0 bus 0 console: ohci0 at pci0 dev 1 function 0 vendor/product: 0x106b/0x003f (serialbus, USB, interface: 0x10, revision: 0x00)usb base addr : 0xc0045000, bus_base is : 0xc0000000 console: OHCI revision: 0x00000010 console: RH: a: 0x00000203 b: 0x00000000 console: early period(0x0) console: OHCI 8c01ec00 initialized ok console: New Device 0 console: usb_get_descriptor console: bLength = 12 console: bDescriptorType =1 console: bcdUSB = 110 console: bDeviceClass =9 console: bDeviceSubClass =0 console: bDeviceProtocol =0 console: bMaxPacketSize0 =8 console: set address 1 console: usb_get_descriptor console: bLength = 12 console: bDescriptorType =1 console: bcdUSB = 110 console: bDeviceClass =9 console: bDeviceSubClass =0 console: bDeviceProtocol =0 console: bMaxPacketSize0 =8 console: idVendor =0 console: idProduct =0 console: bcdDevice =0 console: iManufacturer=0 console: iProduct =1 console: iSerialNumber=0 console: bNumConfigurations=1 console: usb_get_descriptor console: usb_get_descriptor console: get_conf_no 0 Result 25, wLength 25 console: if 0, ep 0 console: bLength=9 console: bDescriptorType=2 console: wTotalLength=19 console: bNumInterfaces=1 console: bConfigurationValue=1 console: iConfiguration=0 console: bmAttributes=40 console: MaxPower=0 console: 09 04 00 00 01 09 00 00 00 07 05 81 03 02 00 ff console: ##EP epmaxpacketin[1] = 2 console: set configuration 1 console: new device strings: Mfr=0, Product=1, SerialNumber=0 console: USB device number 1 default language ID 0x409 console: Manufacturer console: Product OHCI Root Hub console: SerialNumber console: New Device 1 console: usb_get_descriptor console: bLength = 12 console: bDescriptorType =1 console: bcdUSB = 200 console: bDeviceClass =0 console: bDeviceSubClass =0 console: bDeviceProtocol =0 console: bMaxPacketSize0 =8 console: set address 2 console: usb_get_descriptor console: bLength = 12 console: bDescriptorType =1 console: bcdUSB = 200 console: bDeviceClass =0 console: bDeviceSubClass =0 console: bDeviceProtocol =0 console: bMaxPacketSize0 =8 console: idVendor =627 console: idProduct =1 console: bcdDevice =0 console: iManufacturer=1 console: iProduct =4 console: iSerialNumber=b console: bNumConfigurations=1 console: usb_get_descriptor console: usb_get_descriptor console: get_conf_no 0 Result 34, wLength 34 console: unknown Description Type : 21 console: 09 21 11 01 00 01 22 3F 00 console: if 0, ep 0 console: bLength=9 console: bDescriptorType=2 console: wTotalLength=22 console: bNumInterfaces=1 console: bConfigurationValue=1 console: iConfiguration=8 console: bmAttributes=a0 console: MaxPower=32 console: 09 04 00 00 01 03 01 01 00 09 21 11 01 00 01 22 3f 00 07 05 81 03 08 00 0a console: ##EP epmaxpacketin[1] = 8 console: set configuration 1 console: new device strings: Mfr=1, Product=4, SerialNumber=11 console: USB device number 2 default language ID 0x409 console: Manufacturer QEMU console: Product QEMU USB Keyboard console: SerialNumber 68284-0000:00:01.0-1 console: drive at ohci0 devnum 2, Product QEMU USB Keyboard console: not configured console: New Device 2 console: usb_get_descriptor console: bLength = 12 console: bDescriptorType =1 console: bcdUSB = 200 console: bDeviceClass =0 console: bDeviceSubClass =0 console: bDeviceProtocol =0 console: bMaxPacketSize0 =8 console: set address 3 console: usb_get_descriptor console: bLength = 12 console: bDescriptorType =1 console: bcdUSB = 200 console: bDeviceClass =0 console: bDeviceSubClass =0 console: bDeviceProtocol =0 console: bMaxPacketSize0 =8 console: idVendor =627 console: idProduct =1 console: bcdDevice =0 console: iManufacturer=1 console: iProduct =3 console: iSerialNumber=a console: bNumConfigurations=1 console: usb_get_descriptor console: usb_get_descriptor console: get_conf_no 0 Result 34, wLength 34 console: unknown Description Type : 21 console: 09 21 01 00 00 01 22 4A 00 console: if 0, ep 0 console: bLength=9 console: bDescriptorType=2 console: wTotalLength=22 console: bNumInterfaces=1 console: bConfigurationValue=1 console: iConfiguration=7 console: bmAttributes=a0 console: MaxPower=32 console: 09 04 00 00 01 03 00 00 00 09 21 01 00 00 01 22 4a 00 07 05 81 03 08 00 0a console: ##EP epmaxpacketin[1] = 8 console: set configuration 1 console: new device strings: Mfr=1, Product=3, SerialNumber=10 console: USB device number 3 default language ID 0x409 console: Manufacturer QEMU console: Product QEMU USB Tablet console: SerialNumber 28754-0000:00:01.0-2 console: drive at ohci0 devnum 3, Product QEMU USB Tablet console: not configured console: drive at ohci0 devnum 1, Product OHCI Root Hub console: not configured console: vendor/product: 0x1af4/0x1000 (network, ethernet, interface: 0x00, revision: 0x00) at pci0 dev 2 function 0 not configured console: out configure console: Press <Del> to set BIOS,waiting for 3 seconds here..... console: devconfig done. console: ifinit done. console: domaininit done. console: init_proc.... console: HSTI console: SYMI console: SBDE console: [[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[ console: [[ [[[[[[[[[ [[[[[ [[[[ [[[[[ [[[[[ [[[[[ [[[[[ [[[[ [[[[[ [[ console: [[ [[[[[[[[ [[[[ [[[ [[[[ [[[ [[[[ [[[[ [[[[ [[[ [[[[ [[[ [[[[ [[[ [[[[ [[ console: [[ [[[[[[[[ [[[[[[ [[[ [[[[[[ [[[ [ [[[ [[[ [[[[[[[[[[[[ [[[[[[[ [[[[[[ [[[ [ [[[ [[ console: [[ [[[[[[[[ [[[[[[ [[[ [[[[[[ [[[ [[ [[ [[[ [[[ [[[[[[[ [[[[ [[[[[[ [[[ [[ [[ [[ console: [[ [[[[[[[[ [[[[[[ [[[ [[[[[[ [[[ [[[ [ [[[ [[[[[ [[[[[[[[[[ [[[ [[[[[[ [[[ [[[ [ [[ console: [[ [[[[[[[[ [[[[ [[[ [[[[ [[[ [[[[ [[[ [[[[ [[[ [[[ [[[[ [[[[ [[[ [[[[ [[ console: [[ [[[[ [[[[[ [[[[ [[[[[ [[[[ [[[[[ [[[[[[ [[[[ [[[[[ [[ console: [[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[2011 Loongson][[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[ console: Configuration [Bonito,EL,NET,SCSI,IDE] console: Version: PMON2000 3.3 (Bonito) #0: Tue Dec 22 01:58:09 UTC 2020 commit b3ece66234adbf7d4e453f0ba4f326c099ac2a76 Author: Jiaxun Yang <jiaxun.yang@flygoat.com> Date: Tue Dec 22 09:51:10 2020 +0800 . console: Supported loaders [txt, srec, elf, bin] console: Supported filesystems [net, fat, fs, disk, iso9660, socket, tty, ram] console: This software may be redistributed under the BSD copyright. console: Copyright 2000-2002, Opsycon AB, Sweden. console: Copyright 2005, ICT CAS. console: CPU GODSON3 BogoMIPS: 1327 PASS (3.89 s) RESULTS : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCEL 0 JOB TIME : 4.38 s Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210112020708.62922-1-jiaxun.yang@flygoat.com> [PMD: Set timeout to 60sec, simply test for ''CPU GODSON3 BogoMIPS'] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2021-02-21Merge remote-tracking branch ↵Peter Maydell
'remotes/vivier2/tags/trivial-branch-for-6.0-pull-request' into staging Pull request trivial patches 20210220 # gpg: Signature made Sat 20 Feb 2021 12:34:21 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.0-pull-request: MAINTAINERS: Fix default-configs/ entries target/avr/cpu: Use device_class_set_parent_realize() hw/scsi/megasas: Remove pointless parenthesis u2f-passthru: put it into the 'misc' category tpm: put some tpm devices into the correct category nvdimm: put it into the 'storage' category vmmouse: put it into the 'input' category virtio-pmem: put it into the 'storage' category MAINTAINERS: add my github tree URL Fix SPDX-License-Identifier typos hw/block/fdc: Remove the check_media_rate property hw/i386/xen: Remove dead code Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-20MAINTAINERS: Fix default-configs/ entriesPhilippe Mathieu-Daudé
Update the F: line after the Meson refactor. Fixes: 1bb4cb1c338..73362fc0b0c ("default-configs: ...") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201117114656.1222555-1-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-20MAINTAINERS: add my github tree URLChristian Schoenebeck
I already used this github URL for PRs before and will continue to use it in foreseeable future. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <E1l5rYG-0005sv-87@lizzy.crudebyte.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-20MAINTAINERS: Add Bin Meng as co-maintainer for SD/MMC cardsPhilippe Mathieu-Daudé
There is new interest in the SD/MMC device emulation, so it would be good to have more than only one maintainer / reviewer for it. Bin Meng proved by his contributions a deep understanding of the SD cards internals, so let's add him to the corresponding section in the MAINTAINERS file. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Bin Meng <bin.meng@windriver.com> Message-Id: <20210216132841.1121653-1-f4bug@amsat.org>
2021-02-18Hexagon Update MAINTAINERS fileTaylor Simpson
Add Taylor Simpson as the Hexagon target maintainer Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1612763186-18161-2-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-02-18tests/acceptance: add a new set of tests to exercise pluginsAlex Bennée
This is just a simple test to count the instructions executed by a kernel. However a later test will detect a failure condition when icount is enabled. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210213130325.14781-16-alex.bennee@linaro.org>
2021-02-16MAINTAINERS: add myself maintainer for the clock frameworkLuc Michel
Also add Damien as a reviewer. Signed-off-by: Luc Michel <luc@lmichel.fr> Acked-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210211085318.2507-1-luc@lmichel.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-15MAINTAINERS: Add gdbstub.h to the "GDB stub" sectionPeter Maydell
The F: patterns in the "GDB stub" section forgot gdbstub.h; add it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210208113729.25170-1-peter.maydell@linaro.org> Message-Id: <20210211122750.22645-10-alex.bennee@linaro.org>
2021-02-15.shippable: remove the last bitsAlex Bennée
Shippable is about to sunset in May 2021 [1] and we had already moved a chunk of the crossbuilds to GitLab. We already cross build mips-softmmu targets since: 6bcb5fc0f7 ("gitlab-ci: Add cross-compiling build tests") and x86 is very well covered. [1]: https://blog.shippable.com/the-next-step-in-the-evolution-of-shippable-jfrog-pipelines Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210211122750.22645-7-alex.bennee@linaro.org>
2021-02-15travis.yml: Move gprof/gcov test across to gitlabPhilippe Mathieu-Daudé
Similarly to commit 8cdb2cef3f1, move the gprof/gcov test to GitLab. The coverage-summary.sh script is not Travis-CI specific, make it generic. [thuth: Add gcovr and bsdmainutils which are required for the coverage-summary.sh script to the ubuntu docker file, and use 'check' as test target] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Message-Id: <20201108204535.2319870-10-philmd@redhat.com> Message-Id: <20210211045455.456371-2-thuth@redhat.com> Message-Id: <20210211122750.22645-2-alex.bennee@linaro.org>
2021-02-13Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-6.0-pull-request' ↵Peter Maydell
into staging Pull request m68k-20210212 Move bootinfo headers to include/standard-headers/asm-m68k Add M68K_FEATURE_MSP, M68K_FEATURE_MOVEC, M68K_FEATURE_M68010 Add 68060 CR BUSCR and PCR (unimplemented) CPU types and features cleanup # gpg: Signature made Fri 12 Feb 2021 21:14:28 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-for-6.0-pull-request: m68k: import bootinfo headers from linux m68k: add MSP detection support for stack pointer swap helpers m68k: MOVEC insn. should generate exception if wrong CR is accessed m68k: add missing BUSCR/PCR CR defines, and BUSCR/PCR/CAAR CR to m68k_move_to/from m68k: improve comments on m68k_move_to/from helpers m68k: cascade m68k_features by m680xx_cpu_initfn() to improve readability m68k: improve cpu instantiation comments Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-11m68k: import bootinfo headers from linuxLaurent Vivier
Copy bootinfo.h and bootinfo-mac.h from arch/m68k/include/uapi/asm/ to include/standard-headers/asm-m68k/ Imported from linux v5.9 but didn't change since v4.14 (header update) and since v4.10 (content update). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201220112615.933036-2-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-10multi-process: create IOHUB object to handle irqJagannathan Raman
IOHUB object is added to manage PCI IRQs. It uses KVM_IRQFD ioctl to create irqfd to injecting PCI interrupts to the guest. IOHUB object forwards the irqfd to the remote process. Remote process uses this fd to directly send interrupts to the guest, bypassing QEMU. Signed-off-by: John G Johnson <john.g.johnson@oracle.com> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 51d5c3d54e28a68b002e3875c59599c9f5a424a1.1611938319.git.jag.raman@oracle.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2021-02-10multi-process: Synchronize remote memoryJagannathan Raman
Add ProxyMemoryListener object which is used to keep the view of the RAM in sync between QEMU and remote process. A MemoryListener is registered for system-memory AddressSpace. The listener sends SYNC_SYSMEM message to the remote process when memory listener commits the changes to memory, the remote process receives the message and processes it in the handler for SYNC_SYSMEM message. Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Signed-off-by: John G Johnson <john.g.johnson@oracle.com> Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 04fe4e6a9ca90d4f11ab6f59be7652f5b086a071.1611938319.git.jag.raman@oracle.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2021-02-10multi-process: introduce proxy objectElena Ufimtseva
Defines a PCI Device proxy object as a child of TYPE_PCI_DEVICE. Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Signed-off-by: John G Johnson <john.g.johnson@oracle.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: b5186ebfedf8e557044d09a768846c59230ad3a7.1611938319.git.jag.raman@oracle.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2021-02-10multi-process: setup memory manager for remote deviceJagannathan Raman
SyncSysMemMsg message format is defined. It is used to send file descriptors of the RAM regions to remote device. RAM on the remote device is configured with a set of file descriptors. Old RAM regions are deleted and new regions, each with an fd, is added to the RAM. Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Signed-off-by: John G Johnson <john.g.johnson@oracle.com> Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 7d2d1831d812e85f681e7a8ab99e032cf4704689.1611938319.git.jag.raman@oracle.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2021-02-10multi-process: Associate fd of a PCIDevice with its objectJagannathan Raman
Associate the file descriptor for a PCIDevice in remote process with DeviceState object. Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Signed-off-by: John G Johnson <john.g.johnson@oracle.com> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: f405a2ed5d7518b87bea7c59cfdf334d67e5ee51.1611938319.git.jag.raman@oracle.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>