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2024-11-05Merge tag 'mips-20241104' of https://github.com/philmd/qemu into stagingPeter Maydell
MIPS patches queue - Migrate missing CP0 TLB MemoryMapID register (Yongbok) - Enable MSA ASE for mips32r6-generic (Aleksandar) - Convert Loongson LEXT opcodes to decodetree (Philippe) - Introduce ase_3d_available and disas_mt_available helpers (Philippe) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmcopxgACgkQ4+MsLN6t # wN4DzQ//UPDSvcwCj6QIZ2TR2oKG5JIVRYrep7aUb+LdK1uus8P2G9REMnr1X/uC # 817aiUC6fK/PJEGAo6dTCKrPnMz71YAHM2259jreQXVZtCzOEzU9Fg9RHBCrbzxP # +kL+Sjzvnw3Kp0jVB1sgNn8PhKCkIVg9Go6tr4sXyTjINzsNbk78H6w3O4YlFOSX # dbQLWDpFQQRvliiSJR5erQyELs1tVJt+76aab9mM7uWvSbpX/6O80bJ607fUFG8J # t07c5u6aOU1MaZrGE5KO6G7BQwqYE/O3lGAd1akj8UMQNxJY8lrS+4bxH9+vjJTF # ojRdTRGa2cXC1wxiifFphUNfJe2fH+Wvjtdpgnu3vdp17J0wbnJyw5PmZolS2RI6 # w9rAn1xnF2C/2HVZw37+Ghf+sdR9EgewgPAGoU1bKN4iQVE7FX1B4B6rIuq5Zxje # l2EFyFzkVWFDd+uy62o6WdH8mgwlHySxUkDeUgLLJwjupVKKvm4FCs0r8CE3g5RZ # GkHW6iOVg7QqR4OveGe3BGVK41Gex/iU7WNDWqQ2xqXDywnyFuTQVs/y2b7dPtMd # dbcQ6a/zFQl+WdhhnE5S1Y4Pjfw0TQ/+nKd+jc8lme8eihUbPvETfDLk3j0JI9xd # eXf4plnVMy33qvlLG4GVYzjYU+jNlGK1KCBcBFccFWasLo75Lyk= # =Ocl+ # -----END PGP SIGNATURE----- # gpg: Signature made Mon 04 Nov 2024 10:51:04 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'mips-20241104' of https://github.com/philmd/qemu: target/mips: Remove unused CPUMIPSState::current_fpu field target/mips: Introduce disas_mt_available() target/mips: Introduce ase_3d_available() helper target/mips: Remove unreachable 32-bit code on 64-bit Loongson Ext target/mips: Convert Loongson [D]MULT[U].G opcodes to decodetree target/mips: Convert Loongson [D]MOD[U].G opcodes to decodetree target/mips: Convert Loongson [D]DIVU.G opcodes to decodetree target/mips: Convert Loongson DIV.G opcodes to decodetree target/mips: Convert Loongson DDIV.G opcodes to decodetree target/mips: Re-introduce OPC_ADDUH_QB_DSP and OPC_MUL_PH_DSP target/mips: Simplify Loongson MULTU.G opcode target/mips: Extract decode_64bit_enabled() helper target/mips: Enable MSA ASE for mips32r6-generic target/mips: Migrate TLB MemoryMapID register Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-05rust: do not use --generate-cstrPaolo Bonzini
--generate-cstr is a good idea and generally the right thing to do, but it is not available in Debian 12 and Ubuntu 22.04. Work around the absence. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: allow version 1.63.0 of rustcPaolo Bonzini
All constructs introduced by newer versions of Rust have been removed. Apart from Debian 12, all other supported Linux distributions have rustc 1.75.0 or newer. This means that they only lack c"" literals and stable offset_of!. Tested-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: clean up detection of the languagePaolo Bonzini
Disable the detection code altogether if have_system == false. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: do not use MaybeUninit::zeroed()Paolo Bonzini
MaybeUninit::zeroed() is handy but is not available as a "const" function until Rust 1.75.0. Remove the default implementation of Zeroable::ZERO, and write by hand the definitions for those types that need it. It may be possible to add automatic implementation of the trait, via a procedural macro and/or a trick similar to offset_of!, but do it the easy way for now. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: introduce alternative implementation of offset_of!Junjie Mao
offset_of! was stabilized in Rust 1.77.0. Use an alternative implemenation that was found on the Rust forums, and whose author agreed to license as MIT for use in QEMU. The alternative allows only one level of field access, but apart from this can be used just by replacing core::mem::offset_of! with qemu_api::offset_of!. The actual implementation of offset_of! is done in a declarative macro, but for simplicity and to avoid introducing an extra level of indentation, the trigger is a procedural macro #[derive(offsets)]. The procedural macro is perhaps a bit overengineered, but it helps introducing some idioms that will be useful in the future as well. Signed-off-by: Junjie Mao <junjie.mao@hotmail.com> Co-developed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: create a cargo workspacePaolo Bonzini
Workspaces allows tracking dependencies for multiple crates at once, by having a single Cargo.lock file at the top of the rust/ tree. Because QEMU's Cargo.lock files have to be synchronized with the versions of crates in subprojects/, using a workspace avoids the need to copy over the Cargo.lock file when adding a new device (and thus a new crate) under rust/hw/. In addition, workspaces let cargo download and build dependencies just once. While right now we have one leaf crate (hw/char/pl011), this will not be the case once more devices are added. Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: synchronize dependencies between subprojects and Cargo.lockPaolo Bonzini
The next commit will introduce a new build.rs dependency for rust/qemu-api, version_check. Before adding it, ensure that all dependencies are synchronized between the Meson- and cargo-based build systems. Note that it's not clear whether in the long term we'll use Cargo for anything; it seems that the three main uses (clippy, rustfmt, rustdoc) can all be invoked manually---either via glue code in QEMU, or by extending Meson to gain the relevant functionality. However, for the time being we're stuck with Cargo so it should at least look at the same code as the rest of the build system. Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: silence unknown warnings for the sake of old compilersPaolo Bonzini
Occasionally, we may need to silence warnings and clippy lints that were only introduced in newer Rust compiler versions. However, this would fail when compiling with an older rustc: error: unknown lint: `non_local_definitions` --> rust/qemu-api/rust-qemu-api-tests.p/structured/offset_of.rs:79:17 So by default we need to block the unknown_lints warning. To avoid misspelled lints or other similar issues, re-enable it in the CI job that uses nightly rust. Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: introduce a c_str macroPaolo Bonzini
This allows CStr constants to be defined easily on Rust 1.63.0, while checking that there are no embedded NULs. c"" literals were only stabilized in Rust 1.77.0. Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: use std::os::raw instead of core::ffiPaolo Bonzini
core::ffi::c_* types were introduced in Rust 1.64.0. Use the older types in std::os::raw, which are now aliases of the types in core::ffi. There is no need to compile QEMU as no_std, so this is acceptable as long as we support a version of Debian with Rust 1.63.0. Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: fix cfgs of proc-macro2 for 1.63.0Paolo Bonzini
Replay the configuration that would be computed by build.rs when compiling on a 1.63.0 compiler. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: patch bilge-impl to allow compilation with 1.63.0Paolo Bonzini
Apply a patch that removes "let ... else" constructs, replacing them with "if let ... else" or "let ... = match ...". "let ... else" was stabilized in Rust 1.65.0. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust/pl011: Use correct masks for IBRD and FBRDManos Pitsidianakis
Port fix from commit cd247eae16ab1b9ce97fd34c000c1b883feeda45 "hw/char/pl011: Use correct masks for IBRD and FBRD" Related issue: <https://gitlab.com/qemu-project/qemu/-/issues/2610> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241024-rust-round-2-v1-9-051e7a25b978@linaro.org
2024-11-05rust/pl011: remove commented out C codeManos Pitsidianakis
This code juxtaposed what should be happening according to the C device model but is not needed now that this has been reviewed (I hope) and its validity checked against what the C device does (I hope, again). No functional change. Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241024-rust-round-2-v1-8-051e7a25b978@linaro.org
2024-11-05rust/pl011: add TYPE_PL011_LUMINARY deviceManos Pitsidianakis
Add a device specialization for the Luminary UART device. This commit adds a DeviceId enum that utilizes the Index trait to return different bytes depending on what device id the UART has (Arm -default- or Luminary) Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Tested-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20241024-rust-round-2-v1-6-051e7a25b978@linaro.org
2024-11-05rust/pl011: move CLK_NAME static to function scopeManos Pitsidianakis
We do not need to have CLK_NAME public nor a static. No functional change. Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241024-rust-round-2-v1-5-051e7a25b978@linaro.org
2024-11-05rust/pl011: add support for migrationManos Pitsidianakis
Declare the vmstate description of the PL011 device. Based on a patch by Manos Pitsidianakis (https://lore.kernel.org/qemu-devel/20241024-rust-round-2-v1-4-051e7a25b978@linaro.org/). Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241024-rust-round-2-v1-4-051e7a25b978@linaro.org
2024-11-05rust/pl011: fix default value for migrate-clockPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: add definitions for vmstateManos Pitsidianakis
Add a new qemu_api module, `vmstate`. Declare a bunch of Rust macros declared that are equivalent in spirit to the C macros in include/migration/vmstate.h. For example the Rust of equivalent of the C macro: VMSTATE_UINT32(field_name, struct_name) is: vmstate_uint32!(field_name, StructName) This breathtaking development will allow us to reach feature parity between the Rust and C pl011 implementations. Extracted from a patch by Manos Pitsidianakis (https://lore.kernel.org/qemu-devel/20241024-rust-round-2-v1-4-051e7a25b978@linaro.org/). Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: do not use TYPE_CHARDEV unnecessarilyPaolo Bonzini
In the invocation of qdev_prop_set_chr(), "chardev" is the name of a property rather than a type and has to match the name of the property in device_class.rs. Do not use TYPE_CHARDEV here, just like in the C version of pl011_create. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: provide safe wrapper for MaybeUninit::zeroed()Paolo Bonzini
MaybeUninit::zeroed() is handy, but it introduces unsafe (and has a pretty heavy syntax in general). Introduce a trait that provides the same functionality while staying within safe Rust. In addition, MaybeUninit::zeroed() is not available as a "const" function until Rust 1.75.0, so this also prepares for having handwritten implementations of the trait until we can assume that version. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: make properties array immutablePaolo Bonzini
Now that device_class_set_props() takes a const pointer, the only part of "define_property!" that needs to be non-const is the call to try_into(). This in turn will only break if offset_of returns a value with the most significant bit set (i.e. a struct size that is >=2^31 or >= 2^63, respectively on 32- and 64-bit system), which is impossible. Just use a cast and clean everything up to remove the run-time initialization. This also removes a use of OnceLock, which was only stabilized in 1.70.0. Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: clean up define_property macroPaolo Bonzini
Use the "struct update" syntax to initialize most of the fields to zero, and simplify the handmade type-checking of $name. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: cleanup module_init!, use it from #[derive(Object)]Paolo Bonzini
Remove the duplicate code by using the module_init! macro; at the same time, simplify how module_init! is used, by taking inspiration from the implementation of #[derive(Object)]. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: build integration test for the qemu_api cratePaolo Bonzini
Adjust the integration test to compile with a subset of QEMU object files, and make it actually create an object of the class it defines. Follow the Rust filesystem conventions, where tests go in tests/ if they use the library in the same way any other code would. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: modernize link_section usage for ELF platformsPaolo Bonzini
Some newer ABI implementations do not provide .ctors; and while some linkers rewrite .ctors into .init_array, not all of them do. Use the newer .init_array ABI, which works more reliably, and apply it to all non-Apple, non-Windows platforms. This is similar to how the ctor crate operates; without this change, "#[derive(Object)]" does not work on Fedora 41. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: remove uses of #[no_mangle]Paolo Bonzini
Mangled symbols do not cause any issue; disabling mangling is only useful if C headers reference the Rust function, which is not the case here. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: do not use --no-size_t-is-usizePaolo Bonzini
This is not necessary and makes it harder to write code that is portable between 32- and 64-bit systems: it adds extra casts even though size_of, align_of or offset_of already return the right type. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: do not always select X_PL011_RUSTPaolo Bonzini
Right now the Rust pl011 device is included in all QEMU system emulator binaries if --enable-rust is passed. This is not needed since the board logic in hw/arm/Kconfig will pick it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05meson: pass rustc_args when building all cratesPaolo Bonzini
rustc_args is needed to smooth the difference in warnings between the various versions of rustc. Always include those arguments. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05meson: remove repeated search for rust_root_crate.shPaolo Bonzini
Avoid repeated lines of the form Program scripts/rust/rust_root_crate.sh found: YES (/home/pbonzini/work/upstream/qemu/scripts/rust/rust_root_crate.sh) in the meson logs. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05meson: import rust module into a global variablePaolo Bonzini
Tested-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05rust: add PL011 device modelManos Pitsidianakis
This commit adds a re-implementation of hw/char/pl011.c in Rust. How to build: 1. Configure a QEMU build with: --enable-system --target-list=aarch64-softmmu --enable-rust 2. Launching a VM with qemu-system-aarch64 should use the Rust version of the pl011 device Co-authored-by: Junjie Mao <junjie.mao@intel.com> Co-authored-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Junjie Mao <junjie.mao@intel.com> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241024-rust-round-2-v1-2-051e7a25b978@linaro.org
2024-11-05Revert "rust: add PL011 device model"Manos Pitsidianakis
Patch was applied with invalid authorship by accident, which confuses git tooling that look at git blame for contributors etc. Patch will be re-applied with correct authorship right after this commit. This reverts commit d0f0cd5b1f7e9780753344548e17ad4df9fcf5d8. Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241024-rust-round-2-v1-1-051e7a25b978@linaro.org
2024-11-05rust/wrapper.h: define memory_order enumManos Pitsidianakis
Add stub definition of memory_order enum in wrapper.h. Creating Rust bindings from C code is done by passing the wrapper.h header to `bindgen`. This fails when library dependencies that use compiler headers are enabled, and the libclang that bindgen detects does not match the expected clang version. So far this has only been observed with the memory_order enum symbols from stdatomic.h. If we add the enum definition to wrapper.h ourselves, the error does not happen. Before this commit, if the mismatch happened the following error could come up: /usr/include/liburing/barrier.h:72:10: error: use of undeclared identifier 'memory_order_release' /usr/include/liburing/barrier.h:75:9: error: use of undeclared identifier 'memory_order_acquire' /usr/include/liburing/barrier.h:75:9: error: use of undeclared identifier 'memory_order_acquire' /usr/include/liburing/barrier.h:68:9: error: use of undeclared identifier 'memory_order_relaxed' /usr/include/liburing/barrier.h:65:17: error: use of undeclared identifier 'memory_order_relaxed' /usr/include/liburing/barrier.h:75:9: error: use of undeclared identifier 'memory_order_acquire' /usr/include/liburing/barrier.h:75:9: error: use of undeclared identifier 'memory_order_acquire' /usr/include/liburing/barrier.h:72:10: error: use of undeclared identifier 'memory_order_release' panicked at [..]/.cargo/registry/src/index.crates.io-6f17d22bba15001f/bindgen-cli-0.70.1/main.rs:45:36: Unable to generate bindings To fix this (on my system) I would have to export CLANG_PATH and LIBCLANG_PATH: export CLANG_PATH=/bin/clang-17 export LIBCLANG_PATH=/usr/lib/llvm-17/lib With these changes applied, bindgen is successful with both the environment variables set and unset. Since we're not using those symbols in the bindings (they are only used by dependencies) this does not affect the generated bindings in any way. Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Link: https://lore.kernel.org/r/20241027-rust-wrapper-stdatomic-v2-1-dab27bbf93ea@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05qdev: make properties array "const"Paolo Bonzini
Constify all accesses to qdev properties, except for the ObjectPropertyAccessor itself. This makes it possible to place them in read-only memory, and also lets Rust bindings switch from "static mut" arrays to "static"; which is advantageous, because mutable statics are highly discouraged. Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-11-05tests/tcg: Add SIGRTMIN/SIGRTMAX testIlya Leoshkevich
Test the lowest and the highest real-time signals. This requires configuring the real-time signal mapping, and therefore some knowledge about the host. To this end, pass the emulator path in the QEMU environment variable to all tests (this should not disturb the existing ones), and assume that all hosts have signals 36-39 available. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20241029232211.206766-3-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-11-05linux-user: Allow custom rt signal mappingsIlya Leoshkevich
Some applications want to use low priority realtime signals (e.g., SIGRTMAX). Currently QEMU cannot map all target realtime signals to host realtime signals, and chooses to sacrifice the end of the target realtime signal range. Allow users to choose how to map target realtime signals to host realtime signals using the new -t option, the new QEMU_RTSIG_MAP environment variable, and the new -Drtsig_map=\"...\" meson flag. To simplify things, the meson flag is not per-target, because the intended use case is app-specific qemu-user builds. The mapping is specified using the "tsig hsig count[,...]" syntax. Target realtime signals [tsig,tsig+count) are mapped to host realtime signals [hsig,hsig+count). Care is taken to avoid double and out-of-range mappings. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20241029232211.206766-2-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-11-05linux-user: Fix GDB complaining about system-supplied DSO string table indexIlya Leoshkevich
When debugging qemu-user processes using gdbstub, the following warning appears every time: warning: BFD: warning: system-supplied DSO at 0x7f8253cc3000 has a corrupt string table index The reason is that QEMU does not map the VDSO's section headers. The VDSO's ELF header's e_shoff points to zeros, which GDB fails to parse. The difference with the kernel's VDSO is that the latter is mapped as a blob, ignoring program headers - which also don't cover the section table. QEMU, on the other hand, loads it as an ELF file. There appears to be no way to place section headers inside a section, and, therefore, no way to refer to them from a linker script. Also, ld hardcodes section headers to be non-loadable, see _bfd_elf_assign_file_positions_for_non_load(). In theory ld could be enhanced by implementing an "SHDRS" keyword in addition to the existing "FILEHDR" and "PHDRS". There are multiple ways to resolve the issue: - Copy VDSO as a blob in load_elf_vdso(). This would require creating specialized loader logic, that duplicates parts of load_elf_image(). - Fix up VDSO's PHDR size in load_elf_vdso(). This would require either duplicating the parsing logic, or adding an ugly parameter to load_elf_image(). - Fix up VDSO's PHDR size in gen-vdso. This is the simplest solution, so do it. There are two tricky parts: - Byte-swaps need to be done either on local copies, or in-place and then reverted in the end. To preserve the existing code structure, do the former for Sym and Dyn, and the latter for Ehdr, Phdr, and Shdr. - There must be no .bss, which is already the case - but having an explicit check is helpful to ensure correctness. To verify this change, I diffed the on-disk and the loaded VDSOs; the result does not show anything unusual, except for what seems to be an existing oversight (which should probably be fixed separately): │ Symbol table '.dynsym' contains 8 entries: │ Num: Value Size Type Bind Vis Ndx Name │ - 0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND │ - 6: 0000000000000000 0 OBJECT GLOBAL DEFAULT ABS LINUX_2.6.29 │ + 0: 00007f61075bf000 0 NOTYPE LOCAL DEFAULT UND │ + 6: 00007f61075bf000 0 OBJECT GLOBAL DEFAULT ABS LINUX_2.6.29 Fixes: 2fa536d10797 ("linux-user: Add gen-vdso tool") Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20241023202850.55211-1-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-11-05tests/tcg: Replace -mpower8-vector with -mcpu=power8Ilya Leoshkevich
[1] deprecated -mpower8-vector, resulting in: powerpc64-linux-gnu-gcc: warning: switch '-mpower8-vector' is no longer supported qemu/tests/tcg/ppc64/vsx_f2i_nan.c:4:15: error: expected ';' before 'float' 4 | typedef vector float vsx_float32_vec_t; | ^~~~~~ Use -mcpu=power8 instead. In order to properly verify that this works, one needs a big-endian (the minimum supported CPU for 64-bit little-endian is power8 anyway) GCC configured with --enable-checking (see GCC commit e154242724b0 ("[RS6000] Don't pass -many to the assembler"). [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109987 Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20241023131250.48510-1-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-11-05target/arm: Enable FEAT_CMOW for -cpu maxGustavo Romero
FEAT_CMOW introduces support for controlling cache maintenance instructions executed in EL0/1 and is mandatory from Armv8.8. On real hardware, the main use for this feature is to prevent processes from invalidating or flushing cache lines for addresses they only have read permission, which can impact the performance of other processes. QEMU implements all cache instructions as NOPs, and, according to rule [1], which states that generating any Permission fault when a cache instruction is implemented as a NOP is implementation-defined, no Permission fault is generated for any cache instruction when it lacks read and write permissions. QEMU does not model any cache topology, so the PoU and PoC are before any cache, and rules [2] apply. These rules state that generating any MMU fault for cache instructions in this topology is also implementation-defined. Therefore, for FEAT_CMOW, we do not generate any MMU faults either, instead, we only advertise it in the feature register. [1] Rule R_HGLYG of section D8.14.3, Arm ARM K.a. [2] Rules R_MZTNR and R_DNZYL of section D8.14.3, Arm ARM K.a. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241104142606.941638-1-gustavo.romero@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-05hw/net/npcm_gmac: Change error log to trace eventNabih Estefan
Convert the LOG_GUEST_ERROR for the "tx descriptor is owned by software" to a trace message. This condition is normal when there is there is nothing to transmit, and we would otherwise spam the logs with it in that situation. Signed-off-by: Nabih Estefan <nabihestefan@google.com> Signed-off-by: Roque Arcudia Hernandez <roqueh@google.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241014184847.1594056-1-roqueh@google.com [PMM: tweaked commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-05hw/sensor/tmp105: Convert printf() to trace event, add tracing for ↵Bernhard Beschow
read/write access printf() unconditionally prints to the console which disturbs `-serial stdio`. Fix that by converting into a trace event. While at it, add some tracing for read and write access. Fixes: 7e7c5e4c1ba5 "Nokia N800 machine support (ARM)." Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241103143330.123596-5-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-05hw/watchdog/wdt_imx2: Remove redundant assignmentBernhard Beschow
The same statement is executed unconditionally right before the if statement. Cc: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241103143330.123596-4-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-05hw/timer/imx_gpt: Convert DPRINTF to trace eventsBernhard Beschow
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20241103143330.123596-3-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-05hw/rtc/ds1338: Trace send and receive operationsBernhard Beschow
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20241103143330.123596-2-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-05disas: Fix build against Capstone v6 (again)Richard Henderson
Like 9971cbac2f3, which set CAPSTONE_AARCH64_COMPAT_HEADER, also set CAPSTONE_SYSTEMZ_COMPAT_HEADER. Fixes the build against capstone v6-alpha. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org> Message-id: 20241022013047.830273-1-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-05target/arm: Fix SVE SDOT/UDOT/USDOT (4-way, indexed)Peter Maydell
Our implementation of the indexed version of SVE SDOT/UDOT/USDOT got the calculation of the inner loop terminator wrong. Although we correctly account for the element size when we calculate the terminator for the first iteration: intptr_t segend = MIN(16 / sizeof(TYPED), opr_sz_n); we don't do that when we move it forward after the first inner loop completes. The intention is that we process the vector in 128-bit segments, which for a 64-bit element size should mean (1, 2), (3, 4), (5, 6), etc. This bug meant that we would iterate (1, 2), (3, 4, 5, 6), (7, 8, 9, 10) etc and apply the wrong indexed element to some of the operations, and also index off the end of the vector. You don't see this bug if the vector length is small enough that we don't need to iterate the outer loop, i.e. if it is only 128 bits, or if it is the 64-bit special case from AA32/AA64 AdvSIMD. If the vector length is 256 bits then we calculate the right results for the elements in the vector but do index off the end of the vector. Vector lengths greater than 256 bits see wrong answers. The instructions that produce 32-bit results behave correctly. Fix the recalculation of 'segend' for subsequent iterations, and restore a version of the comment that was lost in the refactor of commit 7020ffd656a5 that explains why we only need to clamp segend to opr_sz_n for the first iteration, not the later ones. Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2595 Fixes: 7020ffd656a5 ("target/arm: Macroize helper_gvec_{s,u}dot_idx_{b,h}") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241101185544.2130972-1-peter.maydell@linaro.org
2024-11-05target/arm: Add new MMU indexes for AArch32 Secure PL1&0Peter Maydell
Our current usage of MMU indexes when EL3 is AArch32 is confused. Architecturally, when EL3 is AArch32, all Secure code runs under the Secure PL1&0 translation regime: * code at EL3, which might be Mon, or SVC, or any of the other privileged modes (PL1) * code at EL0 (Secure PL0) This is different from when EL3 is AArch64, in which case EL3 is its own translation regime, and EL1 and EL0 (whether AArch32 or AArch64) have their own regime. We claimed to be mapping Secure PL1 to our ARMMMUIdx_EL3, but didn't do anything special about Secure PL0, which meant it used the same ARMMMUIdx_EL10_0 that NonSecure PL0 does. This resulted in a bug where arm_sctlr() incorrectly picked the NonSecure SCTLR as the controlling register when in Secure PL0, which meant we were spuriously generating alignment faults because we were looking at the wrong SCTLR control bits. The use of ARMMMUIdx_EL3 for Secure PL1 also resulted in the bug that we wouldn't honour the PAN bit for Secure PL1, because there's no equivalent _PAN mmu index for it. Fix this by adding two new MMU indexes: * ARMMMUIdx_E30_0 is for Secure PL0 * ARMMMUIdx_E30_3_PAN is for Secure PL1 when PAN is enabled The existing ARMMMUIdx_E3 is used to mean "Secure PL1 without PAN" (and would be named ARMMMUIdx_E30_3 in an AArch32-centric scheme). These extra two indexes bring us up to the maximum of 16 that the core code can currently support. This commit: * adds the new MMU index handling to the various places where we deal in MMU index values * adds assertions that we aren't AArch32 EL3 in a couple of places that currently use the E10 indexes, to document why they don't also need to handle the E30 indexes * documents in a comment why regime_has_2_ranges() doesn't need updating Notes for backporting: this commit depends on the preceding revert of 4c2c04746932; that revert and this commit should probably be backported to everywhere that we originally backported 4c2c04746932. Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2326 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2588 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241101142845.1712482-3-peter.maydell@linaro.org