| Age | Commit message (Expand) | Author |
|---|
| 2024-09-22 | tcg/i386: Implement cmpsel_vec with avx512 insns | Richard Henderson |
| 2024-09-22 | tcg/i386: Add predicate parameters to tcg_out_evex_opc | Richard Henderson |
| 2024-09-22 | tcg/i386: Implement cmp_vec with avx512 insns | Richard Henderson |
| 2024-09-22 | tcg/i386: Optimize cmpsel with constant 0 operand 3. | Richard Henderson |
| 2024-09-22 | tcg/optimize: Optimize bitsel_vec | Richard Henderson |
| 2024-09-22 | tcg/optimize: Optimize cmp_vec and cmpsel_vec | Richard Henderson |
| 2024-09-22 | tcg/optimize: Fold movcond with true and false values identical | Richard Henderson |
| 2024-09-22 | tcg/s390x: Do not expand cmp_vec early | Richard Henderson |
| 2024-09-22 | tcg/ppc: Do not expand cmp_vec early | Richard Henderson |
| 2024-09-22 | tcg/i386: Do not expand cmpsel_vec early | Richard Henderson |
| 2024-09-22 | tcg/i386: Do not expand cmp_vec early | Richard Henderson |
| 2024-09-22 | tcg/i386: Split out tcg_out_vex_modrm_type | Richard Henderson |
| 2024-09-22 | tcg: Export vec_gen_6 | Richard Henderson |
| 2024-09-22 | tcg: Fix iteration step in 32-bit gvec operation | TANG Tiancheng |
| 2024-09-22 | tcg: Propagate new TCGOp to add_as_label_use | Richard Henderson |
| 2024-09-22 | tcg: Return TCGOp from tcg_gen_op[1-6] | Richard Henderson |
| 2024-09-19 | Merge tag 'pull-target-arm-20240919' of https://git.linaro.org/people/pmaydel... | Peter Maydell |
| 2024-09-19 | docs/devel: Remove nested-papr.txt | Peter Maydell |
| 2024-09-19 | target/arm: Correct ID_AA64ISAR1_EL1 value for neoverse-v1 | Peter Maydell |
| 2024-09-19 | kvm: Remove unreachable code in kvm_dirty_ring_reaper_thread() | Peter Maydell |
| 2024-09-19 | kvm: Make 'mmap_size' be 'int' in kvm_init_vcpu(), do_kvm_destroy_vcpu() | Peter Maydell |
| 2024-09-19 | tests: drop OpenBSD tests for aarch64/sbsa-ref | Marcin Juszkiewicz |
| 2024-09-19 | tests: expand timeout information for aarch64/sbsa-ref | Marcin Juszkiewicz |
| 2024-09-19 | tests: add FreeBSD tests for aarch64/sbsa-ref | Marcin Juszkiewicz |
| 2024-09-19 | tests: use default cpu for aarch64/sbsa-ref | Marcin Juszkiewicz |
| 2024-09-19 | hw/char/stm32l4x5_usart.c: Enable USART ACK bit response | Jacob Abrams |
| 2024-09-19 | target/arm: Convert scalar [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Convert vector [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Convert SQSHL, UQSHL, SQSHLU (immediate) to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Widen NeonGenNarrowEnvFn return to 64 bits | Richard Henderson |
| 2024-09-19 | target/arm: Convert VQSHL, VQSHLU to gvec | Richard Henderson |
| 2024-09-19 | target/arm: Convert handle_scalar_simd_shli to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Convert handle_scalar_simd_shri to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Convert SHRN, RSHRN to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Split out subroutines of handle_shri_with_rndacc | Richard Henderson |
| 2024-09-19 | target/arm: Push tcg_rnd into handle_shri_with_rndacc | Richard Henderson |
| 2024-09-19 | target/arm: Convert SSHLL, USHLL to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Use {, s}extract in handle_vec_simd_wshli | Richard Henderson |
| 2024-09-19 | target/arm: Convert handle_vec_simd_shli to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Convert handle_vec_simd_shri to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Fix whitespace near gen_srshr64_i64 | Richard Henderson |
| 2024-09-19 | target/arm: Introduce gen_gvec_sshr, gen_gvec_ushr | Richard Henderson |
| 2024-09-19 | target/arm: Convert MOVI, FMOV, ORR, BIC (vector immediate) to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Convert FMOVI (scalar, immediate) to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Convert FMAXNMV, FMINNMV, FMAXV, FMINV to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Convert ADDV, *ADDLV, *MAXV, *MINV to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Simplify do_reduction_op | Richard Henderson |
| 2024-09-19 | target/arm: Convert UZP, TRN, ZIP to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Convert TBL, TBX to decodetree | Richard Henderson |
| 2024-09-19 | target/arm: Convert EXT to decodetree | Richard Henderson |
