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AgeCommit message (Expand)Author
2021-10-29qapi: Mark unstable QMP parts with feature 'unstable'Markus Armbruster
2021-10-29qapi: New special feature flag "unstable"Markus Armbruster
2021-10-29target/riscv: change the api for RVF/RVD fmin/fmaxChih-Min Chao
2021-10-29softfloat: add APIs to handle alternative sNaN propagation for fmax/fminChih-Min Chao
2021-10-29target/riscv: remove force HS exceptionJose Martins
2021-10-29target/riscv: fix VS interrupts forwarding to HSJose Martins
2021-10-28Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20211028' into stagingRichard Henderson
2021-10-28softmmu: fix for "after access" watchpointsPavel Dovgalyuk
2021-10-28softmmu: remove useless condition in watchpoint checkPavel Dovgalyuk
2021-10-28softmmu: fix watchpoint processing in icount modePavel Dovgalyuk
2021-10-28tcg/optimize: Propagate sign info for shiftingRichard Henderson
2021-10-28tcg/optimize: Propagate sign info for bit countingRichard Henderson
2021-10-28tcg/optimize: Propagate sign info for setcondRichard Henderson
2021-10-28tcg/optimize: Propagate sign info for logical operationsRichard Henderson
2021-10-28tcg/optimize: Optimize sign extensionsRichard Henderson
2021-10-28tcg/optimize: Use fold_xx_to_i for remRichard Henderson
2021-10-28tcg/optimize: Use fold_xi_to_x for divRichard Henderson
2021-10-28tcg/optimize: Use fold_xi_to_x for mulRichard Henderson
2021-10-28tcg/optimize: Use fold_xx_to_i for orcRichard Henderson
2021-10-28tcg/optimize: Stop forcing z_mask to "garbage" for 32-bit valuesRichard Henderson
2021-10-28tcg: Extend call args using the correct opcodesRichard Henderson
2021-10-28Hexagon (target/hexagon) put writes to USR into temp until commitTaylor Simpson
2021-10-28Hexagon (target/hexagon) more tcg_constant_*Taylor Simpson
2021-10-28target/riscv: Allow experimental J-ext to be turned onAlexey Baturo
2021-10-28target/riscv: Implement address masking functions required for RISC-V Pointer...Anatoly Parshintsev
2021-10-28target/riscv: Support pointer masking for RISC-V for i/c/f/d/a types of instr...Alexey Baturo
2021-10-28target/riscv: Print new PM CSRs in QEMU logsAlexey Baturo
2021-10-28target/riscv: Add J extension state descriptionAlexey Baturo
2021-10-28target/riscv: Support CSRs required for RISC-V PM extension except for the h-...Alexey Baturo
2021-10-28target/riscv: Add CSR defines for RISC-V PM extensionAlexey Baturo
2021-10-28target/riscv: Add J-extension into RISC-VAlexey Baturo
2021-10-28hw/riscv: opentitan: Fixup the PLIC context addressesAlistair Francis
2021-10-28hw/riscv: virt: Use the PLIC config helper functionAlistair Francis
2021-10-28hw/riscv: microchip_pfsoc: Use the PLIC config helper functionAlistair Francis
2021-10-28hw/riscv: sifive_u: Use the PLIC config helper functionAlistair Francis
2021-10-28hw/riscv: boot: Add a PLIC config string functionAlistair Francis
2021-10-28hw/riscv: virt: Don't use a macro for the PLIC configurationAlistair Francis
2021-10-27tcg/optimize: Sink commutative operand swapping into fold functionsRichard Henderson
2021-10-27tcg/optimize: Expand fold_addsub2_i32 to 64-bit opsRichard Henderson
2021-10-27tcg/optimize: Expand fold_mulu2_i32 to all 4-arg multipliesRichard Henderson
2021-10-27tcg/optimize: Split out fold_masksRichard Henderson
2021-10-27tcg/optimize: Split out fold_ix_to_iRichard Henderson
2021-10-27tcg/optimize: Split out fold_xi_to_xRichard Henderson
2021-10-27tcg/optimize: Split out fold_sub_to_negRichard Henderson
2021-10-27tcg/optimize: Split out fold_to_notRichard Henderson
2021-10-27tcg/optimize: Add type to OptContextRichard Henderson
2021-10-27tcg/optimize: Split out fold_xi_to_iRichard Henderson
2021-10-27tcg/optimize: Split out fold_xx_to_xRichard Henderson
2021-10-27tcg/optimize: Split out fold_xx_to_iRichard Henderson
2021-10-27tcg/optimize: Split out fold_movRichard Henderson