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2022-10-04tcg/ppc: Optimize 26-bit jumpsLeandro Lupori
PowerPC64 processors handle direct branches better than indirect ones, resulting in less stalled cycles and branch misses. However, PPC's tb_target_set_jmp_target() was only using direct branches for 16-bit jumps, while PowerPC64's unconditional branch instructions are able to handle displacements of up to 26 bits. To take advantage of this, now jumps whose displacements fit in between 17 and 26 bits are also converted to direct branches. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Leandro Lupori <leandro.lupori@eldorado.org.br> [rth: Expanded some commentary.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-04accel/tcg: Introduce TARGET_TB_PCRELRichard Henderson
Prepare for targets to be able to produce TBs that can run in more than one virtual context. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-04accel/tcg: Introduce tb_pc and log_pcRichard Henderson
The availability of tb->pc will shortly be conditional. Introduce accessor functions to minimize ifdefs. Pass around a known pc to places like tcg_gen_code, where the caller must already have the value. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-04hw/core: Add CPUClass.get_pcRichard Henderson
Populate this new method for all targets. Always match the result that would be given by cpu_get_tb_cpu_state, as we will want these values to correspond in the logs. Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> (target/sparc) Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- Cc: Eduardo Habkost <eduardo@habkost.net> (supporter:Machine core) Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> (supporter:Machine core) Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org> (reviewer:Machine core) Cc: Yanan Wang <wangyanan55@huawei.com> (reviewer:Machine core) Cc: Michael Rolnik <mrolnik@gmail.com> (maintainer:AVR TCG CPUs) Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> (maintainer:CRIS TCG CPUs) Cc: Taylor Simpson <tsimpson@quicinc.com> (supporter:Hexagon TCG CPUs) Cc: Song Gao <gaosong@loongson.cn> (maintainer:LoongArch TCG CPUs) Cc: Xiaojuan Yang <yangxiaojuan@loongson.cn> (maintainer:LoongArch TCG CPUs) Cc: Laurent Vivier <laurent@vivier.eu> (maintainer:M68K TCG CPUs) Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> (reviewer:MIPS TCG CPUs) Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> (reviewer:MIPS TCG CPUs) Cc: Chris Wulff <crwulff@gmail.com> (maintainer:NiosII TCG CPUs) Cc: Marek Vasut <marex@denx.de> (maintainer:NiosII TCG CPUs) Cc: Stafford Horne <shorne@gmail.com> (odd fixer:OpenRISC TCG CPUs) Cc: Yoshinori Sato <ysato@users.sourceforge.jp> (reviewer:RENESAS RX CPUs) Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> (maintainer:SPARC TCG CPUs) Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> (maintainer:TriCore TCG CPUs) Cc: Max Filippov <jcmvbkbc@gmail.com> (maintainer:Xtensa TCG CPUs) Cc: qemu-arm@nongnu.org (open list:ARM TCG CPUs) Cc: qemu-ppc@nongnu.org (open list:PowerPC TCG CPUs) Cc: qemu-riscv@nongnu.org (open list:RISC-V TCG CPUs) Cc: qemu-s390x@nongnu.org (open list:S390 TCG CPUs)
2022-10-04include/hw/core: Create struct CPUJumpCacheRichard Henderson
Wrap the bare TranslationBlock pointer into a structure. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-04accel/tcg: Inline tb_flush_jmp_cacheRichard Henderson
This function has two users, who use it incompatibly. In tlb_flush_page_by_mmuidx_async_0, when flushing a single page, we need to flush exactly two pages. In tlb_flush_range_by_mmuidx_async_0, when flushing a range of pages, we need to flush N+1 pages. This avoids double-flushing of jmp cache pages in a range. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-04accel/tcg: Do not align tb->page_addr[0]Richard Henderson
Let tb->page_addr[0] contain the address of the first byte of the translated block, rather than the address of the page containing the start of the translated block. We need to recover this value anyway at various points, and it is easier to discard a page offset when it is not needed, which happens naturally via the existing find_page shift. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Use DisasContextBase in plugin_gen_tb_startRichard Henderson
Use the pc coming from db->pc_first rather than the TB. Use the cached host_addr rather than re-computing for the first page. We still need a separate lookup for the second page because it won't be computed for DisasContextBase until the translator actually performs a read from the page. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Use bool for page_find_allocRichard Henderson
Bool is more appropriate type for the alloc parameter. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Remove PageDesc code_bitmapRichard Henderson
This bitmap is created and discarded immediately. We gain nothing by its existence. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220822232338.1727934-2-richard.henderson@linaro.org>
2022-10-03include/exec: Introduce TARGET_PAGE_ENTRY_EXTRARichard Henderson
Allow the target to cache items from the guest page tables. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Introduce tlb_set_page_fullRichard Henderson
Now that we have collected all of the page data into CPUTLBEntryFull, provide an interface to record that all in one go, instead of using 4 arguments. This interface allows CPUTLBEntryFull to be extended without having to change the number of arguments. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Introduce probe_access_fullRichard Henderson
Add an interface to return the CPUTLBEntryFull struct that goes with the lookup. The result is not intended to be valid across multiple lookups, so the user must use the results immediately. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Suppress auto-invalidate in probe_access_internalRichard Henderson
When PAGE_WRITE_INV is set when calling tlb_set_page, we immediately set TLB_INVALID_MASK in order to force tlb_fill to be called on the next lookup. Here in probe_access_internal, we have just called tlb_fill and eliminated true misses, thus the lookup must be valid. This allows us to remove a warning comment from s390x. There doesn't seem to be a reason to change the code though. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Drop addr member from SavedIOTLBRichard Henderson
This field is only written, not read; remove it. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFullRichard Henderson
This structure will shortly contain more than just data for accessing MMIO. Rename the 'addr' member to 'xlat_section' to more clearly indicate its purpose. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03cputlb: used cached CPUClass in our hot-pathsAlex Bennée
Before: 35.912 s ± 0.168 s After: 35.565 s ± 0.087 s Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220811151413.3350684-5-alex.bennee@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220923084803.498337-5-clg@kaod.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03hw/core/cpu-sysemu: used cached class in cpu_asidx_from_attrsAlex Bennée
This is a heavily used function so lets avoid the cost of CPU_GET_CLASS. On the romulus-bmc run it has a modest effect: Before: 36.812 s ± 0.506 s After: 35.912 s ± 0.168 s Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220811151413.3350684-4-alex.bennee@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220923084803.498337-4-clg@kaod.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03cpu: cache CPUClass in CPUState for hot code pathsAlex Bennée
The class cast checkers are quite expensive and always on (unlike the dynamic case who's checks are gated by CONFIG_QOM_CAST_DEBUG). To avoid the overhead of repeatedly checking something which should never change we cache the CPUClass reference for use in the hot code paths. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220811151413.3350684-3-alex.bennee@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220923084803.498337-3-clg@kaod.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03Merge tag 'for-upstream' of git://repo.or.cz/qemu/kevin into stagingStefan Hajnoczi
Block layer patches - Fix missing block_acct_setup() with -blockdev - Keep auto_backing_file post-migration - file-posix: Fixed O_DIRECT memory alignment - ide: Fix state after EXECUTE DEVICE DIAGNOSTIC and implement INITIALIZE DEVICE PARAMETERS - qemu-img: Wean documentation and help output off '?' for help - qcow2: fix memory leak and compiler warning - Code cleanups # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmM3Hm4RHGt3b2xmQHJl # ZGhhdC5jb20ACgkQfwmycsiPL9ZhqA//WGN9tlx3Pf1D6SG3PtIG6/2DOJ6/gVNw # R17BwoGTw36Nmt9xDzrHih753dcguLS19Kd6EySTg6j8mPogmFszquORMgGmcYcW # 0KtneRR7Y9XsamIGgentek1zsWajsP5muvZQF+hFJyZ24MZtWB+5Ucw2VuUTWnRl # YaKP/tGMP5sC8nK3Npste/o7yh9Wgv4cv/mdKuyKoxjZhELeTTpHoTC2IZK9bV5I # Bh19zjPRUPodm37nzONruUVzn53xKK3Qn26ZT5Hgx39HOdccPEu9N8wawQyqLr/x # 2whcn8kFfpFBLLxVbMYjwcWNo41SCn1itRcgV38PilBvG2UInUFK2QCmVgYxWluB # 9I5sRasfD3/BPPmw3n+j2TRJ+uvrLkkwXqIhAg+mAeiS0MccWUnLhJLW2S1Yai5L # nkjkLmuV7KCLQTY39WvKBq0TPgj3QR0WJtEYHuUDtduvzKxAWd47Ff1tEPvFm5Ys # RpmLSUQdPZiOkiwnV1qVg6a3gbIjUcT0Pai/Knc3iYrwCWLdNSCGoPkVemOg5wvN # GxsQcKnfayQqIdZU6lBQehUjPamm3ffAEELeqLQXCbZe9lsbhNBXLJjVnA3cOu3f # 1PX6w+4MNeTg5ZekUJGS1fnYlq9CDOWGSv37+csB8dBhi6vQTc6YjABWU1IrB0S5 # 1ihOYtc8fOo= # =IIJz # -----END PGP SIGNATURE----- # gpg: Signature made Fri 30 Sep 2022 12:50:54 EDT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * tag 'for-upstream' of git://repo.or.cz/qemu/kevin: hw/ide/core.c: Implement ATA INITIALIZE_DEVICE_PARAMETERS command tests/qtest/ide-test: Verify that DIAGNOSTIC clears DEV to zero hw/ide/core: Clear LBA and drive bits for EXECUTE DEVICE DIAGNOSTIC tests/qtest/ide-test.c: Create disk image for use as a secondary piix_ide_reset: Use pci_set_* functions instead of direct access block: use the request length for iov alignment block: move bdrv_qiov_is_aligned to file-posix iotests/backing-file-invalidation: Add new test block/qed: Keep auto_backing_file if possible block/qcow2: Keep auto_backing_file if possible gluster: stop using .bdrv_needs_filename block: make serializing requests functions 'void' block: use bdrv_is_sg() helper instead of raw bs->sg reading block: add missed block_acct_setup with new block device init procedure block: pass OnOffAuto instead of bool to block_acct_setup() qemu-img: Wean documentation and help output off '?' for help block/qcow2-bitmap: Add missing cast to silent GCC error qcow2: fix memory leak in qcow2_read_extensions Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-10-03Merge tag 'pull-target-arm-20220930' of ↵Stefan Hajnoczi
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * Fix breakage of icount mode when guest touches MDCR_EL3, MDCR_EL2, PMCNTENSET_EL0 or PMCNTENCLR_EL0 * Make writes to MDCR_EL3 use PMU start/finish calls * Let AArch32 write to SDCR.SCCD * Rearrange cpu64.c so all the CPU initfns are together * hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllers * hw/arm/virt: fix some minor issues with generated device tree * Fix regression where EL3 could not write to SP_EL1 if there is no EL2 # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmM28EYZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3mw9D/44e72KHZdfr3F/Cmd0Jku2 # g5NQ4ooKV90rY4Y4+/VR9Z2k7a72lWFgFl7/54AKXSZsZSmNomeh2WxWJAs1lA2W # 4rmGPlLwxZYMQumYcMOArYxJQgRK5exVtE6ECKM/JERjhKSbnL1lyLWGUyLtFJfq # SjxoTWEigPHu+0fX/nk04rFzrA6Bo1qKQqZZTuN9zcT6JXyQMjZNF89Fxy9OlV4s # dlOXsZILV8oREnGdDFPYLgwSTMn+1rrD8xfjK/DTQrlUVX/9zhlIeKg5O4JadxCy # 8ThIFCyODUanlRvyjHiwvcvStHn8wwyCp4uJrxmZGyyp4t4u3etG0hpsZaPtiN9O # NKtad4Aoc6lSmIDhYYZA1LIIdSIeyUPD/LyWTd+qKK7A7mxH6ORr0uyjhb01jWs3 # ceyne1i0n66oRLbHxPyjQEkLqwLl2CsqWr41BNM5RVoYjCU8HYSvEwlh7t+EZCL5 # IRkfAWJkA9bdXL30ZmYSzJ7hfvVkWhDsHD+eOzAcsxoApgzI5Mfi7gCIZ+LNY20P # W0akGbA6l0InsmIcBpyXEztPOi6tOD/J55qeOCrzHjgfhoJWCoa/mS8bVqN0mKIA # yJ7QbiK/JY6+G1v2oM8aARLn8/C7oLnMYiKntXNBMj67Ry5GwjDt+A37MUHgQbZb # yUzUjr3O2N1qJRKi+Dd7eA== # =edYy # -----END PGP SIGNATURE----- # gpg: Signature made Fri 30 Sep 2022 09:33:58 EDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20220930' of https://git.linaro.org/people/pmaydell/qemu-arm: target/arm: mark SP_EL1 with ARM_CP_EL3_NO_EL2_KEEP hw/arm/virt: Fix devicetree warning about the SMMU node hw/arm/virt: Use "msi-map" devicetree property for PCI hw/arm/virt: Fix devicetree warning about the GIC node hw/arm/virt: Fix devicetree warning about the root node hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllers target/arm: Rearrange cpu64.c so all the CPU initfns are together target/arm: Update SDCR_VALID_MASK to include SCCD target/arm: Make writes to MDCR_EL3 use PMU start/finish calls target/arm: Mark registers which call pmu_op_start() as ARM_CP_IO Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-09-30hw/ide/core.c: Implement ATA INITIALIZE_DEVICE_PARAMETERS commandLev Kujawski
CHS-based disk utilities and operating systems may adjust the logical geometry of a hard drive to cope with the expectations or limitations of software using the ATA INITIALIZE_DEVICE_PARAMETERS command. Prior to this patch, INITIALIZE_DEVICE_PARAMETERS was a nop that always returned success, raising the possibility of data loss or corruption if the CHS<->LBA translation redirected a write to the wrong sector. * hw/ide/core.c ide_reset(): Reset the logical CHS geometry of the hard disk when the power-on defaults feature is enabled. cmd_specify(): a) New function implementing INITIALIZE_DEVICE_PARAMETERS. b) Ignore calls for empty or ATAPI devices. cmd_set_features(): Implement the power-on defaults enable and disable features. struct ide_cmd_table: Switch WIN_SPECIFY from cmd_nop() to cmd_specify(). ide_init_drive(): Set new fields 'drive_heads' and 'drive_sectors' based upon the actual disk geometry. * include/hw/ide/internal.h struct IDEState: a) Store the actual drive CHS values within the new fields 'drive_heads' and 'drive_sectors.' b) Track whether a soft IDE reset should also reset the logical CHS geometry of the hard disk within the new field 'reset_reverts'. Signed-off-by: Lev Kujawski <lkujaw@member.fsf.org> Message-Id: <20220707031140.158958-7-lkujaw@member.fsf.org> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30tests/qtest/ide-test: Verify that DIAGNOSTIC clears DEV to zeroLev Kujawski
Verify correction of EXECUTE DEVICE DIAGNOSTIC introduced in commit 72423831c3 (hw/ide/core: Clear LBA and drive bits for EXECUTE DEVICE DIAGNOSTIC, 2022-05-28). Signed-off-by: Lev Kujawski <lkujaw@member.fsf.org> Message-Id: <20220707031140.158958-4-lkujaw@member.fsf.org> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30hw/ide/core: Clear LBA and drive bits for EXECUTE DEVICE DIAGNOSTICLev Kujawski
Prior to this patch, cmd_exec_dev_diagnostic relied upon ide_set_signature to clear the device register. While the preservation of the drive bit by ide_set_signature is necessary for the DEVICE RESET, IDENTIFY DEVICE, and READ SECTOR commands, ATA/ATAPI-6 specifies that "DEV shall be cleared to zero" for EXECUTE DEVICE DIAGNOSTIC. This deviation was uncovered by the ATACT Device Testing Program written by Hale Landis. Signed-off-by: Lev Kujawski <lkujaw@member.fsf.org> Message-Id: <20220707031140.158958-3-lkujaw@member.fsf.org> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30tests/qtest/ide-test.c: Create disk image for use as a secondaryLev Kujawski
Change 'tmp_path' into an array of two members to accommodate another disk image of size TEST_IMAGE_SIZE. This facilitates testing ATA protocol aspects peculiar to secondary devices on the same controller. Signed-off-by: Lev Kujawski <lkujaw@member.fsf.org> Message-Id: <20220707031140.158958-2-lkujaw@member.fsf.org> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30piix_ide_reset: Use pci_set_* functions instead of direct accessLev Kujawski
Eliminate the remaining TODOs in hw/ide/piix.c by: * Using pci_set_{size} functions to write the PIIX PCI configuration space instead of manipulating it directly as an array; and * Documenting the default register values by reference to the controlling specification. Signed-off-by: Lev Kujawski <lkujaw@member.fsf.org> Message-Id: <20220707031140.158958-1-lkujaw@member.fsf.org> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30block: use the request length for iov alignmentKeith Busch
An iov length needs to be aligned to the logical block size, which may be larger than the memory alignment. Tested-by: Jens Axboe <axboe@kernel.dk> Signed-off-by: Keith Busch <kbusch@kernel.org> Message-Id: <20220929200523.3218710-3-kbusch@meta.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30block: move bdrv_qiov_is_aligned to file-posixKeith Busch
There is only user of bdrv_qiov_is_aligned(), so move the alignment function to there and make it static. Signed-off-by: Keith Busch <kbusch@kernel.org> Message-Id: <20220929200523.3218710-2-kbusch@meta.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30iotests/backing-file-invalidation: Add new testHanna Reitz
Add a new test to see what happens when you migrate a VM with a backing chain that has json:{} backing file strings, which, when opened, will be resolved to plain filenames. Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20220803144446.20723-4-hreitz@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30block/qed: Keep auto_backing_file if possibleHanna Reitz
Just like qcow2, qed invokes its open function in its .bdrv_co_invalidate_cache() implementation. Therefore, just like done for qcow2 in HEAD^, update auto_backing_file only if the backing file string in the image header differs from the one we have read before. Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20220803144446.20723-3-hreitz@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30block/qcow2: Keep auto_backing_file if possibleHanna Reitz
qcow2_do_open() is used by qcow2_co_invalidate_cache(), i.e. may be run on an image that has been opened before. When reading the backing file string from the image header, compare it against the existing bs->backing_file, and update bs->auto_backing_file only if they differ. auto_backing_file should ideally contain the filename the backing BDS will actually have after opening, i.e. a post-bdrv_refresh_filename() version of what is in the image header. So for example, if the image header reports the following backing file string: json:{"driver": "qcow2", "file": { "driver": "file", "filename": "/tmp/backing.qcow2" }} Then auto_backing_file should contain simply "/tmp/backing.qcow2". Because bdrv_refresh_filename() only works on existing BDSs, though, the way how we get this auto_backing_file value is to have the format driver set it to whatever is in the image header, and when the backing BDS is opened based on that, we update it with the filename the backing BDS actually got. However, qcow2's qcow2_co_invalidate_cache() implementation breaks this because it just resets auto_backing_file to whatever is in the image file without opening a BDS based on it, so we never get auto_backing_file back to the "refreshed" version, and in the example above, it would stay "json:{...}". Then, bs->backing->bs->filename will differ from bs->auto_backing_file, making bdrv_backing_overridden(bs) return true, which will lead bdrv_refresh_filename(bs) to generate a json:{} filename for bs, even though that may not have been necessary. This is reported in the issue linked below. Therefore, skip updating auto_backing_file if nothing has changed in the image header since we last read it. Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1117 Signed-off-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20220803144446.20723-2-hreitz@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30gluster: stop using .bdrv_needs_filenameStefan Hajnoczi
The gluster protocol driver used to parse URIs (filenames) but was extended with a richer JSON syntax in commit 6c7189bb29de ("block/gluster: add support for multiple gluster servers"). The gluster drivers that have JSON parsing set .bdrv_needs_filename to false. The gluster+unix and gluster+rdma drivers still to require a filename even though the JSON parser is equipped to parse the same volume/path/sockaddr details as the URI parser. Let's allow JSON parsing for these drivers too. Note that the gluster+rdma driver actually uses TCP because RDMA support is not available, so the JSON server.type field must be "inet". Drop .bdrv_needs_filename since both the filename and the JSON parsers can handle gluster+unix and gluster+rdma. This change is in preparation for eventually removing .bdrv_needs_filename across the entire codebase. Cc: Prasanna Kumar Kalever <prasanna.kalever@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20220811164905.430834-1-stefanha@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30block: make serializing requests functions 'void'Denis V. Lunev
Return codes of the following functions are never used in the code: * bdrv_wait_serialising_requests_locked * bdrv_wait_serialising_requests * bdrv_make_request_serialising Signed-off-by: Denis V. Lunev <den@openvz.org> CC: Kevin Wolf <kwolf@redhat.com> CC: Hanna Reitz <hreitz@redhat.com> CC: Stefan Hajnoczi <stefanha@redhat.com> CC: Fam Zheng <fam@euphon.net> CC: Ronnie Sahlberg <ronniesahlberg@gmail.com> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Peter Lieven <pl@kamp.de> CC: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Message-Id: <20220817083736.40981-3-den@openvz.org> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30block: use bdrv_is_sg() helper instead of raw bs->sg readingDenis V. Lunev
I believe that if the helper exists, it must be used always for reading of the value. It breaks expectations in the other case. Signed-off-by: Denis V. Lunev <den@openvz.org> CC: Kevin Wolf <kwolf@redhat.com> CC: Hanna Reitz <hreitz@redhat.com> CC: Stefan Hajnoczi <stefanha@redhat.com> CC: Fam Zheng <fam@euphon.net> CC: Ronnie Sahlberg <ronniesahlberg@gmail.com> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Peter Lieven <pl@kamp.de> CC: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Message-Id: <20220817083736.40981-2-den@openvz.org> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30block: add missed block_acct_setup with new block device init procedureDenis V. Lunev
Commit 5f76a7aac156ca75680dad5df4a385fd0b58f6b1 is looking harmless from the first glance, but it has changed things a lot. 'libvirt' uses it to detect that it should follow new initialization way and this changes things considerably. With this procedure followed, blockdev_init() is not called anymore and thus block_acct_setup() helper is not called. This means in particular that defaults for block accounting statistics are changed and account_invalid/account_failed are actually initialized as false instead of true originally. This commit changes things to match original world. There are the following constraints: * new default value in block_acct_init() is set to true * block_acct_setup() inside blockdev_init() is called before blkconf_apply_backend_options() * thus newly created option in block device properties has precedence if specified Signed-off-by: Denis V. Lunev <den@openvz.org> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> CC: Peter Krempa <pkrempa@redhat.com> CC: Markus Armbruster <armbru@redhat.com> CC: John Snow <jsnow@redhat.com> CC: Kevin Wolf <kwolf@redhat.com> CC: Hanna Reitz <hreitz@redhat.com> Message-Id: <20220824095044.166009-3-den@openvz.org> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30block: pass OnOffAuto instead of bool to block_acct_setup()Denis V. Lunev
We would have one more place for block_acct_setup() calling, which should not corrupt original value. Signed-off-by: Denis V. Lunev <den@openvz.org> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> CC: Peter Krempa <pkrempa@redhat.com> CC: Markus Armbruster <armbru@redhat.com> CC: John Snow <jsnow@redhat.com> CC: Kevin Wolf <kwolf@redhat.com> CC: Hanna Reitz <hreitz@redhat.com> Message-Id: <20220824095044.166009-2-den@openvz.org> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30qemu-img: Wean documentation and help output off '?' for helpMarkus Armbruster
'?' for help is deprecated since commit c8057f951d "Support 'help' as a synonym for '?' in command line options", v1.2.0. We neglected to update output of qemu-img --help and the manual. Do that now. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20220908130842.641410-1-armbru@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30block/qcow2-bitmap: Add missing cast to silent GCC errorPhilippe Mathieu-Daudé
Commit d1258dd0c8 ("qcow2: autoloading dirty bitmaps") added the set_readonly_helper() GFunc handler, correctly casting the gpointer user_data in both the g_slist_foreach() caller and the handler. Few commits later (commit 1b6b0562db), the handler is reused in qcow2_reopen_bitmaps_rw() but missing the gpointer cast, resulting in the following error when using Homebrew GCC 12.2.0: [2/658] Compiling C object libblock.fa.p/block_qcow2-bitmap.c.o ../../block/qcow2-bitmap.c: In function 'qcow2_reopen_bitmaps_rw': ../../block/qcow2-bitmap.c:1211:60: error: incompatible type for argument 3 of 'g_slist_foreach' 1211 | g_slist_foreach(ro_dirty_bitmaps, set_readonly_helper, false); | ^~~~~ | | | _Bool In file included from /opt/homebrew/Cellar/glib/2.72.3_1/include/glib-2.0/glib/gmain.h:26, from /opt/homebrew/Cellar/glib/2.72.3_1/include/glib-2.0/glib/giochannel.h:33, from /opt/homebrew/Cellar/glib/2.72.3_1/include/glib-2.0/glib.h:54, from /Users/philmd/source/qemu/include/glib-compat.h:32, from /Users/philmd/source/qemu/include/qemu/osdep.h:144, from ../../block/qcow2-bitmap.c:28: /opt/homebrew/Cellar/glib/2.72.3_1/include/glib-2.0/glib/gslist.h:127:61: note: expected 'gpointer' {aka 'void *'} but argument is of type '_Bool' 127 | gpointer user_data); | ~~~~~~~~~~~~~~~~~~^~~~~~~~~ At top level: FAILED: libblock.fa.p/block_qcow2-bitmap.c.o Fix by adding the missing gpointer cast. Fixes: 1b6b0562db ("qcow2: support .bdrv_reopen_bitmaps_rw") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220919182755.51967-1-f4bug@amsat.org> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-30qcow2: fix memory leak in qcow2_read_extensionslu zhipeng
Free feature_table if it is failed in bdrv_pread. Signed-off-by: lu zhipeng <luzhipeng@cestc.cn> Message-Id: <20220921144515.1166-1-luzhipeng@cestc.cn> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-09-29Merge tag 'char-pull-request' of https://gitlab.com/marcandre.lureau/qemu ↵Stefan Hajnoczi
into staging chardev related patches # -----BEGIN PGP SIGNATURE----- # # iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmM1evIcHG1hcmNhbmRy # ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5evvD/49HQuMxsHaTvXSLPxi # Bkv9W8cHSEOuAVsgizrd3Z/AEx8MMsZLprtGttYpQN4041aBbyDG7PR1PirVibe7 # s5uuqq2LB85dCkrPyiTkfGosbnndDy+VH9ZH+vS6CMKHYRSwpRjYUoKt5e75JhtP # RefwFihkVyr3HbsD6SKjB8lV25yw2tQB6BizTedaNmM6ZSmX/TRtes1JgeK3l5jD # 7hQVqqEAJ6YvZnpg070Om43sae7j0yoW7Dg45DVViQNJeRG/0rwBKAbUZuLzs9lH # hMjqlUW+It7Q7DvkkoLO6DiBsIceeZneZ3XHnv0/OrXDILS2ZWRnm2+qKJp75fub # TXFafZX3RIn8ZL6Lw4uz/tsX5CllzuiT/2EO2/CzFIaGESi8Y5eFL3xku7tDWzq8 # EtsAehQeHOvNU/mw8Z1hPEozcPMFUY9eUPF7vPRHPV+g+YI+UlrZCFGcJaZpspeP # h3rUXInftMHHocr/LvI9DMEzgHjOZrDqjECSavp1nHrGbRLfBl/1QNPql1cZJ+H/ # XDygo1x/QVlEkTaBWqcMFifgqJ7xvHPDQd6rvIbBYwUUWU1B79UKON0i6WOMk7A6 # vjsJz7Sk+cJMOMwc76w+qd0mRauWkcfiS08Y4g+4HksymZev5OeGNuuDfI6zwfFt # T21TIS/c0zmcNU1sgXB6U2VTiw== # =pMT6 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 29 Sep 2022 07:01:06 EDT # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * tag 'char-pull-request' of https://gitlab.com/marcandre.lureau/qemu: vhost-user: Call qemu_socketpair() instead of socketpair() oslib-posix: Introduce qemu_socketpair() chardev: fix segfault in finalize serial: Allow unaligned i/o access msmouse: Add pnp data msmouse: Use fifo8 instead of array chardev: src buffer const for write functions msmouse: Handle mouse reset Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-09-29target/arm: mark SP_EL1 with ARM_CP_EL3_NO_EL2_KEEPJerome Forissier
SP_EL1 must be kept when EL3 is present but EL2 is not. Therefore mark it with ARM_CP_EL3_NO_EL2_KEEP. Cc: qemu-stable@nongnu.org Fixes: 696ba3771894 ("target/arm: Handle cpreg registration for missing EL") Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220927120058.670901-1-jerome.forissier@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-29hw/arm/virt: Fix devicetree warning about the SMMU nodeJean-Philippe Brucker
The SMMUv3 node isn't expected to have clock properties (unlike the SMMUv2). Fix the corresponding dt-validate warning: smmuv3@9050000: 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+' From schema: linux/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: tweaked commit message as suggested by Eric] Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20220927100347.176606-7-jean-philippe@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-29hw/arm/virt: Use "msi-map" devicetree property for PCIJean-Philippe Brucker
The "msi-parent" property can be used on the PCI node when MSIs do not contain sideband data (device IDs) [1]. In QEMU, MSI transactions contain the requester ID, so the PCI node should use the "msi-map" property instead of "msi-parent". In our case the property describes an identity map between requester ID and sideband data. This fixes a warning when passing the DTB generated by QEMU to dtc, following a recent change to the GICv3 node: Warning (msi_parent_property): /pcie@10000000:msi-parent: property size (4) too small for cell size 1 [1] linux/Documentation/devicetree/bindings/pci/pci-msi.txt Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20220927100347.176606-4-jean-philippe@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-29hw/arm/virt: Fix devicetree warning about the GIC nodeJean-Philippe Brucker
The GICv3 bindings requires a #msi-cells property for the ITS node. Fix the corresponding dt-validate warning: interrupt-controller@8000000: msi-controller@8080000: '#msi-cells' is a required property From schema: linux/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20220927100347.176606-3-jean-philippe@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-29hw/arm/virt: Fix devicetree warning about the root nodeJean-Philippe Brucker
The devicetree specification requires a 'model' property in the root node. Fix the corresponding dt-validate warning: /: 'model' is a required property From schema: dtschema/schemas/root-node.yaml Use the same name for model as for compatible. The specification recommends that 'compatible' follows the format 'manufacturer,model' and 'model' follows the format 'manufacturer,model-number'. Since our 'compatible' doesn't observe this, 'model' doesn't really need to either. Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20220927100347.176606-2-jean-philippe@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-29hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllersFrancisco Iglesias
Connect ZynqMP's USB controllers. Signed-off-by: Francisco Iglesias <francisco.iglesias@amd.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220920081517.25401-1-frasse.iglesias@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-29target/arm: Rearrange cpu64.c so all the CPU initfns are togetherPeter Maydell
cpu64.c has ended up in a slightly odd order -- it starts with the initfns for most of the models-real-hardware CPUs; after that comes a bunch of support code for SVE, SME, pauth and LPA2 properties. Then come the initfns for the 'host' and 'max' CPU types, and then after that one more models-real-hardware CPU initfn, for a64fx. (This ordering is partly historical and partly required because a64fx needs the SVE properties.) Reorder the file into: * CPU property support functions * initfns for real hardware CPUs * initfns for host and max * class boilerplate Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-09-29target/arm: Update SDCR_VALID_MASK to include SCCDPeter Maydell
Our SDCR_VALID_MASK doesn't include all of the bits which are defined by the current architecture. In particular in commit 0b42f4fab9d3 we forgot to add SCCD, which meant that an AArch32 guest couldn't actually use the SCCD bit to disable counting in Secure state. Add all the currently defined bits; we don't implement all of them, but this makes them be reads-as-written, which is architecturally valid and matches how we currently handle most of the others in the mask. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220923123412.1214041-4-peter.maydell@linaro.org
2022-09-29target/arm: Make writes to MDCR_EL3 use PMU start/finish callsPeter Maydell
In commit 01765386a88868 we fixed a bug where we weren't correctly bracketing changes to some registers with pmu_op_start() and pmu_op_finish() calls for changes which affect whether the PMU counters might be enabled. However, we missed the case of writes to the AArch64 MDCR_EL3 register, because (unlike its AArch32 counterpart) they are currently done directly to the CPU state struct without going through the sdcr_write() function. Give MDCR_EL3 a writefn which handles the PMU start/finish calls. The SDCR writefn then simplfies to "call the MDCR_EL3 writefn after masking off the bits which don't exist in the AArch32 register". Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220923123412.1214041-3-peter.maydell@linaro.org
2022-09-29target/arm: Mark registers which call pmu_op_start() as ARM_CP_IOPeter Maydell
In commit 01765386a888 we made some system register write functions call pmu_op_start()/pmu_op_finish(). This means that they now touch timers, so for icount to work these registers must have the ARM_CP_IO flag set. This fixes a bug where when icount is enabled a guest that touches MDCR_EL3, MDCR_EL2, PMCNTENSET_EL0 or PMCNTENCLR_EL0 would cause QEMU to print an error message and exit, for example: [ 2.495971] TCP: Hash tables configured (established 1024 bind 1024) [ 2.496213] UDP hash table entries: 256 (order: 1, 8192 bytes) [ 2.496386] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes) [ 2.496917] NET: Registered protocol family 1 qemu-system-aarch64: Bad icount read Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220923123412.1214041-2-peter.maydell@linaro.org
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