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AgeCommit message (Expand)Author
2013-12-18s390x/kvm: Simplified the calculation of the SIGP order codeThomas Huth
2013-12-18s390x/kvm: Implemented SIGP STARTThomas Huth
2013-12-18s390x/kvm: Fix coding style in handle_sigp()Thomas Huth
2013-12-18s390x/kvm: Removed s390_store_status stubThomas Huth
2013-12-18s390x/kvm: Removed duplicated SIGP definesThomas Huth
2013-12-18s390x/kvm: Fix diagnose handling.Cornelia Huck
2013-12-17MAINTAINERS: add myself to maintain allwinner-a10liguang
2013-12-17hw/arm: add cubieboard supportliguang
2013-12-17hw/arm: add allwinner a10 SoC supportliguang
2013-12-17hw/intc: add allwinner A10 interrupt controllerliguang
2013-12-17hw/timer: add allwinner a10 timerliguang
2013-12-17vmstate: Add support for an array of ptimer_state *Peter Maydell
2013-12-17MAINTAINERS: Document 'Canon DIGIC' machineAntony Pavlov
2013-12-17hw/arm/digic: add NOR ROM supportAntony Pavlov
2013-12-17hw/arm/digic: add UART supportAntony Pavlov
2013-12-17hw/arm/digic: add timer supportAntony Pavlov
2013-12-17hw/arm/digic: prepare DIGIC-based boards supportAntony Pavlov
2013-12-17hw/arm: add very initial support for Canon DIGIC SoCAntony Pavlov
2013-12-17target-arm: A64: add support for logical (immediate) insnsAlexander Graf
2013-12-17target-arm: A64: add support for 1-src CLS insnClaudio Fontana
2013-12-17host-utils: add clrsb32/64 - count leading redundant sign bitsClaudio Fontana
2013-12-17target-arm: A64: add support for bitfield insnsClaudio Fontana
2013-12-17target-arm: A64: add support for 1-src REV insnsClaudio Fontana
2013-12-17target-arm: A64: add support for 1-src RBIT insnAlexander Graf
2013-12-17target-arm: A64: add support for 1-src data processing and CLZClaudio Fontana
2013-12-17target-arm: A64: add support for 2-src shift reg insnsAlexander Graf
2013-12-17target-arm: A64: add support for 2-src data processing and DIVAlexander Graf
2013-12-17target-arm: A64: add support for EXTRAlexander Graf
2013-12-17target-arm: A64: add support for ADR and ADRPAlexander Graf
2013-12-17target-arm: A64: add support for logical (shifted register)Alexander Graf
2013-12-17target-arm: A64: add support for conditional selectClaudio Fontana
2013-12-17target-arm: A64: add support for compare and branch immAlexander Graf
2013-12-17target-arm: A64: add support for 'test and branch' immAlexander Graf
2013-12-17target-arm: A64: add support for conditional branchesAlexander Graf
2013-12-17target-arm: A64: add support for BR, BLR and RET insnsAlexander Graf
2013-12-17target-arm: A64: add support for B and BL insnsAlexander Graf
2013-12-17target-arm: A64: expand decoding skeleton for system instructionsClaudio Fontana
2013-12-17target-arm: A64: provide skeleton for a64 insn decodingClaudio Fontana
2013-12-17target-arm: A64: add stubs for a64 specific helpersAlexander Graf
2013-12-17target-arm: Support fp registers in gdb stubPeter Maydell
2013-12-17target-arm: A64: provide functions for accessing FPCR and FPSRPeter Maydell
2013-12-17target-arm: A64: add set_pc cpu methodAlexander Graf
2013-12-17target-arm: Split A64 from A32/T32 gen_intermediate_code_internal()Peter Maydell
2013-12-17default-configs: Add config for aarch64-softmmuPeter Maydell
2013-12-17hw/arm/boot: Add boot support for AArch64 processorMian M. Hamayun
2013-12-17hw/arm/boot: Allow easier swapping in of different loader codePeter Maydell
2013-12-17configure: Enable KVM for aarch64 host/target combinationPeter Maydell
2013-12-17target-arm: Add minimal KVM AArch64 supportMian M. Hamayun
2013-12-17target-arm: Clean up handling of AArch64 PSTATEPeter Maydell
2013-12-17target-arm/kvm: Split 32 bit only code into its own filePeter Maydell
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