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QEMU is a generic and open source machine & userspace emulator and virtualizer
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2023-01-06
hw/riscv: sifive_u: Avoid using magic number for "riscv, ndev"
Bin Meng
2023-01-06
hw/riscv: sifive_e: Fix the number of interrupt sources of PLIC
Bin Meng
2023-01-06
hw/riscv: microchip_pfsoc: Fix the number of interrupt sources of PLIC
Bin Meng
2023-01-06
hw/intc: sifive_plic: Update "num-sources" property default value
Bin Meng
2023-01-06
hw/intc: sifive_plic: Use error_setg() to propagate the error up via errp in ...
Bin Meng
2023-01-06
hw/intc: sifive_plic: Improve robustness of the PLIC config parser
Bin Meng
2023-01-06
hw/intc: sifive_plic: Drop PLICMode_H
Bin Meng
2023-01-06
hw/riscv: spike: Remove misleading comments
Bin Meng
2023-01-06
hw/riscv: Sort machines Kconfig options in alphabetical order
Bin Meng
2023-01-06
hw/riscv: Fix opentitan dependency to SIFIVE_PLIC
Bin Meng
2023-01-06
hw/intc: Select MSI_NONBROKEN in RISC-V AIA interrupt controllers
Bin Meng
2023-01-06
hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC
Bin Meng
2023-01-06
RISC-V: Add Zawrs ISA extension support
Christoph Muellner
2023-01-06
target/riscv: Clear mstatus.MPRV when leaving M-mode for priv spec 1.12+
Bin Meng
2023-01-06
target/riscv: Simplify helper_sret() a little bit
Bin Meng
2023-01-06
target/riscv: Set pc_succ_insn for !rvc illegal insn
Richard Henderson
2023-01-06
target/riscv: Fix mret exception cause when no pmp rule is configured
Bin Meng
2023-01-06
hw/intc: sifive_plic: fix out-of-bound access of source_priority array
Jim Shu
2023-01-06
hw/{misc, riscv}: pfsoc: add system controller as unimplemented
Conor Dooley
2023-01-06
hw/riscv: pfsoc: add missing FICs as unimplemented
Conor Dooley
2023-01-06
hw/misc: pfsoc: add fabric clocks to ioscb
Conor Dooley
2023-01-06
target/riscv: Add some comments for sstatus CSR in riscv_cpu_dump_state()
Bin Meng
2023-01-06
target/riscv: support cache-related PMU events in virtual mode
Jim Shu
2023-01-06
hw/riscv: virt: Remove the redundant ipi-id property
Atish Patra
2023-01-06
target/riscv: Typo fix in sstc() predicate
Anup Patel
2023-01-06
hw/intc: sifive_plic: Renumber the S irqs for numa support
Frédéric Pétrot
2023-01-06
target/riscv: Add itrigger_enabled field to CPURISCVState
LIU Zhiwei
2023-01-06
target/riscv: Enable native debug itrigger
LIU Zhiwei
2023-01-06
target/riscv: Add itrigger support when icount is enabled
LIU Zhiwei
2023-01-06
target/riscv: Add itrigger support when icount is not enabled
LIU Zhiwei
2023-01-06
target/riscv: generate virtual instruction exception
Mayuresh Chitale
2023-01-06
target/riscv: smstateen check for h/s/envcfg
Mayuresh Chitale
2023-01-06
target/riscv: Add smstateen support
Mayuresh Chitale
2023-01-06
hw/riscv/opentitan: add aon_timer base unimpl
Wilfred Mallawa
2023-01-06
hw/riscv/opentitan: bump opentitan
Wilfred Mallawa
2023-01-06
tcg/riscv: Fix base register for user-only qemu_ld/st
Richard Henderson
2023-01-06
tcg/riscv: Fix reg overlap case in tcg_out_addsub2
Richard Henderson
2023-01-06
tcg/riscv: Fix range matched by TCG_CT_CONST_M12
Richard Henderson
2023-01-06
target/riscv: Fix PMP propagation for tlb
LIU Zhiwei
2023-01-05
Merge tag 'python-pull-request' of https://gitlab.com/jsnow/qemu into staging
Peter Maydell
2023-01-05
Merge tag 'mem-2023-01-02' of https://github.com/davidhildenbrand/qemu into s...
Peter Maydell
2023-01-04
.gitlab-ci.d/windows: Work-around timeout and OpenGL problems of the MSYS2 jobs
Thomas Huth
2023-01-04
python: add 3.11 to supported list
John Snow
2023-01-04
iotests/check: Fix typing for sys.exit() value
John Snow
2023-01-04
Python: fix flake8 config
John Snow
2023-01-04
python/machine: Handle termination cases without QMP
John Snow
2023-01-04
python/machine: Add debug logging to key state changes
John Snow
2023-01-04
Merge tag 'pull-testing-next-231222-1' of https://gitlab.com/stsquad/qemu int...
Peter Maydell
2023-01-04
Merge tag 'pull-9p-20221223' of https://github.com/cschoenebeck/qemu into sta...
Peter Maydell
2022-12-28
hostmem: Honor multiple preferred nodes if possible
Michal Privoznik
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