slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2020-06-23	target/arm: Move some functions used only in translate-neon.inc.c to that file	Peter Maydell
2020-06-23	target/arm: Convert Neon VTRN to decodetree	Peter Maydell
2020-06-23	target/arm: Convert Neon VSWP to decodetree	Peter Maydell
2020-06-23	target/arm: Convert Neon 2-reg-misc VCVT insns to decodetree	Peter Maydell
2020-06-23	target/arm: Convert Neon 2-reg-misc VRINT insns to decodetree	Peter Maydell
2020-06-23	target/arm: Convert Neon 2-reg-misc fp-compare-with-zero insns to decodetree	Peter Maydell
2020-06-23	target/arm: Convert simple fp Neon 2-reg-misc insns	Peter Maydell
2020-06-23	target/arm: Convert Neon VQABS, VQNEG to decodetree	Peter Maydell
2020-06-23	target/arm: Convert remaining simple 2-reg-misc Neon ops	Peter Maydell
2020-06-23	target/arm: Convert Neon 2-reg-misc VREV32 and VREV16 to decodetree	Peter Maydell
2020-06-23	target/arm: Make gen_swap_half() take separate src and dest	Peter Maydell
2020-06-23	target/arm: Fix capitalization in NeonGenTwo{Single, Double}OPFn typedefs	Peter Maydell
2020-06-23	target/arm: Rename NeonGenOneOpFn to NeonGenOne64OpFn	Peter Maydell
2020-06-23	target/arm: Convert Neon 2-reg-misc crypto operations to decodetree	Peter Maydell
2020-06-23	target/arm: Convert vectorised 2-reg-misc Neon ops to decodetree	Peter Maydell
2020-06-23	target/arm: Convert Neon VCVT f16/f32 insns to decodetree	Peter Maydell
2020-06-23	target/arm: Convert Neon 2-reg-misc VSHLL to decodetree	Peter Maydell
2020-06-23	target/arm: Convert Neon narrowing moves to decodetree	Peter Maydell
2020-06-23	target/arm: Convert VZIP, VUZP to decodetree	Peter Maydell
2020-06-23	target/arm: Convert Neon 2-reg-misc pairwise ops to decodetree	Peter Maydell
2020-06-23	target/arm: Convert Neon 2-reg-misc VREV64 to decodetree	Peter Maydell
2020-06-23	util/oslib-posix : qemu_init_exec_dir implementation for Mac	David CARLIER
2020-06-23	hw/arm/virt: Add 5.0 HW compat props	Andrew Jones
2020-06-22	Merge remote-tracking branch 'remotes/philmd-gitlab/tags/acceptance-testing-2...	Peter Maydell
2020-06-22	Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200...	Peter Maydell
2020-06-21	tests/acceptance: record/replay tests with advcal images	Pavel Dovgalyuk
2020-06-21	tests/acceptance: add record/replay test for m68k	Pavel Dovgalyuk
2020-06-21	tests/acceptance: add record/replay test for ppc64	Pavel Dovgalyuk
2020-06-21	tests/acceptance: add record/replay test for arm	Pavel Dovgalyuk
2020-06-21	tests/acceptance: add record/replay test for aarch64	Pavel Dovgalyuk
2020-06-21	tests/acceptance: add kernel record/replay test for x86_64	Pavel Dovgalyuk
2020-06-21	tests/acceptance: add base class record/replay kernel tests	Pavel Dovgalyuk
2020-06-21	MAINTAINERS: Add an entry to review Avocado based acceptance tests	Philippe Mathieu-Daudé
2020-06-19	Merge remote-tracking branch 'remotes/kraxel/tags/audio-20200619-pull-request...	Peter Maydell
2020-06-19	qht: Fix threshold rate calculation	Richard Henderson
2020-06-19	hw/riscv: sifive_u: Add a dummy DDR memory controller device	Bin Meng
2020-06-19	hw/riscv: sifive_u: Sort the SoC memmap table entries	Bin Meng
2020-06-19	hw/riscv: sifive_u: Support different boot source per MSEL pin state	Bin Meng
2020-06-19	hw/riscv: sifive: Change SiFive E/U CPU reset vector to 0x1004	Bin Meng
2020-06-19	target/riscv: Rename IBEX CPU init routine	Bin Meng
2020-06-19	hw/riscv: sifive_u: Add a new property msel for MSEL pin state	Bin Meng
2020-06-19	hw/riscv: sifive_u: Rename serial property get/set functions to a generic name	Bin Meng
2020-06-19	hw/riscv: sifive_u: Add reset functionality	Bin Meng
2020-06-19	hw/riscv: sifive_gpio: Do not blindly trigger output IRQs	Bin Meng
2020-06-19	hw/riscv: sifive_u: Hook a GPIO controller	Bin Meng
2020-06-19	hw/riscv: sifive_gpio: Add a new 'ngpio' property	Bin Meng
2020-06-19	hw/riscv: sifive_gpio: Clean up the codes	Bin Meng
2020-06-19	hw/riscv: sifive_u: Generate device tree node for OTP	Bin Meng
2020-06-19	hw/riscv: sifive_u: Simplify the GEM IRQ connect code a little bit	Bin Meng
2020-06-19	hw/riscv: opentitan: Remove the riscv_ prefix of the machine* and soc* functions	Bin Meng