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2019-05-24target/riscv: Add a base 32 and 64 bit CPUAlistair Francis
At the same time deprecate the ISA string CPUs. It is dobtful anyone specifies the CPUs, but we are keeping them for the Spike machine (which is about to be depreated) so we may as well just mark them as deprecated. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24target/riscv: Create settable CPU propertiesAlistair Francis
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24riscv: virt: Allow specifying a CPU via commandlineAlistair Francis
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24linux-user/riscv: Add the CPU type as a commentAlistair Francis
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24target/riscv: Remove unused include of riscv_htif.h for virt board riscvJonathan Behrens
Signed-off-by: Jonathan Behrens <fintelia@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24target/riscv: Remove spaces from register namesRichard Henderson
These extra spaces make the "-d op" dump look weird. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24target/riscv: Split gen_arith_imm into functional and tempRichard Henderson
The tcg_gen_fooi_tl functions have some immediate constant folding built in, which match up with some of the riscv asm builtin macros, like mv and not. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24target/riscv: Split RVC32 and RVC64 insns into separate filesRichard Henderson
This eliminates all functions in insn_trans/trans_rvc.inc.c, so the entire file can be removed. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24target/riscv: Use pattern groups in insn16.decodeRichard Henderson
This eliminates about half of the complicated decode bits within insn_trans/trans_rvc.inc.c. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24target/riscv: Merge argument decode for RVC shiftiRichard Henderson
Special handling for IMM==0 is the only difference between RVC shifti and RVI shifti. This can be handled with !function. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24target/riscv: Merge argument sets for insn32 and insn16Richard Henderson
In some cases this allows us to directly use the insn32 translator function. In some cases we still need a shim. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24target/riscv: Use --static-decode for decodetreeRichard Henderson
The generated functions are only used within translate.c and do not need to be global, or declared. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24target/riscv: Name the argument sets for all of insn32 formatsRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24RISC-V: fix single stepping over ret and other branching instructionsFabien Chouteau
This patch introduces wrappers around the tcg_gen_exit_tb() and tcg_gen_lookup_and_goto_ptr() functions that handle single stepping, i.e. call gen_exception_debug() when single stepping is enabled. Theses functions are then used instead of the originals, bringing single stepping handling in places where it was previously ignored such as jalr and system branch instructions (ecall, mret, sret, etc.). Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24target/riscv: Do not allow sfence.vma from user modeJonathan Behrens
The 'sfence.vma' instruction is privileged, and should only ever be allowed when executing in supervisor mode or higher. Signed-off-by: Jonathan Behrens <fintelia@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24SiFive RISC-V GPIO DeviceFabien Chouteau
QEMU model of the GPIO device on the SiFive E300 series SOCs. The pins are not used by a board definition yet, however this implementation can already be used to trigger GPIO interrupts from the software by configuring a pin as both output and input. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24Merge remote-tracking branch ↵Peter Maydell
'remotes/vivier2/tags/linux-user-for-4.1-pull-request' into staging Add /proc/hardware and /proc/cpuinfo, update SIOCXXX ioctls, fix shmat emulation, add nanoseconds in stat, init field fp_abi on mips # gpg: Signature made Fri 24 May 2019 12:24:36 BST # gpg: using RSA key F30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-4.1-pull-request: linux-user: Pass through nanosecond timestamp components for stat syscalls linux-user: Align mmap_find_vma to host page size linux-user: Fix shmat emulation by honoring host SHMLBA linux-user: Sanitize interp_info and, for mips only, init field fp_abi linux-user: Add support for SIOC<G|S>IFPFLAGS ioctls for all targets linux-user: Add support for SIOCSPGRP ioctl for all targets linux-user: Fix support for SIOCATMARK and SIOCGPGRP ioctls for xtensa linux-user: add pseudo /proc/hardware for m68k linux-user: add pseudo /proc/cpuinfo for sparc Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-24linux-user: Pass through nanosecond timestamp components for stat syscallsChen-Yu Tsai
Since Linux 2.6 the stat syscalls have mostly supported nanosecond components for each of the file-related timestamps. QEMU user mode emulation currently does not pass through the nanosecond portion of the timestamp, even when the host system fills in the value. This results in a mismatch when run on subsecond resolution filesystems such as ext4 or XFS. An example of this leading to inconsistency is cross-debootstraping a full desktop root filesystem of Debian Buster. Recent versions of fontconfig store the full timestamp (instead of just the second portion) of the directory in its per-directory cache file, and checks this against the directory to see if the cache is up-to-date. With QEMU user mode emulation, the timestamp stored is incorrect, and upon booting the rootfs natively, fontconfig discovers the mismatch, and proceeds to rebuild the cache on the comparatively slow machine (low-power ARM vs x86). This stalls the first attempt to open whatever application that incorporates fontconfig. This patch renames the "unused" padding trailing each timestamp element to its nanosecond counterpart name if such an element exists in the kernel sources for the given platform. Not all do. Then have the syscall wrapper fill in the nanosecond portion if the host supports it, as specified by the _POSIX_C_SOURCE and _XOPEN_SOURCE feature macros. Recent versions of glibc only use stat64 and newfstatat syscalls on 32-bit and 64-bit platforms respectively. The changes in this patch were tested by directly calling the stat, stat64 and newfstatat syscalls directly, in addition to the glibc wrapper, on arm and aarch64 little endian targets. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Message-Id: <20190522162147.26303-1-wens@kernel.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-05-24linux-user: Align mmap_find_vma to host page sizeRichard Henderson
This can avoid stack allocation failures for i386 guest on ppc64 (64k page) host. Suggested-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20190519201953.20161-14-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-05-24linux-user: Fix shmat emulation by honoring host SHMLBARichard Henderson
For those hosts with SHMLBA > getpagesize, we don't automatically select a guest address that is compatible with the host. We can achieve this by boosting the alignment of guest_base and by adding an extra alignment argument to mmap_find_vma. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20190519201953.20161-13-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-05-24Merge remote-tracking branch 'remotes/kraxel/tags/vga-20190524-pull-request' ↵Peter Maydell
into staging ramfb: misc improvements. # gpg: Signature made Fri 24 May 2019 09:56:59 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20190524-pull-request: hw/display/ramfb: initialize fw-config space with xres/ yres hw/display/ramfb: lock guest resolution after it's set hw/display/ramfb: fix guest memory un-mapping Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-24Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190522' into stagingPeter Maydell
Misc gvec improvements # gpg: Signature made Wed 22 May 2019 23:25:48 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20190522: tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/store tcg/aarch64: Allow immediates for vector ORR and BIC tcg/aarch64: Build vector immediates with two insns tcg/aarch64: Use MVNI in tcg_out_dupi_vec tcg/aarch64: Split up is_fimm tcg/aarch64: Support vector bitwise select value tcg/i386: Use umin/umax in expanding unsigned compare tcg/i386: Remove expansion for missing minmax tcg/i386: Support vector comparison select value tcg: Add TCG_OPF_NOT_PRESENT if TCG_TARGET_HAS_foo is negative tcg: Expand vector minmax using cmp+cmpsel tcg: Introduce do_op3_nofail for vector expansion tcg: Add support for vector compare select tcg: Add support for vector bitwise select tcg: Fix missing checks and clears in tcg_gen_gvec_dup_mem tcg/i386: Fix dupi/dupm for avx1 and 32-bit hosts Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-24Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20190523' into staging target-arm queue: * exynos4210: QOM'ify the Exynos4210 SoC * exynos4210: Add DMA support for the Exynos4210 * arm_gicv3: Fix writes to ICC_CTLR_EL3 * arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1} * target/arm: Fix vector operation segfault * target/arm: Minor improvements to BFXIL, EXTR # gpg: Signature made Thu 23 May 2019 15:22:55 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20190523: hw/arm/exynos4210: QOM'ify the Exynos4210 SoC hw/arm/exynos4210: Add DMA support for the Exynos4210 hw/arm/exynos4: Use the IEC binary prefix definitions hw/arm/exynos4: Remove unuseful debug code hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3 hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1} arm: Rename hw/arm/arm.h to hw/arm/boot.h arm: Remove unnecessary includes of hw/arm/arm.h arm: Move system_clock_scale to armv7m_systick.h target/arm: Fix vector operation segfault target/arm: Simplify BFXIL expansion target/arm: Use extract2 for EXTR Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-24hw/display/ramfb: initialize fw-config space with xres/ yresHou Qiming
If xres / yres were specified in QEMU command line, write them as an initial resolution to the fw-config space on guest reset, which a later BIOS / OVMF patch can take advantage of. Signed-off-by: HOU Qiming <hqm03ster@gmail.com> Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Message-id: 20190513115731.17588-4-marcel.apfelbaum@gmail.com [fixed malformed patch] Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-05-24hw/display/ramfb: lock guest resolution after it's setHou Qiming
Only allow one resolution change per guest boot, which prevents a crash when the guest writes garbage to the configuration space (e.g. when rebooting). Signed-off-by: HOU Qiming <hqm03ster@gmail.com> Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Message-id: 20190513115731.17588-3-marcel.apfelbaum@gmail.com [fixed malformed patch] Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-05-24hw/display/ramfb: fix guest memory un-mappingHou Qiming
Pulled back the `qemu_create_displaysurface_guestmem` function to create the display surface so that the guest memory gets properly unmapped. Signed-off-by: HOU Qiming <hqm03ster@gmail.com> Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Message-id: 20190513115731.17588-2-marcel.apfelbaum@gmail.com [rename the new functions and use QEMU coding style] Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-05-23hw/arm/exynos4210: QOM'ify the Exynos4210 SoCPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20190520214342.13709-5-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23hw/arm/exynos4210: Add DMA support for the Exynos4210Guenter Roeck
QEMU already supports pl330. Instantiate it for Exynos4210. Relevant part of Linux arch/arm/boot/dts/exynos4.dtsi: / { soc: soc { amba { pdma0: pdma@12680000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12680000 0x1000>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_PDMA0>; clock-names = "apb_pclk"; #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <32>; }; pdma1: pdma@12690000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12690000 0x1000>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_PDMA1>; clock-names = "apb_pclk"; #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <32>; }; mdma1: mdma@12850000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12850000 0x1000>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_MDMA>; clock-names = "apb_pclk"; #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <1>; }; }; }; }; Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190520214342.13709-4-philmd@redhat.com [PMD: Do not set default qdev properties, create the controllers in the SoC rather than the board (Peter Maydell), add dtsi in commit message] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23hw/arm/exynos4: Use the IEC binary prefix definitionsPhilippe Mathieu-Daudé
It eases code review, unit is explicit. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20190520214342.13709-3-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23hw/arm/exynos4: Remove unuseful debug codePhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20190520214342.13709-2-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3Peter Maydell
The ICC_CTLR_EL3 register includes some bits which are aliases of bits in the ICC_CTLR_EL1(S) and (NS) registers. QEMU chooses to keep those bits in the cs->icc_ctlr_el1[] struct fields. Unfortunately a missing '~' in the code to update the bits in those fields meant that writing to ICC_CTLR_EL3 would corrupt the ICC_CLTR_EL1 register values. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190520162809.2677-5-peter.maydell@linaro.org
2019-05-23hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}Peter Maydell
In ich_vmcr_write() we enforce "writes of BPR fields to less than their minimum sets them to the minimum" by doing a "read vbpr and write it back" operation. A typo here meant that we weren't handling writes to these fields correctly, because we were reading from VBPR0 but writing to VBPR1. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190520162809.2677-4-peter.maydell@linaro.org
2019-05-23arm: Rename hw/arm/arm.h to hw/arm/boot.hPeter Maydell
The header file hw/arm/arm.h now includes only declarations relating to hw/arm/boot.c functionality. Rename it accordingly, and adjust its header comment. The bulk of this commit was created via perl -pi -e 's|hw/arm/arm.h|hw/arm/boot.h|' hw/arm/*.c include/hw/arm/*.h In a few cases we can just delete the #include: hw/arm/msf2-soc.c, include/hw/arm/aspeed_soc.h and include/hw/arm/bcm2836.h did not require it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190516163857.6430-4-peter.maydell@linaro.org
2019-05-23arm: Remove unnecessary includes of hw/arm/arm.hPeter Maydell
The hw/arm/arm.h header now only includes declarations relating to boot.c code, so it is only needed by Arm board or SoC code. Remove some unnecessary inclusions of it from target/arm files and from hw/intc/armv7m_nvic.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190516163857.6430-3-peter.maydell@linaro.org
2019-05-23arm: Move system_clock_scale to armv7m_systick.hPeter Maydell
The system_clock_scale global is used only by the armv7m systick device; move the extern declaration to the armv7m_systick.h header, and expand the comment to explain what it is and that it should ideally be replaced with a different approach. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190516163857.6430-2-peter.maydell@linaro.org
2019-05-23target/arm: Fix vector operation segfaultAlistair Francis
Commit 89e68b575 "target/arm: Use vector operations for saturation" causes this abort() when booting QEMU ARM with a Cortex-A15: 0 0x00007ffff4c2382f in raise () at /usr/lib/libc.so.6 1 0x00007ffff4c0e672 in abort () at /usr/lib/libc.so.6 2 0x00005555559c1839 in disas_neon_data_insn (insn=<optimized out>, s=<optimized out>) at ./target/arm/translate.c:6673 3 0x00005555559c1839 in disas_neon_data_insn (s=<optimized out>, insn=<optimized out>) at ./target/arm/translate.c:6386 4 0x00005555559cd8a4 in disas_arm_insn (insn=4081107068, s=0x7fffe59a9510) at ./target/arm/translate.c:9289 5 0x00005555559cd8a4 in arm_tr_translate_insn (dcbase=0x7fffe59a9510, cpu=<optimized out>) at ./target/arm/translate.c:13612 6 0x00005555558d1d39 in translator_loop (ops=0x5555561cc580 <arm_translator_ops>, db=0x7fffe59a9510, cpu=0x55555686a2f0, tb=<optimized out>, max_insns=<optimized out>) at ./accel/tcg/translator.c:96 7 0x00005555559d10d4 in gen_intermediate_code (cpu=cpu@entry=0x55555686a2f0, tb=tb@entry=0x7fffd7840080 <code_gen_buffer+126091347>, max_insns=max_insns@entry=512) at ./target/arm/translate.c:13901 8 0x00005555558d06b9 in tb_gen_code (cpu=cpu@entry=0x55555686a2f0, pc=3067096216, cs_base=0, flags=192, cflags=-16252928, cflags@entry=524288) at ./accel/tcg/translate-all.c:1736 9 0x00005555558ce467 in tb_find (cf_mask=524288, tb_exit=1, last_tb=0x7fffd783e640 <code_gen_buffer+126084627>, cpu=0x1) at ./accel/tcg/cpu-exec.c:407 10 0x00005555558ce467 in cpu_exec (cpu=cpu@entry=0x55555686a2f0) at ./accel/tcg/cpu-exec.c:728 11 0x000055555588b0cf in tcg_cpu_exec (cpu=0x55555686a2f0) at ./cpus.c:1431 12 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=0x55555686a2f0) at ./cpus.c:1735 13 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=arg@entry=0x55555686a2f0) at ./cpus.c:1709 14 0x0000555555d2629a in qemu_thread_start (args=<optimized out>) at ./util/qemu-thread-posix.c:502 15 0x00007ffff4db8a92 in start_thread () at /usr/lib/libpthread. This patch ensures that we don't hit the abort() in the second switch case in disas_neon_data_insn() as we will return from the first case. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: ad91b397f360b2fc7f4087e476f7df5b04d42ddb.1558021877.git.alistair.francis@wdc.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23target/arm: Simplify BFXIL expansionRichard Henderson
The mask implied by the extract is redundant with the one implied by the deposit. Also, fix spelling of BFXIL. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190514011129.11330-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23target/arm: Use extract2 for EXTRRichard Henderson
This is, after all, how we implement extract2 in tcg/aarch64. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190514011129.11330-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23Merge remote-tracking branch ↵Peter Maydell
'remotes/philmd-gitlab/tags/fw_cfg-20190523-pull-request' into staging fw_cfg patches for 2019-05-23 - Add trace events - Get rid of globals in fw_cfg-test - Explicit 'reboot-timeout' is little endian - Add tests for 'reboot-timeout' and 'splash-time' # gpg: Signature made Thu 23 May 2019 13:40:32 BST # gpg: using RSA key E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/fw_cfg-20190523-pull-request: tests: fw_cfg: add 'splash-time' test case tests: fw_cfg: add 'reboot-timeout' test case hw/nvram/fw_cfg: Store 'reboot-timeout' as little endian tests: fw_cfg: add a function to get the fw_cfg file tests: refactor fw_cfg_test tests/fw_cfg: Free QFWCFG object after qtest has run tests/libqos: Add pc_fw_cfg_uninit() and use it tests/libqos: Add io_fw_cfg_uninit() and mm_fw_cfg_uninit() hw/sparc64: Implement fw_cfg_arch_key_name() hw/sparc: Implement fw_cfg_arch_key_name() hw/ppc: Implement fw_cfg_arch_key_name() hw/i386: Implement fw_cfg_arch_key_name() hw/i386: Extract fw_cfg definitions to local "fw_cfg.h" hw/nvram/fw_cfg: Add fw_cfg_arch_key_name() hw/nvram/fw_cfg: Add trace events Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23tests: fw_cfg: add 'splash-time' test caseLi Qiang
Signed-off-by: Li Qiang <liq3ea@163.com> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190424140643.62457-6-liq3ea@163.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23tests: fw_cfg: add 'reboot-timeout' test caseLi Qiang
Signed-off-by: Li Qiang <liq3ea@163.com> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190424140643.62457-5-liq3ea@163.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23hw/nvram/fw_cfg: Store 'reboot-timeout' as little endianLi Qiang
The current codebase is not specific about the endianess of the fw_cfg 'file' entry 'reboot-timeout'. Per docs/specs/fw_cfg.txt: === All Other Data Items === Please consult the QEMU source for the most up-to-date and authoritative list of selector keys and their respective items' purpose, format and writeability. Checking the git history, this code was introduced in commit ac05f3492421, very similar to commit 3d3b8303c6f8 for the 'boot-menu-wait' entry, which explicitely use little-endian. OVMF consumes 'boot-menu-wait' as little-endian, however it does not consume 'reboot-timeout'. Regarding the git history and OVMF use, we choose to explicit 'reboot-timeout' endianess as little-endian. Signed-off-by: Li Qiang <liq3ea@163.com> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190424140643.62457-4-liq3ea@163.com> [PMD: Reword commit description based on review comments] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23tests: fw_cfg: add a function to get the fw_cfg fileLi Qiang
This is useful to write qtest about fw_cfg file entry. Signed-off-by: Li Qiang <liq3ea@163.com> Acked-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190424140643.62457-3-liq3ea@163.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23tests: refactor fw_cfg_testLi Qiang
Currently, fw_cfg_test uses one QTestState for every test case. This will add all command lines for every test case and this is unnecessary. This patch split the test cases and for every test case it uses his own QTestState. This patch does following things: 1. Get rid of the global 'fw_cfg', this need add a uninit function 2. Convert every test case in a separate QTestState After this patch, we can add fw_cfg test case freely and will not have effect on other test cases. Signed-off-by: Li Qiang <liq3ea@163.com> Acked-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190424140643.62457-2-liq3ea@163.com> [PMD: Removed 'ret' local variable in main()] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23tests/fw_cfg: Free QFWCFG object after qtest has runPhilippe Mathieu-Daudé
We allocate the QFWCFG object previous to run the qtests, free it once we are finished. Signed-off-by: Li Qiang <liq3ea@163.com> Message-Id: <20190424140643.62457-2-liq3ea@163.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> [PMD: Split patch, fill commit description] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2019-05-23tests/libqos: Add pc_fw_cfg_uninit() and use itPhilippe Mathieu-Daudé
The pc_fw_cfg_init() function allocates an IO QFWCFG object. Add the pc_fw_cfg_uninit() function to deallocate it (and use it). Signed-off-by: Li Qiang <liq3ea@163.com> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20190424140643.62457-2-liq3ea@163.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> [PMD: Split patch, fill commit description, call uninit in malloc-pc.c] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2019-05-23tests/libqos: Add io_fw_cfg_uninit() and mm_fw_cfg_uninit()Philippe Mathieu-Daudé
The mm_fw_cfg_init() allocates a QFWCFG object, add mm_fw_cfg_uninit() to deallocate it. Similarly with io_fw_cfg_init(), add io_fw_cfg_uninit(). Signed-off-by: Li Qiang <liq3ea@163.com> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190424140643.62457-2-liq3ea@163.com> [PMD: Split patch, filled commit description] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2019-05-23hw/sparc64: Implement fw_cfg_arch_key_name()Philippe Mathieu-Daudé
Implement fw_cfg_arch_key_name(), which returns the name of a sparc64-specific key. Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20190422195020.1494-8-philmd@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23hw/sparc: Implement fw_cfg_arch_key_name()Philippe Mathieu-Daudé
Implement fw_cfg_arch_key_name(), which returns the name of a sparc32-specific key. Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20190422195020.1494-7-philmd@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23hw/ppc: Implement fw_cfg_arch_key_name()Philippe Mathieu-Daudé
Implement fw_cfg_arch_key_name(), which returns the name of a ppc-specific key. The fw_cfg device is used by the machine using OpenBIOS: - 40p - mac99 (oldworld) - g3beige (newworld) Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20190422195020.1494-6-philmd@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2025-02-07 10:50:04 +0000