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2018-06-27trace: simplify trace_mem functionsEmilio G. Cota
Add some defines for the mem_info bits, simplify trace_mem_build_info, and also simplify trace_mem_get_info by making it a wrapper around trace_mem_build_info. This paves the way for increasing size_shift by one bit. Signed-off-by: Emilio G. Cota <cota@braap.org> Message-id: 1527028012-21888-3-git-send-email-cota@braap.org Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2018-06-27trace: fix misreporting of TCG access sizes for user-spaceEmilio G. Cota
trace_mem_build_info expects a size_shift for its first argument. Fix it. Signed-off-by: Emilio G. Cota <cota@braap.org> Message-id: 1527028012-21888-2-git-send-email-cota@braap.org Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2018-06-26Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20180626' into staging target-arm queue: * aspeed: set APB clocks correctly (fixes slowdown on palmetto) * smmuv3: cache config data and TLB entries * v7m/v8m: support read/write from MPU regions smaller than 1K * various: clean up logging/debug messages * xilinx_spips: Make dma transactions as per dma_burst_size # gpg: Signature made Tue 26 Jun 2018 17:55:46 BST # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20180626: (32 commits) aspeed/timer: use the APB frequency from the SCU aspeed: initialize the SCU controller first aspeed/scu: introduce clock frequencies hw/arm/smmuv3: Add notifications on invalidation hw/arm/smmuv3: IOTLB emulation hw/arm/smmuv3: Cache/invalidate config data hw/arm/smmuv3: Fix translate error handling target/arm: Handle small regions in get_phys_addr_pmsav8() target/arm: Set page (region) size in get_phys_addr_pmsav7() tcg: Support MMU protection regions smaller than TARGET_PAGE_SIZE hw/arm/stellaris: Use HWADDR_PRIx to display register address hw/arm/stellaris: Fix gptm_write() error message hw/net/smc91c111: Use qemu_log_mask(UNIMP) instead of fprintf hw/net/smc91c111: Use qemu_log_mask(GUEST_ERROR) instead of hw_error hw/net/stellaris_enet: Use qemu_log_mask(GUEST_ERROR) instead of hw_error hw/net/stellaris_enet: Fix a typo hw/arm/stellaris: Use qemu_log_mask(UNIMP) instead of fprintf hw/arm/omap: Use qemu_log_mask(GUEST_ERROR) instead of fprintf hw/arm/omap1: Use qemu_log_mask(GUEST_ERROR) instead of fprintf hw/i2c/omap_i2c: Use qemu_log_mask(UNIMP) instead of fprintf ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26aspeed/timer: use the APB frequency from the SCUCédric Le Goater
The timer controller can be driven by either an external 1MHz clock or by the APB clock. Today, the model makes the assumption that the APB frequency is always set to 24MHz but this is incorrect. The AST2400 SoC on the palmetto machines uses a 48MHz input clock source and the APB can be set to 48MHz. The consequence is a general system slowdown. The QEMU machines using the AST2500 SoC do not seem impacted today because the APB frequency is still set to 24MHz. We fix the timer frequency for all SoCs by linking the Timer model to the SCU model. The APB frequency driving the timers is now the one configured for the SoC. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 20180622075700.5923-4-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26aspeed: initialize the SCU controller firstCédric Le Goater
The System Control Unit should be initialized first as it drives all the configuration of the SoC and other device models. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 20180622075700.5923-3-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26aspeed/scu: introduce clock frequenciesCédric Le Goater
All Aspeed SoC clocks are driven by an input source clock which can have different frequencies : 24MHz or 25MHz, and also, on the Aspeed AST2400 SoC, 48MHz. The H-PLL (CPU) clock is defined from a calculation using parameters in the H-PLL Parameter register or from a predefined set of frequencies if the setting is strapped by hardware (Aspeed AST2400 SoC). The other clocks of the SoC are then defined from the H-PLL using dividers. We introduce first the APB clock because it should be used to drive the Aspeed timer model. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 20180622075700.5923-2-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/arm/smmuv3: Add notifications on invalidationEric Auger
On TLB invalidation commands, let's call registered IOMMU notifiers. Those can only be UNMAP notifiers. SMMUv3 does not support notification on MAP (VFIO). This patch allows vhost use case where IOTLB API is notified on each guest IOTLB invalidation. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1529653501-15358-5-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/arm/smmuv3: IOTLB emulationEric Auger
We emulate a TLB cache of size SMMU_IOTLB_MAX_SIZE=256. It is implemented as a hash table whose key is a combination of the 16b asid and 48b IOVA (Jenkins hash). Entries are invalidated on TLB invalidation commands, either globally, or per asid, or per asid/iova. Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 1529653501-15358-4-git-send-email-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/arm/smmuv3: Cache/invalidate config dataEric Auger
Let's cache config data to avoid fetching and parsing STE/CD structures on each translation. We invalidate them on data structure invalidation commands. We put in place a per-smmu mutex to protect the config cache. This will be useful too to protect the IOTLB cache. The caches can be accessed without BQL, ie. in IO dataplane. The same kind of mutex was put in place in the intel viommu. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1529653501-15358-3-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/arm/smmuv3: Fix translate error handlingJia He
In case the STE's config is "Bypass" we currently don't set the IOMMUTLBEntry perm flags and the access does not succeed. Also if the config is 0b0xx (Aborted/Reserved), decode_ste and smmuv3_decode_config currently returns -EINVAL and we don't enter the expected code path: we record an event whereas we should not. This patch fixes those bugs and simplifies the error handling. decode_ste and smmuv3_decode_config now return 0 if aborted or bypassed config was found. Only bad config info produces negative error values. In smmuv3_translate we more clearly differentiate errors, bypass/smmu disabled, aborted and success cases. Also trace points are differentiated. Fixes: 9bde7f0674fe ("hw/arm/smmuv3: Implement translate callback") Reported-by: jia.he@hxt-semitech.com Signed-off-by: jia.he@hxt-semitech.com Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1529653501-15358-2-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26target/arm: Handle small regions in get_phys_addr_pmsav8()Peter Maydell
Allow ARMv8M to handle small MPU and SAU region sizes, by making get_phys_add_pmsav8() set the page size to the 1 if the MPU or SAU region covers less than a TARGET_PAGE_SIZE. We choose to use a size of 1 because it makes no difference to the core code, and avoids having to track both the base and limit for SAU and MPU and then convert into an artificially restricted "page size" that the core code will then ignore. Since the core TCG code can't handle execution from small MPU regions, we strip the exec permission from them so that any execution attempts will cause an MPU exception, rather than allowing it to end up with a cpu_abort() in get_page_addr_code(). (The previous code's intention was to make any small page be treated as having no permissions, but unfortunately errors in the implementation meant that it didn't behave that way. It's possible that some binaries using small regions were accidentally working with our old behaviour and won't now.) We also retain an existing bug, where we ignored the possibility that the SAU region might not cover the entire page, in the case of executable regions. This is necessary because some currently-working guest code images rely on being able to execute from addresses which are covered by a page-sized MPU region but a smaller SAU region. We can remove this workaround if we ever support execution from small regions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180620130619.11362-4-peter.maydell@linaro.org
2018-06-26target/arm: Set page (region) size in get_phys_addr_pmsav7()Peter Maydell
We want to handle small MPU region sizes for ARMv7M. To do this, make get_phys_addr_pmsav7() set the page size to the region size if it is less that TARGET_PAGE_SIZE, rather than working only in TARGET_PAGE_SIZE chunks. Since the core TCG code con't handle execution from small MPU regions, we strip the exec permission from them so that any execution attempts will cause an MPU exception, rather than allowing it to end up with a cpu_abort() in get_page_addr_code(). (The previous code's intention was to make any small page be treated as having no permissions, but unfortunately errors in the implementation meant that it didn't behave that way. It's possible that some binaries using small regions were accidentally working with our old behaviour and won't now.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180620130619.11362-3-peter.maydell@linaro.org
2018-06-26tcg: Support MMU protection regions smaller than TARGET_PAGE_SIZEPeter Maydell
Add support for MMU protection regions that are smaller than TARGET_PAGE_SIZE. We do this by marking the TLB entry for those pages with a flag TLB_RECHECK. This flag causes us to always take the slow-path for accesses. In the slow path we can then special case them to always call tlb_fill() again, so we have the correct information for the exact address being accessed. This change allows us to handle reading and writing from small regions; we cannot deal with execution from the small region. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180620130619.11362-2-peter.maydell@linaro.org
2018-06-26hw/arm/stellaris: Use HWADDR_PRIx to display register addressPhilippe Mathieu-Daudé
Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180624040609.17572-17-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/arm/stellaris: Fix gptm_write() error messagePhilippe Mathieu-Daudé
Missed in df3692e04b2. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180624040609.17572-16-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/net/smc91c111: Use qemu_log_mask(UNIMP) instead of fprintfPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180624040609.17572-15-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/net/smc91c111: Use qemu_log_mask(GUEST_ERROR) instead of hw_errorPhilippe Mathieu-Daudé
hw_error() finally calls abort(), but there is no need to abort here. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180624040609.17572-14-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/net/stellaris_enet: Use qemu_log_mask(GUEST_ERROR) instead of hw_errorPhilippe Mathieu-Daudé
hw_error() finally calls abort(), but there is no need to abort here. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180624040609.17572-13-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/net/stellaris_enet: Fix a typoPhilippe Mathieu-Daudé
Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180624040609.17572-12-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/arm/stellaris: Use qemu_log_mask(UNIMP) instead of fprintfPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180624040609.17572-11-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/arm/omap: Use qemu_log_mask(GUEST_ERROR) instead of fprintfPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180624040609.17572-10-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/arm/omap1: Use qemu_log_mask(GUEST_ERROR) instead of fprintfPhilippe Mathieu-Daudé
TCMI_VERBOSE is no more used, drop the OMAP_8/16/32B_REG macros. Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180624040609.17572-9-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/i2c/omap_i2c: Use qemu_log_mask(UNIMP) instead of fprintfPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180624040609.17572-8-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/sd/omap_mmc: Use qemu_log_mask(UNIMP) instead of printfPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180624040609.17572-7-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/ssi/omap_spi: Use qemu_log_mask(GUEST_ERROR) instead of fprintfPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20180624040609.17572-6-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/dma/omap_dma: Use qemu_log_mask(GUEST_ERROR) instead of fprintfPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180624040609.17572-5-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/dma/omap_dma: Use qemu_log_mask(UNIMP) instead of printfPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180624040609.17572-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/input/tsc2005: Use qemu_log_mask(GUEST_ERROR) instead of fprintfPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180624040609.17572-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26hw/input/pckbd: Use qemu_log_mask(GUEST_ERROR) instead of fprintfPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180624040609.17572-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26MAINTAINERS: Add ASPEED BMCsJoel Stanley
This adds Cedric as the maintainer, with Andrew and I as reviewers, for the ASPEED boards and the peripherals we have developed. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Message-id: 20180625140055.32223-1-joel@jms.id.au Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26xilinx_spips: Make dma transactions as per dma_burst_sizeSai Pavan Boddu
Qspi dma has a burst length of 64 bytes, So limit the transactions w.r.t dma-burst-size property. Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1529660880-30376-1-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26MAINTAINERS: Adopt the Gumstix computers-on-module machinesPhilippe Mathieu-Daudé
These COMs are hard to find, and the companie dropped the support few years ago. Per the "Gumstix Product Changes, Known Issues, and EOL" pdf: - Phasing out: PXA270-based Verdex product line September 2012 - Phasing out: PXA255-based Basix & Connex September 2009 However there are still booting SD card image availables, very convenient to stress test the QEMU SD card implementation. Therefore I volunteer to keep an eye on this file, while it is useful for testing. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180606144706.29732-1-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26aspeed/smc: rename aspeed_smc_flash_send_addr() to aspeed_smc_flash_setup()Cédric Le Goater
Also handle the fake transfers for dummy bytes in this setup routine. It will be useful when we activate MMIO execution. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 20180612065716.10587-4-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26aspeed/smc: fix HW strappingCédric Le Goater
Only the flash type is strapped by HW. The 4BYTE mode is set by firmware when the flash device is detected. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 20180612065716.10587-3-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26aspeed/smc: fix dummy cycles count when in dual IO modeCédric Le Goater
When configured in dual I/O mode, address and data are sent in dual mode, including the dummy byte cycles in between. Adapt the count to the IO setting. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 20180612065716.10587-2-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26Merge remote-tracking branch 'remotes/kraxel/tags/vga-20180626-pull-request' ↵Peter Maydell
into staging vga: bugfix collection. # gpg: Signature made Tue 26 Jun 2018 17:27:23 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20180626-pull-request: virtio-gpu-3d: Drop workaround for VIRTIO_GPU_CAPSET_VIRGL2 define ramfb: fix overflow vga: set owner for mmio regions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26Merge remote-tracking branch 'remotes/kraxel/tags/ui-20180626-pull-request' ↵Peter Maydell
into staging ui: sdl2 fixes, gles support. # gpg: Signature made Tue 26 Jun 2018 14:56:15 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/ui-20180626-pull-request: sdl2: add checking for NULL sdl2: fix copypaste issues Add gles support to egl-helpers, wire up in egl-headless and gtk. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26virtio-gpu-3d: Drop workaround for VIRTIO_GPU_CAPSET_VIRGL2 definePeter Maydell
In commit a8bff79e9f27df we added a definition to hw/virtio/virtio-gpu.h for VIRTIO_GPU_CAPSET_VIRGL2, as a workaround for it not yet being in the Linux kernel headers. In commit 77d361b13c19 we updated our kernel headers to a version which does define the macro, so we can now remove our workaround. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180622173249.29963-1-peter.maydell@linaro.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-06-26ramfb: fix overflowGerd Hoffmann
> CID 1393621: (OVERFLOW_BEFORE_WIDEN) > Potentially overflowing expression "stride * s->height" with type "unsigned > int" (32 bits, unsigned) is evaluated using +32-bit arithmetic, and then used > in a context that expects an expression of type "hwaddr" (64 bits, unsigned). Fix by changing stride from uint32_t to hwaddr. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20180626083120.19515-1-kraxel@redhat.com
2018-06-26vga: set owner for mmio regionsGerd Hoffmann
This makes sure the regions are properly cleaned when unplugging -device seconday-vga. Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Thomas Huth <thuth@redhat.com> Message-id: 20180626060941.8326-1-kraxel@redhat.com
2018-06-26Merge remote-tracking branch ↵Peter Maydell
'remotes/ehabkost/tags/machine-next-pull-request' into staging Machine queue, 2018-06-25 * Don't support --daemonize and --preconfig together * Deprecate machine types pc-0.10 and pc-0.11 # gpg: Signature made Mon 25 Jun 2018 23:37:59 BST # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: hw/i386: Deprecate the machine types pc-0.10 and pc-0.11 vl.c: do not allow --daemonize in combination with --preconfig CLI option Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26sdl2: add checking for NULLPavel Dovgalyuk
Sometimes SDL2 console can't be retrieved on events and scon variable becomes NULL. This patch prevents processing of the events when the console is not available. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru> Signed-off-by: Maria Klimushenkova <maria.klimushenkova@ispras.ru> Message-id: 20180626064729.18070.47600.stgit@pasha-VirtualBox Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-06-26sdl2: fix copypaste issuesPavel Dovgalyuk
This patch fixes text and mouse event processing. These functions used 'key' field of the event instead of appropriate 'text', 'motion', 'button', or 'wheel'. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru> Signed-off-by: Maria Klimushenkova <maria.klimushenkova@ispras.ru> Message-id: 20180626064017.17031.47954.stgit@pasha-VirtualBox Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-06-26Add gles support to egl-helpers, wire up in egl-headless and gtk.Gerd Hoffmann
Add support for OpenGL ES to egl-helpers. Wire up the new option for egl-headless and gtk UIs. egl-headless actually works fine. gtk hits a not-yet implemented code path in libEGL when trying to use gles mode: libEGL warning: FIXME: egl/x11 doesn't support front buffer rendering. (This is mesa 17.2.3). Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Message-id: 20180618112141.23398-1-kraxel@redhat.com
2018-06-26Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' ↵Peter Maydell
into staging x86 queue, 2018-06-25 * Add TOPOEXT feature to EPYC CPU model * AMD's amd-ssbd and amd-no-ssbd CPUID features * Removed unused CPUID flag names: ospke, osxsave * Better formatting of '-cpu help' # gpg: Signature made Mon 25 Jun 2018 23:18:51 BST # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-next-pull-request: i386: Remove generic SMT thread check i386: Enable TOPOEXT feature on AMD EPYC CPU i386: Fix up the Node id for CPUID_8000_001E i386: Allow TOPOEXT to be enabled on older kernels i386: Define AMD's no SSB mitigation needed. i386: define the AMD 'amd-ssbd' CPUID feature bit i386: Remove ospke CPUID flag name i386: Remove osxsave CPUID flag name i386: display known CPUID features linewrapped, in alphabetical order i386: improve sorting of CPU model names i386: improve alignment of CPU model listing i386: Add support for CPUID_8000_001E for AMD Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into stagingPeter Maydell
Pull request # gpg: Signature made Mon 25 Jun 2018 22:11:06 BST # gpg: using RSA key 7DEF8106AAFC390E # gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" # Primary key fingerprint: FAEB 9711 A12C F475 812F 18F2 88A9 064D 1835 61EB # Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76 CBD0 7DEF 8106 AAFC 390E * remotes/jnsnow/tags/ide-pull-request: ahci: fix FIS I bit and PIO Setup FIS interrupt Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-25ahci: fix FIS I bit and PIO Setup FIS interruptPaolo Bonzini
The "I" bit in PIO Setup and D2H FISes is exclusively a device concept and the irqstatus register in the controller does not matter. The SATA spec says when it should be one; for D2H FISes in practice it is always set, while the PIO Setup FIS has several subcases that are documented in the patch. Also, the PIO Setup FIS interrupt is actually generated _after_ data has been received. Someone should probably spend some time reading the SATA specification and figuring out the more obscure fields in the PIO Setup FIS, but this is enough to fix SeaBIOS booting from ATAPI CD-ROMs over an AHCI controller. Fixes: 956556e131e35f387ac482ad7b41151576fef057 Reported-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Message-id: 20180622165159.19863-1-pbonzini@redhat.com [Minor edit to avoid ATAPI comment ambiguity. --js] Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-25Merge branch 'master' of git://git.qemu.org/qemu into x86-nextEduardo Habkost
2018-06-25hw/i386: Deprecate the machine types pc-0.10 and pc-0.11Thomas Huth
The oldest machine type which is still used in a still maintained distro is a pc-0.12 based machine type in RHEL6, so everything that is older than pc-0.12 should not be used anymore. Thus let's deprecate pc-0.10 and pc-0.11 so that we can finally remove them in a future release. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1529917512-10528-1-git-send-email-thuth@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-06-25vl.c: do not allow --daemonize in combination with --preconfig CLI optionIgor Mammedov
some users when using --daemonize expect that QEMU will parse CLI options, initialize VM and only then complete daemonzation by signalling lead process to exit and start listening on monitor socket. So users treat parent process exit as sync point to connect to QEMU's monitor. That however doesn't work when --preconfig options is used, since it provides monitor before completing daemonization and expects user to issue exit-preconfig command when additional configuration via monitor is finished. We also can't move completing daemonization before preconfig monitor becomes available, since that would imply: * partially loosing ability to configure QEMU instance in --preconfig mode since QEMU might drop privileges, chroot and do other things when daemonization is completed * lead to loss of error messages in case they would happen after daemonization Be proactive now and make options mutually exclusive, so users would get clear error message instead of waiting for lead process exit indefinitely before connecting to monitor. PS: In case someone would come up with usecase where both options should be enabled at the same time we could drop this restriction as far as daemonization point is left where it is now (os_setup_post). Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1529501059-163139-1-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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