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2024-07-19Merge tag 'pull-target-arm-20240718' of https://git.linaro.org/people/pmaydel...Richard Henderson
2024-07-18hvf: arm: Do not advance PC when raising an exceptionAkihiko Odaki
2024-07-18tests/arm-cpu-features: Do not assume PMU availabilityAkihiko Odaki
2024-07-18tests/tcg/aarch64: Add test cases for SME FMOPA (widening)Daniyal Khan
2024-07-18target/arm: Use FPST_F16 for SME FMOPA (widening)Richard Henderson
2024-07-18target/arm: Use float_status copy in sme_fmopa_sDaniyal Khan
2024-07-18hw/arm/smmu: Refactor SMMU OASMostafa Saleh
2024-07-18hw/arm/smmuv3: Support and advertise nestingMostafa Saleh
2024-07-18hw/arm/smmuv3: Handle translation faults according to SMMUPTWEventInfoMostafa Saleh
2024-07-18hw/arm/smmuv3: Support nested SMMUs in smmuv3_notify_iova()Mostafa Saleh
2024-07-18hw/arm/smmu: Support nesting in the rest of commandsMostafa Saleh
2024-07-18hw/arm/smmu: Introduce smmu_iotlb_inv_asid_vmidMostafa Saleh
2024-07-18hw/arm/smmu: Support nesting in smmuv3_range_inval()Mostafa Saleh
2024-07-18hw/arm/smmu-common: Support nested translationMostafa Saleh
2024-07-18hw/arm/smmu-common: Add support for nested TLBMostafa Saleh
2024-07-18hw/arm/smmu-common: Rework TLB lookup for nestingMostafa Saleh
2024-07-18hw/arm/smmuv3: Translate CD and TT using stage-2 tableMostafa Saleh
2024-07-18hw/arm/smmu: Introduce CACHED_ENTRY_TO_ADDRMostafa Saleh
2024-07-18hw/arm/smmu: Consolidate ASID and VMID typesMostafa Saleh
2024-07-18hw/arm/smmu: Split smmuv3_translate()Mostafa Saleh
2024-07-18hw/arm/smmu: Use enum for SMMU stageMostafa Saleh
2024-07-18hw/arm/smmuv3: Fix encoding of CLASS in eventsMostafa Saleh
2024-07-18hw/arm/smmu: Fix IPA for stage-2 eventsMostafa Saleh
2024-07-18hw/arm/smmu-common: Add missing size check for stage-1Mostafa Saleh
2024-07-18hw/display/bcm2835_fb: fix fb_use_offsets conditionSamJakob
2024-07-18target/arm: LDAPR should honour SCTLR_ELx.nAAPeter Maydell
2024-07-18target/arm: Fix handling of LDAPR/STLR with negative offsetPeter Maydell
2024-07-18Merge tag 'pull-riscv-to-apply-20240718-1' of https://github.com/alistair23/q...Richard Henderson
2024-07-18roms/opensbi: Update to v1.5Daniel Henrique Barboza
2024-07-18hw/riscv/virt.c: re-insert and deprecate 'riscv,delegate'Daniel Henrique Barboza
2024-07-18target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSRYu-Ming Chang
2024-07-18target/riscv: Expose the Smcntrpmf configAtish Patra
2024-07-18target/riscv: Do not setup pmu timer if OF is disabledAtish Patra
2024-07-18target/riscv: More accurately model priv mode filtering.Rajnesh Kanwal
2024-07-18target/riscv: Start counters from both mhpmcounter and mcountinhibitRajnesh Kanwal
2024-07-18target/riscv: Enforce WARL behavior for scounteren/hcounterenAtish Patra
2024-07-18target/riscv: Save counter values during countinhibit updateAtish Patra
2024-07-18target/riscv: Implement privilege mode filtering for cycle/instretAtish Patra
2024-07-18target/riscv: Only set INH fields if priv mode is availableAtish Patra
2024-07-18target/riscv: Add cycle & instret privilege mode filtering supportKaiwen Xue
2024-07-18target/riscv: Add cycle & instret privilege mode filtering definitionsKaiwen Xue
2024-07-18target/riscv: Add cycle & instret privilege mode filtering propertiesKaiwen Xue
2024-07-18target/riscv: Fix the predicate functions for mhpmeventhX CSRsAtish Patra
2024-07-18target/riscv: Combine set_mode and set_virt functions.Rajnesh Kanwal
2024-07-18target/riscv/kvm: update KVM regs to Linux 6.10-rc5Daniel Henrique Barboza
2024-07-18disas/riscv: Add decode for Zawrs extensionBalaji Ravikumar
2024-07-18target/riscv: Validate the mode in write_vstvecJiayi Li
2024-07-18disas/riscv: Support zabha disassembleLIU Zhiwei
2024-07-18target/riscv: Expose zabha extension as a cpu propertyLIU Zhiwei
2024-07-18target/riscv: Add amocas.[b|h] for ZabhaLIU Zhiwei
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