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2024-07-05hw/sd/sdcard: Use spec v3.01 by defaultPhilippe Mathieu-Daudé
Recent SDHCI expect cards to support the v3.01 spec to negociate lower I/O voltage. Select it by default. Versioned machine types with a version of 9.0 or earlier retain the old default (spec v2.00). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cédric Le Goater <clg@redhat.com> Tested-by: Andrew Jeffery <andrew@codeconstruct.com.au> Tested-by: Cédric Le Goater <clg@redhat.com> Message-Id: <20240703134356.85972-2-philmd@linaro.org>
2024-07-05hw/sd/sdcard: Remove leftover comment about removed 'spi' PropertyPhilippe Mathieu-Daudé
Commit c3287c0f70 ("hw/sd: Introduce a "sd-card" SPI variant model") removed the 'spi' property. Remove the comment left over. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Tested-by: Andrew Jeffery <andrew@codeconstruct.com.au> Message-Id: <20240703085907.66775-2-philmd@linaro.org>
2024-07-05hw/sd/sdcard: Generate random RCA valuePhilippe Mathieu-Daudé
Rather than using the obscure 0x4567 magic value, use a real random one. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Tested-by: Andrew Jeffery <andrew@codeconstruct.com.au> Message-Id: <20240702140842.54242-5-philmd@linaro.org>
2024-07-05tests/qtest/npcm7xx_sdhci: Access the card using its published addressPhilippe Mathieu-Daudé
Currently setup_sd_card() asks the card its address, but discard the response and use hardcoded 0x4567. Set the SDHC_CMD_RESPONSE bit to have the controller record the bus response, and read the response from the RSPREG0 register. Then we can select the card with its real address. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Message-Id: <20240702140842.54242-4-philmd@linaro.org>
2024-07-05hw/sd/npcm7xx_sdhci: Use TYPE_SYSBUS_SDHCI definitionPhilippe Mathieu-Daudé
Use the macro instead of two explicit string literals. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cédric Le Goater <clg@redhat.com> Message-Id: <20240702140842.54242-2-philmd@linaro.org>
2024-07-05hw/sd/sdhci: Log non-sequencial access as GUEST_ERRORPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cédric Le Goater <clg@redhat.com> Tested-by: Andrew Jeffery <andrew@codeconstruct.com.au> Message-Id: <20240702140842.54242-3-philmd@linaro.org>
2024-07-05Merge tag 'pull-maintainer-july24-050724-1' of ↵Richard Henderson
https://gitlab.com/stsquad/qemu into staging Updates for testing, plugins, gdbstub - restore some 32 bit host builds and testing - move some physmem tracepoint definitions - use --userns keep-id for podman builds - cleanup check-tcg compiler flag checking for Arm - fix some casting in fcvt test - tweak check-tcg inline asm for clang - suppress some invalid clang warnings - disable KVM for the TCI builds - improve the insn tracking plugin - cleanups to the lockstep plugin - free plugin data on cpu finalise - assert cpu->index assigned - move qemu_plugin_vcpu_init__async into plugin code - add support for dynamic gdb command tables - allow targets to extend gdb capabilities - enable user-mode MTE support # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmaH3bEACgkQ+9DbCVqe # KkTnvwf9HS68sTICEJqBfY663hjcfdFGsSV/h3q7SN3fhKm/3JHGNK+kumgqdnaC # ykd7tx0AtBGgKm83B7G6MPywsVMIosMeV3mFeJTVHhKsFwGNjSiGkr3j4R2qxjFt # nYQ977FqBKyhvhSplR2wwhwi+JpuGWFGlnQTvdF2Z7ni4YCDFcbl4eiMyGwsjbWm # 0VBP+wCSSMIIbS9Qb7DrhZlfu0+wKZK/q0FLzVVofcLSXGou+Mse/qhtG+yAU/FI # qqqV+7J4PU9E4BqFaklxyRtBrpXNDgpo77pu6ZR7oDXD7HNMuIAuEIlkxMJjarNM # xN64WOOzw15R2RMVyXdYx6ccxWft2Q== # =9Gmk # -----END PGP SIGNATURE----- # gpg: Signature made Fri 05 Jul 2024 04:49:05 AM PDT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] * tag 'pull-maintainer-july24-050724-1' of https://gitlab.com/stsquad/qemu: (40 commits) tests/tcg/aarch64: Add MTE gdbstub tests gdbstub: Add support for MTE in user mode gdbstub: Use true to set cmd_startswith gdbstub: Pass CPU context to command handler gdbstub: Make hex conversion function non-internal target/arm: Factor out code for setting MTE TCF0 field target/arm: Make some MTE helpers widely available target/arm: Fix exception case in allocation_tag_mem_probe gdbstub: Add support for target-specific stubs gdbstub: Move GdbCmdParseEntry into a new header file gdbstub: Clean up process_string_cmd accel/tcg: Move qemu_plugin_vcpu_init__async() to plugins/ plugins: Free CPUPluginState before destroying vCPU state plugins: Ensure vCPU index is assigned in init/exit hooks plugins/lockstep: clean-up output plugins/lockstep: mention the one-insn-per-tb option plugins/lockstep: make mixed-mode safe plugins/lockstep: preserve sock_path test/plugins: preserve the instruction record over translations test/plugin: make insn plugin less noisy by default ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-07-05tests/tcg/aarch64: Add MTE gdbstub testsGustavo Romero
Add tests to exercise the MTE stubs. The tests will only run if a version of GDB that supports MTE is available in the test environment. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> [AJB: re-base and checkpatch fixes] Message-Id: <20240628050850.536447-12-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-41-alex.bennee@linaro.org>
2024-07-05gdbstub: Add support for MTE in user modeGustavo Romero
This commit implements the stubs to handle the qIsAddressTagged, qMemTag, and QMemTag GDB packets, allowing all GDB 'memory-tag' subcommands to work with QEMU gdbstub on aarch64 user mode. It also implements the get/set functions for the special GDB MTE register 'tag_ctl', used to control the MTE fault type at runtime. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-Id: <20240628050850.536447-11-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-40-alex.bennee@linaro.org>
2024-07-05gdbstub: Use true to set cmd_startswithGustavo Romero
cmd_startswith is a boolean so use 'true' to set it instead of 1. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-Id: <20240628050850.536447-10-gustavo.romero@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-39-alex.bennee@linaro.org>
2024-07-05gdbstub: Pass CPU context to command handlerGustavo Romero
Allow passing the current CPU context to command handlers via user_ctx when the handler requires it. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-Id: <20240628050850.536447-9-gustavo.romero@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-38-alex.bennee@linaro.org>
2024-07-05gdbstub: Make hex conversion function non-internalGustavo Romero
Make gdb_hextomem non-internal so it's not confined to use only in gdbstub.c. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240628050850.536447-8-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-37-alex.bennee@linaro.org>
2024-07-05target/arm: Factor out code for setting MTE TCF0 fieldGustavo Romero
Factor out the code used for setting the MTE TCF0 field from the prctl code into a convenient function. Other subsystems, like gdbstub, need to set this field as well, so keep it as a separate function to avoid duplication and ensure consistency in how this field is set across the board. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-Id: <20240628050850.536447-7-gustavo.romero@linaro.org> [AJB: clean-up includes, move MTE defines] Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-36-alex.bennee@linaro.org>
2024-07-05target/arm: Make some MTE helpers widely availableGustavo Romero
Make the MTE helpers allocation_tag_mem_probe, load_tag1, and store_tag1 available to other subsystems. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240628050850.536447-6-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-35-alex.bennee@linaro.org>
2024-07-05target/arm: Fix exception case in allocation_tag_mem_probeGustavo Romero
If page in 'ptr_access' is inaccessible and probe is 'true' allocation_tag_mem_probe should not throw an exception, but currently it does, so fix it. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240628050850.536447-5-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-34-alex.bennee@linaro.org>
2024-07-05gdbstub: Add support for target-specific stubsGustavo Romero
Currently, it's not possible to have stubs specific to a given target, even though there are GDB features which are target-specific, like, for instance, memory tagging. This commit introduces gdb_extend_qsupported_features, gdb_extend_query_table, and gdb_extend_set_table functions as interfaces to extend the qSupported string, the query handler table, and the set handler table, allowing target-specific stub implementations. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240628050850.536447-4-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-33-alex.bennee@linaro.org>
2024-07-05gdbstub: Move GdbCmdParseEntry into a new header fileGustavo Romero
Move GdbCmdParseEntry and its associated types into a separate header file to allow the use of GdbCmdParseEntry and other gdbstub command functions outside of gdbstub.c. Since GdbCmdParseEntry and get_param are now public, kdoc GdbCmdParseEntry and rename get_param to gdb_get_cmd_param. This commit also makes gdb_put_packet public since is used in gdbstub command handling. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240628050850.536447-3-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-32-alex.bennee@linaro.org>
2024-07-05gdbstub: Clean up process_string_cmdGustavo Romero
Change 'process_string_cmd' to return true on success and false on failure, instead of 0 and -1. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240628050850.536447-2-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-31-alex.bennee@linaro.org>
2024-07-05accel/tcg: Move qemu_plugin_vcpu_init__async() to plugins/Philippe Mathieu-Daudé
Calling qemu_plugin_vcpu_init__async() on the vCPU thread is a detail of plugins, not relevant to TCG vCPU management. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240606124010.2460-4-philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-30-alex.bennee@linaro.org>
2024-07-05plugins: Free CPUPluginState before destroying vCPU statePhilippe Mathieu-Daudé
cpu::plugin_state is allocated in cpu_common_initfn() when the vCPU state is created. Release it in cpu_common_finalize() when we are done. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240606124010.2460-3-philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-29-alex.bennee@linaro.org>
2024-07-05plugins: Ensure vCPU index is assigned in init/exit hooksPhilippe Mathieu-Daudé
Since vCPUs are hashed by their index, this index can't be uninitialized (UNASSIGNED_CPU_INDEX). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240606124010.2460-2-philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-28-alex.bennee@linaro.org>
2024-07-05plugins/lockstep: clean-up outputAlex Bennée
We were repeating information which wasn't super clear. As we already will have dumped the last failing PC just note the divergence and dump the previous instruction log. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-27-alex.bennee@linaro.org>
2024-07-05plugins/lockstep: mention the one-insn-per-tb optionAlex Bennée
This really helps with lockstep although its super slow on big jobs. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-26-alex.bennee@linaro.org>
2024-07-05plugins/lockstep: make mixed-mode safeAlex Bennée
The ExecState is shared across the socket and if we want to compare say 64 bit and 32 bit binaries we need the two to use the same sizes for things. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-25-alex.bennee@linaro.org>
2024-07-05plugins/lockstep: preserve sock_pathAlex Bennée
We can't assign sock_path directly from the autofree'd GStrv, take a copy. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-24-alex.bennee@linaro.org>
2024-07-05test/plugins: preserve the instruction record over translationsAlex Bennée
We are interested in the particular instruction so we should use a stable record for it. We could bring this down to physical address but for now vaddr + disas seems to do the trick. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-23-alex.bennee@linaro.org>
2024-07-05test/plugin: make insn plugin less noisy by defaultAlex Bennée
While the match functionality is useful lets make the verbosity optional while we are actually running. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-22-alex.bennee@linaro.org>
2024-07-05gitlab: don't bother with KVM for TCI buildsAlex Bennée
In fact any other accelerator would be pointless as the point is to exercise the TCI accelerator anyway. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-21-alex.bennee@linaro.org>
2024-07-05linux-user/main: Suppress out-of-range comparison warning for clangRichard Henderson
For arm32 host and arm64 guest we get .../main.c:851:32: error: result of comparison of constant 70368744177664 with expression of type 'unsigned long' is always false [-Werror,-Wtautological-constant-out-of-range-compare] if (TASK_UNMAPPED_BASE < reserved_va) { ~~~~~~~~~~~~~~~~~~ ^ ~~~~~~~~~~~ We already disable -Wtype-limits here, for this exact comparison, but that is not enough for clang. Disable -Wtautological-compare as well, which is a superset. GCC ignores the unknown warning flag. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-15-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-20-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Use vmrs/vmsr instead of mcr/mrcRichard Henderson
Clang 14 generates /home/rth/qemu/src/tests/tcg/arm/fcvt.c:431:9: error: invalid operand for instruction asm("mrc p10, 7, r1, cr1, cr0, 0\n\t" ^ <inline asm>:1:6: note: instantiated into assembly here mrc p10, 7, r1, cr1, cr0, 0 ^ /home/rth/qemu/src/tests/tcg/arm/fcvt.c:432:32: error: invalid operand for instruction "orr r1, r1, %[flags]\n\t" ^ <inline asm>:3:6: note: instantiated into assembly here mcr p10, 7, r1, cr1, cr0, 0 ^ This is perhaps a clang bug, but using the neon mnemonic is clearer. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-14-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-19-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Use -march and -mfpu for fcvtRichard Henderson
Clang requires the architecture to be set properly in order to assemble the half-precision instructions. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-13-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-18-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Manually register allocate half-precision numbersAkihiko Odaki
Clang does not allow specifying an integer as the value of a single precision register. Explicitly move value from a general register. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> [rth: Use one single inline asm block.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-12-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-17-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Use -fno-integrated-as for test-arm-iwmmxtRichard Henderson
Clang does not support IWMXT instructions. Fall back to the external assembler. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-11-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-16-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Drop -N from LDFLAGSRichard Henderson
This is redudant with a linker script, and is not supported by clang. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-10-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-15-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Fix fcvt result messagesAkihiko Odaki
The test cases for "converting double-precision to single-precision" emits float but the result variable was typed as uint32_t and corrupted the printed values. Propertly type it as float. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Fixes: 8ec8a55e3fc9 ("tests/tcg/arm: add fcvt test cases for AArch32/64") Message-Id: <20240627-tcg-v2-1-1690a813348e@daynix.com> [rth: Update arm ref file as well] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-9-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-14-alex.bennee@linaro.org>
2024-07-05tests/tcg/aarch64: Add -fno-integrated-as for smeRichard Henderson
The only use of SME is inline assembly. Both gcc and clang only support SME with very recent releases; by deferring detection to the assembler we get better test coverage. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-8-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-13-alex.bennee@linaro.org>
2024-07-05tests/tcg/aarch64: Do not use x constraintAkihiko Odaki
clang version 18.1.6 does not support x constraint for AArch64. Use w instead. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-tcg-v2-5-1690a813348e@daynix.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-7-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-12-alex.bennee@linaro.org>
2024-07-05tests/tcg/aarch64: Fix irg operand typeAkihiko Odaki
irg expects 64-bit integers. Passing a 32-bit integer results in compilation failure with clang version 18.1.6. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-tcg-v2-4-1690a813348e@daynix.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-6-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-11-alex.bennee@linaro.org>
2024-07-05tests/tcg/aarch64: Explicitly specify register widthAkihiko Odaki
clang version 18.1.6 assumes a register is 64-bit by default and complains if a 32-bit value is given. Explicitly specify register width when passing a 32-bit value. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240627-tcg-v2-3-1690a813348e@daynix.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-5-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-10-alex.bennee@linaro.org>
2024-07-05tests/tcg/aarch64: Drop -fno-tree-loop-distribute-patternsRichard Henderson
This option is not supported by clang, and is not required in order to get sve code generation with gcc 12. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-4-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-9-alex.bennee@linaro.org>
2024-07-05tests/tcg: Adjust variable defintion from cc-optionRichard Henderson
Define the variable to the compiler flag used, not "y". This avoids replication of the compiler flag itself. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-3-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-8-alex.bennee@linaro.org>
2024-07-05tests/tcg/minilib: Constify digits in print_numRichard Henderson
This avoids a memcpy to the stack when compiled with clang. Since we don't enable optimization, nor provide memcpy, this results in an undefined symbol error at link time. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-2-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-7-alex.bennee@linaro.org>
2024-07-05tests/docker: Specify --userns keep-id for PodmanAkihiko Odaki
Previously we are always specifying -u $(UID) to match the UID in the container with one outside. This causes a problem with rootless Podman. Rootless Podman remaps user IDs in the container to ones controllable for the current user outside. The -u option instructs Podman to use a specified UID in the container but does not affect the UID remapping. Therefore, the UID in the container can be remapped to some other UID outside the container. This can make the access to bind-mounted volumes fail because the remapped UID mismatches with the owner of the directories. Replace -u $(UID) with --userns keep-id, which fixes the UID remapping. This change is limited to Podman because Docker does not support --userns keep-id. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240626-podman-v1-1-f8c8daf2bb0a@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-6-alex.bennee@linaro.org>
2024-07-05hw/core: ensure kernel_end never gets used undefinedAlex Bennée
Really the problem here is the return values of fit_load_[kernel|fdt]() are a little all over the place. However we don't want to somehow get through not having set kernel_end and having it just be random unused data. The compiler complained on an --enable-gcov build: In file included from ../../hw/core/loader-fit.c:20: /home/alex/lsrc/qemu.git/include/qemu/osdep.h: In function ‘load_fit’: /home/alex/lsrc/qemu.git/include/qemu/osdep.h:486:45: error: ‘kernel_end’ may be used uninitialized [-Werror=maybe-uninitialized] 486 | #define ROUND_UP(n, d) ROUND_DOWN((n) + (d) - 1, (d)) | ^ ../../hw/core/loader-fit.c:270:12: note: ‘kernel_end’ was declared here 270 | hwaddr kernel_end; | ^~~~~~~~~~ Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Aleksandar Rikalo <arikalo@gmail.com> Message-Id: <20240705084047.857176-5-alex.bennee@linaro.org>
2024-07-05tracepoints: move physmem trace pointsAlex Bennée
They don't need to be in the global trace-events file and can have a local trace header. Also add address_space_map tracepoint for tracking mapping behaviour. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-4-alex.bennee@linaro.org>
2024-07-05testing: restore some testing for i686Alex Bennée
The commit 4f9a8315e6 (gitlab-ci.d/crossbuilds: Drop the i386 system emulation job) was a little too aggressive dropping testing for 32 bit system builds. Partially revert but using the debian-i686 cross build images this time as fedora has deprecated the 32 bit stuff. As the SEV breakage gets in the way and its TCG issues we want to catch I've added --disable-kvm to the build. Reported-by: Richard Henderson <richard.henderson@linaro.org> Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-3-alex.bennee@linaro.org>
2024-07-05tests/lcitool: fix debian-i686-cross toolchain prefixAlex Bennée
I guess we never noticed and tried to build with this cross image. Fix the toolchain prefix so we actually build 32 bit images. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-2-alex.bennee@linaro.org>
2024-07-04Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingRichard Henderson
* meson: Pass objects and dependencies to declare_dependency(), not static_library() * meson: Drop the .fa library suffix * target/i386: drop AMD machine check bits from Intel CPUID * target/i386: add avx-vnni-int16 feature * target/i386: SEV bugfixes * target/i386: SEV-SNP -cpu host support * char: fix exit issues # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmaGceoUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroNcpgf/XziKojGOTvYsE7xMijOUswYjCG5m # ZVLqxTug8Q0zO/9mGvluKBTWmh8KhRWOovX5iZL8+F0gPoYPG4ONpNhh3wpA9+S7 # H7ph4V6sDJBX4l3OrOK6htD8dO5D9kns1iKGnE0lY60PkcHl+pU8BNWfK1zYp5US # geiyzuRFRRtDmoNx5+o+w+D+W5msPZsnlj5BnPWM+O/ykeFfSrk2ztfdwHKXUhCB # 5FJcu2sWVx+wsdVzdjgT8USi5+VTK4vabq3SfccmNRxBRnJOCU5MrR63stMDceo4 # TswSB88I0WRV1848AudcGZRkjvKaXLyHJ+QTjg2dp7itEARJ3MGsvOpS5A== # =3kv7 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 04 Jul 2024 02:56:58 AM PDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: target/i386/SEV: implement mask_cpuid_features target/i386: add support for masking CPUID features in confidential guests char-stdio: Restore blocking mode of stdout on exit target/i386: add avx-vnni-int16 feature i386/sev: Fallback to the default SEV device if none provided in sev_get_capabilities() i386/sev: Fix error message in sev_get_capabilities() target/i386: do not include undefined bits in the AMD topoext leaf target/i386: SEV: fix formatting of CPUID mismatch message target/i386: drop AMD machine check bits from Intel CPUID target/i386: pass X86CPU to x86_cpu_get_supported_feature_word meson: Drop the .fa library suffix Revert "meson: Propagate gnutls dependency" meson: Pass objects and dependencies to declare_dependency() meson: merge plugin_ldflags into emulator_link_args meson: move block.syms dependency out of libblock meson: move shared_module() calls where modules are already walked Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-07-04target/i386/SEV: implement mask_cpuid_featuresPaolo Bonzini
Drop features that are listed as "BitMask" in the PPR and currently not supported by AMD processors. The only ones that may become useful in the future are TSC deadline timer and x2APIC, everything else is not needed for SEV-SNP guests (e.g. VIRT_SSBD) or would require processor support (e.g. TSC_ADJUST). This allows running SEV-SNP guests with "-cpu host". Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-07-04target/i386: add support for masking CPUID features in confidential guestsPaolo Bonzini
Some CPUID features may be provided by KVM for some guests, independent of processor support, for example TSC deadline or TSC adjust. If these are not supported by the confidential computing firmware, however, the guest will fail to start. Add support for removing unsupported features from "-cpu host". Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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