aboutsummaryrefslogtreecommitdiff
AgeCommit message (Expand)Author
2021-09-25qapi: Convert simple union InputEvent to flat oneMarkus Armbruster
2021-09-25qapi: Convert simple union KeyValue to flat oneMarkus Armbruster
2021-09-25qapi: Stop enforcing "type name should not end in 'Kind'Markus Armbruster
2021-09-25qapi: Tidy up unusual line breaksMarkus Armbruster
2021-09-24Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20210921' into stagingRichard Henderson
2021-09-24Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.2-pull-re...Peter Maydell
2021-09-24Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request' into ...Peter Maydell
2021-09-24hw/nvme: Return error for fused operationsPankaj Raghav
2021-09-24hw/nvme: fix verification of select field in namespace attachmentNaveen Nagar
2021-09-24hw/nvme: fix validation of ASQ and ACQKlaus Jensen
2021-09-23linux-user/aarch64: Use force_sig_fault()Peter Maydell
2021-09-23linux-user/arm: Use force_sig_fault()Peter Maydell
2021-09-23linux-user: Provide new force_sig_fault() functionPeter Maydell
2021-09-23linux-user: Zero out target_siginfo_t in force_sig()Peter Maydell
2021-09-23linux-user/arm: Use force_sig() to deliver fpa11 emulation SIGFPEPeter Maydell
2021-09-23linux-user/arm: Set siginfo_t addr field for SIGTRAP signalsPeter Maydell
2021-09-23linux-user/aarch64: Set siginfo_t addr field for SIGTRAP signalsPeter Maydell
2021-09-21tcg/riscv: Remove add with zero on user-only memory accessRichard Henderson
2021-09-21hw/core: Make do_unaligned_access noreturnRichard Henderson
2021-09-21tcg/sparc: Introduce tcg_out_mov_delayRichard Henderson
2021-09-21tcg/sparc: Drop inline markersRichard Henderson
2021-09-21tcg/mips: Drop special alignment for code_gen_bufferRichard Henderson
2021-09-21tcg/mips: Unset TCG_TARGET_HAS_direct_jumpRichard Henderson
2021-09-21tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subrRichard Henderson
2021-09-21tcg/mips: Drop inline markersRichard Henderson
2021-09-21accel/tcg: Restrict cpu_handle_halt() to sysemuPhilippe Mathieu-Daudé
2021-09-21include/exec: Move cpu_signal_handler declarationRichard Henderson
2021-09-21Merge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-202...Richard Henderson
2021-09-21Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210921'...Peter Maydell
2021-09-21target/arm: Optimize MVE 1op-immediate insnsPeter Maydell
2021-09-21target/arm: Optimize MVE VSLI and VSRIPeter Maydell
2021-09-21target/arm: Optimize MVE VSHLL and VMOVLPeter Maydell
2021-09-21target/arm: Optimize MVE VSHL, VSHR immediate formsPeter Maydell
2021-09-21target/arm: Optimize MVE VMVNPeter Maydell
2021-09-21target/arm: Optimize MVE VDUPPeter Maydell
2021-09-21target/arm: Optimize MVE VNEG, VABSPeter Maydell
2021-09-21target/arm: Optimize MVE arithmetic opsPeter Maydell
2021-09-21target/arm: Optimize MVE logic opsPeter Maydell
2021-09-21target/arm: Add TB flag for "MVE insns not predicated"Peter Maydell
2021-09-21target/arm: Enforce that FPDSCR.LTPSIZE is 4 on inbound migrationPeter Maydell
2021-09-21target/arm: Avoid goto_tb if we're trying to exit to the main loopPeter Maydell
2021-09-21hvf: arm: Add rudimentary PMC supportAlexander Graf
2021-09-21arm: Add Hypervisor.framework build targetAlexander Graf
2021-09-21hvf: arm: Implement PSCI handlingAlexander Graf
2021-09-21hvf: arm: Implement -cpu hostPeter Maydell
2021-09-21arm/hvf: Add a WFI handlerPeter Collingbourne
2021-09-21Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210920' int...Peter Maydell
2021-09-21hw/riscv: opentitan: Correct the USB Dev addressAlistair Francis
2021-09-21target/riscv: csr: Rename HCOUNTEREN_CY and friendsBin Meng
2021-09-21target/riscv: Backup/restore mstatus.SD bit when virtual register swappedFrank Chang
generated by cgit v1.2.3 (git 2.26.2) at 2024-11-30 07:17:21 +0000