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QEMU is a generic and open source machine & userspace emulator and virtualizer
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2024-01-11
target/loongarch: Implement kvm_arch_init function
Tianrui Zhao
2024-01-11
target/loongarch: Implement kvm get/set registers
Tianrui Zhao
2024-01-11
target/loongarch: Supplement vcpu env initial when vcpu reset
Tianrui Zhao
2024-01-11
target/loongarch: Define some kvm_arch interfaces
Tianrui Zhao
2024-01-11
linux-headers: Synchronize linux headers from linux v6.7.0-rc8
Tianrui Zhao
2024-01-11
Merge tag 'pull-target-arm-20240111' of https://git.linaro.org/people/pmaydel...
Peter Maydell
2024-01-11
Merge tag 'pull-tcg-20240111' of https://gitlab.com/rth7680/qemu into staging
Peter Maydell
2024-01-11
gitlab: fix s390x tag for avocado-system-centos
Nicholas Piggin
2024-01-11
tests/qtest/virtio-ccw: Fix device presence checking
Samuel Tardieu
2024-01-11
qtest: ensure netdev-socket tests have non-overlapping names
Daniel P. Berrangé
2024-01-11
net: handle QIOTask completion to report useful error message
Daniel P. Berrangé
2024-01-11
net: add explicit info about connecting/listening state
Daniel P. Berrangé
2024-01-11
Revert "tests/qtest/netdev-socket: Raise connection timeout to 120 seconds"
Daniel P. Berrangé
2024-01-11
Revert "osdep: add getloadavg"
Daniel P. Berrangé
2024-01-11
Revert "netdev: set timeout depending on loadavg"
Daniel P. Berrangé
2024-01-11
qtest: use correct boolean type for failover property
Daniel P. Berrangé
2024-01-11
q800: move dp8393x_prom memory region to Q800MachineState
Mark Cave-Ayland
2024-01-11
util: fix build with musl libc on ppc64le
Natanael Copa
2024-01-11
tcg/ppc: Use new registers for LQ destination
Richard Henderson
2024-01-11
tcg/i386: use 8-bit OR or XOR for unsigned 8-bit immediates
Paolo Bonzini
2024-01-11
tcg/i386: convert add/sub of 128 to sub/add of -128
Paolo Bonzini
2024-01-10
Merge tag 'pull-riscv-to-apply-20240110' of https://github.com/alistair23/qem...
Peter Maydell
2024-01-10
Merge tag 'qemu-sparc-20240110' of https://github.com/mcayland/qemu into staging
Peter Maydell
2024-01-10
target/riscv: Ensure mideleg is set correctly on reset
Alistair Francis
2024-01-10
target/riscv: Don't adjust vscause for exceptions
Alistair Francis
2024-01-10
target/riscv: Assert that the CSR numbers will be correct
Alistair Francis
2024-01-10
target/riscv: pmp: Ignore writes when RW=01 and MML=0
Ivan Klokov
2024-01-10
roms/opensbi: Upgrade from v1.3.1 to v1.4
Bin Meng
2024-01-10
docs/system/riscv: sifive_u: Update S-mode U-Boot image build instructions
Bin Meng
2024-01-10
target/riscv/kvm: add RVV and Vector CSR regs
Daniel Henrique Barboza
2024-01-10
target/riscv/kvm: do PR_RISCV_V_SET_CONTROL during realize()
Daniel Henrique Barboza
2024-01-10
linux-headers: riscv: add ptrace.h
Daniel Henrique Barboza
2024-01-10
linux-headers: Update to Linux v6.7-rc5
Daniel Henrique Barboza
2024-01-10
target/riscv/kvm.c: remove group setting of KVM AIA if the machine only has 1...
Yong-Xuan Wang
2024-01-10
target/riscv: add rva22s64 cpu
Daniel Henrique Barboza
2024-01-10
target/riscv: add RVA22S64 profile
Daniel Henrique Barboza
2024-01-10
target/riscv: add 'parent' in profile description
Daniel Henrique Barboza
2024-01-10
target/riscv: add satp_mode profile support
Daniel Henrique Barboza
2024-01-10
target/riscv/cpu.c: add riscv_cpu_is_32bit()
Daniel Henrique Barboza
2024-01-10
target/riscv/cpu.c: finalize satp_mode earlier
Daniel Henrique Barboza
2024-01-10
target/riscv: add priv ver restriction to profiles
Daniel Henrique Barboza
2024-01-10
target/riscv: implement svade
Daniel Henrique Barboza
2024-01-10
target/riscv: add 'rva22u64' CPU
Daniel Henrique Barboza
2024-01-10
riscv-qmp-cmds.c: add profile flags in cpu-model-expansion
Daniel Henrique Barboza
2024-01-10
target/riscv/tcg: validate profiles during finalize
Daniel Henrique Barboza
2024-01-10
target/riscv/tcg: honor user choice for G MISA bits
Daniel Henrique Barboza
2024-01-10
target/riscv/tcg: add hash table insert helpers
Daniel Henrique Barboza
2024-01-10
target/riscv/tcg: handle profile MISA bits
Daniel Henrique Barboza
2024-01-10
target/riscv/tcg: add riscv_cpu_write_misa_bit()
Daniel Henrique Barboza
2024-01-10
target/riscv/tcg: add MISA user options hash
Daniel Henrique Barboza
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