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2017-01-20hw/intc/arm_gicv3: Implement EL2 traps for CPU i/f regsPeter Maydell
2017-01-20hw/intc/arm_gicv3: Implement gicv3_cpuif_virt_update()Peter Maydell
2017-01-20hw/intc/arm_gicv3: Implement ICV_ registers EOIR and IARPeter Maydell
2017-01-20hw/intc/arm_gicv3: Implement ICV_ HPPIR, DIR and RPR registersPeter Maydell
2017-01-20hw/intc/arm_gicv3: Implement ICV_ registers which are just accessorsPeter Maydell
2017-01-20hw/intc/arm_gicv3: Add accessors for ICH_ system registersPeter Maydell
2017-01-20hw/intc/gicv3: Add data fields for virtualization supportPeter Maydell
2017-01-20hw/intc/gicv3: Add defines for ICH system register fieldsPeter Maydell
2017-01-20target-arm: Add ARMCPU fields for GIC CPU i/f configPeter Maydell
2017-01-20hw/arm/virt: Wire VIRQ, VFIQ, maintenance irq lines from GIC to CPUPeter Maydell
2017-01-20target-arm: Expose output GPIO line for VCPU maintenance interruptPeter Maydell
2017-01-20hw/intc/arm_gic: Add external IRQ lines for VIRQ and VFIQPeter Maydell
2017-01-20hw/intc/arm_gicv3: Add external IRQ lines for VIRQ and VFIQPeter Maydell
2017-01-20hw/arm/virt-acpi - reserve ECAM space as PNP0C02 deviceArd Biesheuvel
2017-01-20arm: virt: Fix segmentation fault when specifying an unsupported CPUShannon Zhao
2017-01-20aspeed: use first FMC flash as a boot ROMCédric Le Goater
2017-01-20aspeed/smc: extend tests for Command modeCédric Le Goater
2017-01-20aspeed/smc: reset flash after each testCédric Le Goater
2017-01-20aspeed/smc: handle SPI flash Command modeCédric Le Goater
2017-01-20aspeed/smc: adjust the size of the register regionCédric Le Goater
2017-01-20aspeed/smc: unfold the AspeedSMCController arrayCédric Le Goater
2017-01-20aspeed/smc: autostrap CE0/1 configurationCédric Le Goater
2017-01-20aspeed/smc: rework the prototype of the AspeedSMCFlash helper routinesCédric Le Goater
2017-01-20aspeed/smc: remove call to aspeed_smc_update_cs() in reset functionCédric Le Goater
2017-01-20aspeed/smc: remove call to reset in realize functionCédric Le Goater
2017-01-20target/arm: Implement DBGVCR32_EL2 system registerPeter Maydell
2017-01-20target/arm: Handle VIRQ and VFIQ in arm_cpu_do_interrupt_aarch32()Peter Maydell
2017-01-20block: m25p80: Improve 1GiB Micron flash definitionMarcin Krzeminski
2017-01-20block: m25p80: Introduce die erase commandMarcin Krzeminski
2017-01-20block: m25p80: Add Quad Page Program 4byteMarcin Krzeminski
2017-01-20arm: Uniquely name imx25 I2C buses.Alastair D'Silva
2017-01-19Merge remote-tracking branch 'remotes/artyom/tags/pull-sun4v-20170118' into s...Peter Maydell
2017-01-19Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170117' into stagingPeter Maydell
2017-01-18target-sparc: fix up niagara machineArtyom Tarasenko
2017-01-18target-sparc: move common cpu initialisation routines to sparc64.cArtyom Tarasenko
2017-01-18target-sparc: implement sun4v RTCArtyom Tarasenko
2017-01-18target-sparc: add ST_BLKINIT_ ASIs for UA2005+ CPUsArtyom Tarasenko
2017-01-18target-sparc: store the UA2005 entries in sun4u formatArtyom Tarasenko
2017-01-18target-sparc: implement UA2005 ASI_MMU (0x21)Artyom Tarasenko
2017-01-18target-sparc: add more registers to dump_mmuArtyom Tarasenko
2017-01-18target-sparc: implement auto-demapping for UA2005 CPUsArtyom Tarasenko
2017-01-18target-sparc: allow 256M sized pagesArtyom Tarasenko
2017-01-18target-sparc: simplify ultrasparc_tsb_pointerArtyom Tarasenko
2017-01-18target-sparc: implement UA2005 TSB PointersArtyom Tarasenko
2017-01-18target-sparc: use SparcV9MMU type for sparc64 I/D-MMUsArtyom Tarasenko
2017-01-18target-sparc: replace the last tlb entry when no free entries leftArtyom Tarasenko
2017-01-18target-sparc: ignore writes to UA2005 CPU mondo queue registerArtyom Tarasenko
2017-01-18target-sparc: allow priveleged ASIs in hyperprivileged modeArtyom Tarasenko
2017-01-18target-sparc: use direct address translation in hyperprivileged modeArtyom Tarasenko
2017-01-18target-sparc: fix immediate UA2005 trapsArtyom Tarasenko
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