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AgeCommit message (Expand)Author
2021-06-11vhost-vdpa: skip ram device from the IOTLB mappingJason Wang
2021-06-09Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-migration-202...Peter Maydell
2021-06-08hmp: Add "calc_dirty_rate" and "info dirty_rate" cmdsPeter Xu
2021-06-08migration/dirtyrate: make sample page count configurableHyman Huang(黄勇)
2021-06-08sockets: Support multipath TCPDr. David Alan Gilbert
2021-06-08migration/socket: Close the listener at the endDr. David Alan Gilbert
2021-06-08migration: Add cleanup hook for inwards migrationDr. David Alan Gilbert
2021-06-08io/net-listener: Call the notifier during finalizeDr. David Alan Gilbert
2021-06-08channel-socket: Only set CLOEXEC if we have space for fdsDr. David Alan Gilbert
2021-06-08migration/rdma: Fix cm event use after freeLi Zhijian
2021-06-08yank: Unregister function when using TLS migrationLeonardo Bras
2021-06-08Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210...Peter Maydell
2021-06-08target/riscv: rvb: add b-ext version cpu optionFrank Chang
2021-06-08target/riscv: rvb: support and turn on B-extension from command lineKito Cheng
2021-06-08target/riscv: rvb: add/shift with prefix zero-extendKito Cheng
2021-06-08target/riscv: rvb: address calculationKito Cheng
2021-06-08target/riscv: rvb: generalized or-combineFrank Chang
2021-06-08target/riscv: rvb: generalized reverseFrank Chang
2021-06-08target/riscv: rvb: rotate (left/right)Kito Cheng
2021-06-08target/riscv: rvb: shift onesKito Cheng
2021-06-08target/riscv: rvb: single-bit instructionsFrank Chang
2021-06-08target/riscv: add gen_shifti() and gen_shiftiw() helper functionsFrank Chang
2021-06-08target/riscv: rvb: sign-extend instructionsKito Cheng
2021-06-08target/riscv: rvb: min/max instructionsKito Cheng
2021-06-08target/riscv: rvb: pack two words into one registerKito Cheng
2021-06-08target/riscv: rvb: logic-with-negateKito Cheng
2021-06-08target/riscv: rvb: count bits setFrank Chang
2021-06-08target/riscv: rvb: count leading/trailing zerosKito Cheng
2021-06-08target/riscv: reformat @sh format encoding for B-extensionKito Cheng
2021-06-08target/riscv: Pass the same value to oprsz and maxsz.LIU Zhiwei
2021-06-08target/riscv/pmp: Add assert for ePMP operationsAlistair Francis
2021-06-08target/riscv: Dump CSR mscratch/sscratch/satpChangbin Du
2021-06-08target/riscv: Remove unnecessary riscv_*_names[] declarationBin Meng
2021-06-08target/riscv: Do not include 'pmp.h' in user emulationPhilippe Mathieu-Daudé
2021-06-08docs/system: Move the RISC-V -bios information to removedAlistair Francis
2021-06-08target/riscv: fix wfi exception behaviorJose Martins
2021-06-08hw/riscv: microchip_pfsoc: Support direct kernel bootBin Meng
2021-06-08hw/riscv: Use macros for BIOS image namesBin Meng
2021-06-08docs/system/riscv: sifive_u: Document '-dtb' usageBin Meng
2021-06-08docs/system/riscv: Correct the indentation level of supported devicesBin Meng
2021-06-08hw/riscv: Support the official PLIC DT bindingsBin Meng
2021-06-08hw/riscv: Support the official CLINT DT bindingsBin Meng
2021-06-08hw/riscv: virt: Switch to use qemu_fdt_setprop_string_array() helperBin Meng
2021-06-08hw/riscv: sifive_u: Switch to use qemu_fdt_setprop_string_array() helperBin Meng
2021-06-07Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pul...Peter Maydell
2021-06-07Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-updates-07062...Peter Maydell
2021-06-07scripts/checkpatch.pl: process .c.inc and .h.inc files as C sourceMatheus Ferst
2021-06-07tests/vm: expose --source-path to scripts to find extra filesAlex Bennée
2021-06-07gitlab-ci: Split gprof-gcov jobPhilippe Mathieu-Daudé
2021-06-07gitlab: work harder to avoid false positives in checkpatchAlex Bennée