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2023-11-28seabios: update binaries to 1.16.3 releaseGerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2023-11-28seabios: update submodule to 1.16.3 releaseGerd Hoffmann
git shortlog 1e1da7a96300..rel-1.16.3 ------------------------------------- Gerd Hoffmann (1): limit address space used for pci devices. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2023-11-27hw/dma/xlnx_csu_dma: don't throw guest errors when stopping the SRC DMAFrederic Konrad
UG1087 states for the source channel that: if SIZE is programmed to 0, and the DMA is started, the interrupts DONE and MEM_DONE will be asserted. This implies that it is allowed for the guest to stop the source DMA by writing a size of 0 to the SIZE register, so remove the LOG_GUEST_ERROR in that case. While at it remove the comment marking the SIZE register as write-only. See: https://docs.xilinx.com/r/en-US/ug1087-zynq-ultrascale-registers/CSUDMA_SRC_SIZE-CSUDMA-Register Signed-off-by: Frederic Konrad <fkonrad@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Message-id: 20231124143505.1493184-4-fkonrad@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/misc, hw/ssi: Fix some URLs for AMD / Xilinx modelsFrederic Konrad
It seems that the url changed a bit, and it triggers an error. Fix the URLs so the documentation can be reached again. Signed-off-by: Frederic Konrad <fkonrad@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Message-id: 20231124143505.1493184-3-fkonrad@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/ssi/xilinx_spips: fix an out of bound accessFrederic Konrad
The spips, qspips, and zynqmp-qspips share the same realize function (xilinx_spips_realize) and initialize their io memory region with different mmio_ops passed through the class. The size of the memory region is set to the largest area (0x200 bytes for zynqmp-qspips) thus it is possible to write out of s->regs[addr] in xilinx_spips_write for spips and qspips. This fixes that wrong behavior. Reviewed-by: Luc Michel <luc.michel@amd.com> Signed-off-by: Frederic Konrad <fkonrad@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Message-id: 20231124143505.1493184-2-fkonrad@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/input/stellaris_gamepad: Free StellarisGamepad::keycodes[] arrayPhilippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties") added the DEFINE_PROP_ARRAY() macro with the following comment: * It is the responsibility of the device deinit code to free the * @_arrayfield memory. Commit a75f336b97 added: DEFINE_PROP_ARRAY("keycodes", StellarisGamepad, num_buttons, keycodes, qdev_prop_uint32, uint32_t), but forgot to free the 'keycodes' array. Do it in the instance_finalize handler. Fixes: a75f336b97 ("hw/input/stellaris_input: Convert to qdev") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231121174051.63038-7-philmd@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/nvram/xlnx-efuse-ctrl: Free XlnxVersalEFuseCtrl[] "pg0-lock" arrayPhilippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties") added the DEFINE_PROP_ARRAY() macro with the following comment: * It is the responsibility of the device deinit code to free the * @_arrayfield memory. Commit 9e4aa1fafe added: DEFINE_PROP_ARRAY("pg0-lock", XlnxVersalEFuseCtrl, extra_pg0_lock_n16, extra_pg0_lock_spec, qdev_prop_uint16, uint16_t), but forgot to free the 'extra_pg0_lock_spec' array. Do it in the instance_finalize() handler. Cc: qemu-stable@nongnu.org Fixes: 9e4aa1fafe ("hw/nvram: Xilinx Versal eFuse device") # v6.2.0+ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231121174051.63038-6-philmd@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/nvram/xlnx-efuse: Free XlnxEFuse::ro_bits[] array on finalize()Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties") added the DEFINE_PROP_ARRAY() macro with the following comment: * It is the responsibility of the device deinit code to free the * @_arrayfield memory. Commit 68fbcc344e added: DEFINE_PROP_ARRAY("read-only", XlnxEFuse, ro_bits_cnt, ro_bits, qdev_prop_uint32, uint32_t), but forgot to free the 'ro_bits' array. Do it in the instance_finalize handler. Cc: qemu-stable@nongnu.org Fixes: 68fbcc344e ("hw/nvram: Introduce Xilinx eFuse QOM") # v6.2.0+ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231121174051.63038-5-philmd@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/misc/mps2-scc: Free MPS2SCC::oscclk[] array on finalize()Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties") added the DEFINE_PROP_ARRAY() macro with the following comment: * It is the responsibility of the device deinit code to free the * @_arrayfield memory. Commit 4fb013afcc added: DEFINE_PROP_ARRAY("oscclk", MPS2SCC, num_oscclk, oscclk_reset, qdev_prop_uint32, uint32_t), but forgot to free the 'oscclk_reset' array. Do it in the instance_finalize() handler. Cc: qemu-stable@nongnu.org Fixes: 4fb013afcc ("hw/misc/mps2-scc: Support configurable number of OSCCLK values") # v6.0.0+ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231121174051.63038-4-philmd@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/virtio: Free VirtIOIOMMUPCI::vdev.reserved_regions[] on finalize()Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties") added the DEFINE_PROP_ARRAY() macro with the following comment: * It is the responsibility of the device deinit code to free the * @_arrayfield memory. Commit 8077b8e549 added: DEFINE_PROP_ARRAY("reserved-regions", VirtIOIOMMUPCI, vdev.nb_reserved_regions, vdev.reserved_regions, qdev_prop_reserved_region, ReservedRegion), but forgot to free the 'vdev.reserved_regions' array. Do it in the instance_finalize() handler. Cc: qemu-stable@nongnu.org Fixes: 8077b8e549 ("virtio-iommu-pci: Add array of Interval properties") # v5.1.0+ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20231121174051.63038-3-philmd@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/virtio: Add VirtioPCIDeviceTypeInfo::instance_finalize fieldPhilippe Mathieu-Daudé
The VirtioPCIDeviceTypeInfo structure, added in commit a4ee4c8baa ("virtio: Helper for registering virtio device types") got extended in commit 8ea90ee690 ("virtio: add class_size") with the @class_size field. Do similarly with the @instance_finalize field. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231121174051.63038-2-philmd@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/net/can/xlnx-zynqmp: Avoid underflow while popping RX FIFOPhilippe Mathieu-Daudé
Per https://docs.xilinx.com/r/en-US/ug1085-zynq-ultrascale-trm/Message-Format Message Format The same message format is used for RXFIFO, TXFIFO, and TXHPB. Each message includes four words (16 bytes). Software must read and write all four words regardless of the actual number of data bytes and valid fields in the message. There is no mention in this reference manual about what the hardware does when not all four words are read. To fix the reported underflow behavior, I choose to fill the 4 frame data registers when the first register (ID) is accessed, which is how I expect hardware would do. Reported-by: Qiang Liu <cyruscyliu@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Vikram Garhwal <vikram.garhwal@amd.com> Message-id: 20231124183325.95392-3-philmd@linaro.org Fixes: 98e5d7a2b7 ("hw/net/can: Introduce Xilinx ZynqMP CAN controller") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1427 Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Vikram Garhwal <vikram.garhwal@amd.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/net/can/xlnx-zynqmp: Avoid underflow while popping TX FIFOsPhilippe Mathieu-Daudé
Per https://docs.xilinx.com/r/en-US/ug1085-zynq-ultrascale-trm/Message-Format Message Format The same message format is used for RXFIFO, TXFIFO, and TXHPB. Each message includes four words (16 bytes). Software must read and write all four words regardless of the actual number of data bytes and valid fields in the message. There is no mention in this reference manual about what the hardware does when not all four words are written. To fix the reported underflow behavior when DATA2 register is written, I choose to fill the data with the previous content of the ID / DLC / DATA1 registers, which is how I expect hardware would do. Note there is no hardware flag raised under such condition. Reported-by: Qiang Liu <cyruscyliu@gmail.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Vikram Garhwal <vikram.garhwal@amd.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231124183325.95392-2-philmd@linaro.org Fixes: 98e5d7a2b7 ("hw/net/can: Introduce Xilinx ZynqMP CAN controller") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1425 Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Vikram Garhwal <vikram.garhwal@amd.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27target/arm: Handle overflow in calculation of next timer tickPeter Maydell
In commit edac4d8a168 back in 2015 when we added support for the virtual timer offset CNTVOFF_EL2, we didn't correctly update the timer-recalculation code that figures out when the timer interrupt is next going to change state. We got it wrong in two ways: * for the 0->1 transition, we didn't notice that gt->cval + offset can overflow a uint64_t * for the 1->0 transition, we didn't notice that the transition might now happen before the count rolls over, if offset > count In the former case, we end up trying to set the next interrupt for a time in the past, which results in QEMU hanging as the timer fires continuously. In the latter case, we would fail to update the interrupt status when we are supposed to. Fix the calculations in both cases. The test case is Alex Bennée's from the bug report, and tests the 0->1 transition overflow case. Fixes: edac4d8a168 ("target-arm: Add CNTVOFF_EL2") Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/60 Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231120173506.3729884-1-peter.maydell@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27target/arm: Set IL bit for pauth, SVE access, BTI trap syndromesPeter Maydell
The syndrome register value always has an IL field at bit 25, which is 0 for a trap on a 16 bit instruction, and 1 for a trap on a 32 bit instruction (or for exceptions which aren't traps on a known instruction, like PC alignment faults). This means that our syn_*() functions should always either take an is_16bit argument to determine whether to set the IL bit, or else unconditionally set it. We missed setting the IL bit for the syndrome for three kinds of trap: * an SVE access exception * a pointer authentication check failure * a BTI (branch target identification) check failure All of these traps are AArch64 only, and so the instruction causing the trap is always 64 bit. This means we can unconditionally set the IL bit in the syn_*() function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231120150121.3458408-1-peter.maydell@linaro.org Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27Merge tag 'qga-pull-2023-11-25' of https://github.com/kostyanf14/qemu into ↵Stefan Hajnoczi
staging qga-pull-2023-11-25 # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEwsLBCepDxjwUI+uE711egWG6hOcFAmViLdsACgkQ711egWG6 # hOfKIQ//fLIycqEGGLqaORaO04lSOUHU5plSHTU6ACQxILZnMas7CDgfEc2ReCor # iyGCUBmNJ0NiSMRZIKys+0gWh/jgCW613KlOKTvGsn1WOgzXId5TOZSx4P7vfw2o # t7gizx02KdaTnOe3VeTCxBRUrCl1skNw487lek++5L7lKD6a4rstND8T4I2fnWyB # 4Y0gWdIyouWMA2xxkQffxD4ycvHxGeEosp//e6KPB3dk7lM4AAh5CrX/WshItXhp # dL1oykgBDfRCFP42exOs5PrB4fIrYbP58qEzP+9QZpysqsa3OX0AJZw3Wgd1sbHJ # 40II+dQTZFN27NTEeZGw1dg38q0bTNvj2dHvv+w3CHjB8Er2Wfm0ERmSWurQGYf5 # uYqNeHfDVg2m6gi4Nzav679NtWlYLhDBN1pok+K8U/im9UK2M9Jk5XieKvOiE8qX # OVBNMC0ty4Utq6KXZUTjbxQcj5/x50OovN+5CP55OAJBwOCk6Er9j5t9RNuKDLY9 # tkllpjZ6d4KI6uwu1zL4znjNGZvNd7eQNagerv5GNpR5mJZqjv/3snpALUqPHjDA # GKBAXwGUXeMCyFR4Gi5NjX5czgDaK4naGrq8GN6T47q2CwUMvowXRX3nwpw0Q38W # BwRjaFEg6mCNy6Vlfj6gIvVF/3PqJh3Iq4rL26I9EMqri0LZW0o= # =RETE # -----END PGP SIGNATURE----- # gpg: Signature made Sat 25 Nov 2023 12:24:43 EST # gpg: using RSA key C2C2C109EA43C63C1423EB84EF5D5E8161BA84E7 # gpg: Good signature from "Kostiantyn Kostiuk (Upstream PR sign) <kkostiuk@redhat.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: C2C2 C109 EA43 C63C 1423 EB84 EF5D 5E81 61BA 84E7 * tag 'qga-pull-2023-11-25' of https://github.com/kostyanf14/qemu: build-sys: fix meson project version usage Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-27Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi
* document what configure does with virtual environments * bump known good meson version to v1.2.3 * upgrade macOS to 13 (Ventura) and Add manual testing of macOS 14 (Sonoma) * use simple assertions instead of Coverity models * miscellaneous fixes * adjust URL to Coverity tools # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmVgv78UHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroPTmgf/VgDEIRP0teMsz1qAPWyH3eanoF8w # XN9gN0jYUqv1pYVdBws3qxsZFr0GCUrEhF46wbDBj5BgNYjiO6Cg7la1Ryyry7sV # GmwgAQhaCelY7USS4tGeK2A/EpEx4M/pOKfzJhAyjm9d87bdOBoankeYjCR0XZqD # O9CypjA9mxx6Gi28RC1OjIIPxERgazpDMmm1gntEI29qoYiKvD7uOjA3EP7zrBhz # 6Qi1/cx5WgvhePnFAab25jQDgkFaPViZSV28UdfH/29+bUkcJhyki56+vIoLbEtK # 18+wVQkOFl10Ibo7cmQ4JnT8q7BaqhXbO54xmT3LKzMi1I8RCOpOiFFGjg== # =+YGq # -----END PGP SIGNATURE----- # gpg: Signature made Fri 24 Nov 2023 10:22:39 EST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: scripts: adjust url to Coverity tools configure: Make only once with pseudo-"in source tree" builds system: Use &error_abort in memory_region_init_ram_[device_]ptr() disas/cris: Pass buffer size to format_dec() to avoid overflow warning audio: Free consumed default audio devices .gitlab-ci.d/cirrus: Add manual testing of macOS 14 (Sonoma) buildsys: Bump known good meson version to v1.2.3 docs: document what configure does with virtual environments tests: respect --enable/--disable-download for Avocado coverity: physmem: use simple assertions instead of modelling Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-25build-sys: fix meson project version usageMarc-André Lureau
Program wixl found: YES (/usr/bin/wixl) ../qga/meson.build:149:16: ERROR: Unknown variable "project". Fixes: e20d68aa0b9 ("configure, meson: use command line options to configure qemu-ga") Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
2023-11-24scripts: adjust url to Coverity toolsPaolo Bonzini
The URL to the Coverity tools download has changed; the old one points to an obsolete version that is not supported anymore. Adjust to point to the correct and supported tools. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24configure: Make only once with pseudo-"in source tree" buildsAkihiko Odaki
Pseudo-"in source tree" build used to run make in the build directory as many times as goals. Worse, although .NOTPARALLEL is specified, it does not work for patterns, and run make in parallel, which can break things. Add a new rule "build", and let it call make. The pattern rule only needs to specify "build" as its prerequisite and have a no-op recipe so that it does more than canceling built-in implicit rules. Fixes: dedad02720 ("configure: add support for pseudo-"in source tree" builds") Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-ID: <20231119101604.47325-1-akihiko.odaki@daynix.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24system: Use &error_abort in memory_region_init_ram_[device_]ptr()Philippe Mathieu-Daudé
If an unexpected error condition happens, we have to abort (&fatal_error is meant for expected errors). Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Suggested-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20231120133112.82447-1-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24disas/cris: Pass buffer size to format_dec() to avoid overflow warningPhilippe Mathieu-Daudé
Propagate the buffer size to format_dec() and use snprintf(). This should silence this UBSan -Wformat-overflow warning: In file included from /usr/include/stdio.h:906, from include/qemu/osdep.h:114, from ../disas/cris.c:21: In function 'sprintf', inlined from 'format_dec' at ../disas/cris.c:1737:3, inlined from 'print_with_operands' at ../disas/cris.c:2477:12, inlined from 'print_insn_cris_generic.constprop' at ../disas/cris.c:2690:8: /usr/include/bits/stdio2.h:30:10: warning: null destination pointer [-Wformat-overflow=] 30 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 31 | __glibc_objsize (__s), __fmt, | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 32 | __va_arg_pack ()); | ~~~~~~~~~~~~~~~~~ Reported-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231120132222.82138-1-philmd@linaro.org> [Rewritten to fix logic and avoid repeated expression. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24audio: Free consumed default audio devicesAkihiko Odaki
Failed default audio devices were removed from the list but not freed, and that made LeakSanitizer sad. Free default audio devices as they are consumed. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Acked-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-ID: <20231120112804.9736-1-akihiko.odaki@daynix.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24.gitlab-ci.d/cirrus: Add manual testing of macOS 14 (Sonoma)Philippe Mathieu-Daudé
Upgrade libvirt-ci so it covers macOS 14. Add a manual entry (QEMU_JOB_OPTIONAL: 1) to test on Sonoma release. Refresh the lci-tool generated files. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231109160504.93677-3-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24buildsys: Bump known good meson version to v1.2.3Philippe Mathieu-Daudé
We need meson v1.2.3 to build QEMU on macOS Sonoma. It also builds fine all our CI jobs (as tested by also bumping "accepted" in pythondeps.toml), so let's use it as our "good enough" packaged wheel. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1939 Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231109160504.93677-2-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24docs: document what configure does with virtual environmentsPaolo Bonzini
Given the recent confusion around how QEMU detects the system Meson installation, and/or decides to install its own, it is time to fill in the "Python virtual environments and the QEMU build system" section of the documentation. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24Merge tag 'pull-for-8.2-fixes-231123-1' of https://gitlab.com/stsquad/qemu ↵Stefan Hajnoczi
into staging various random fixes for 8.2 - replace fedora-i386 cross compiler with debian - update cirrus MacOS image to Ventura - merge debian-native and debian-amd64 docker images - fix compile of plugins on Windows mingw cross - add some doc notes on semihosting READC - add some doc notes on gdbstub - skip loading debug symbols if we have failed - enable arm-softmmu TCG tests - don't attempt to use native cross builds for linux-user - clean up registers gdb test case (ppc64/s390x) # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmVfXowACgkQ+9DbCVqe # KkQY6Af5AVjPG2aHmixvhTjxEx5dXAH3cGYsWbny3EByT2RijaTBBK/A4OB7RTVV # fr11kGpCkJDk4JPoUz4yTuw6Q+7WBmB0tJJ5wcGyC9cyCjI/PttSTJUC7hiikifw # dg1IVrJZX0ahOpUiDXAtDbeHK1/i95mDRtot40mnyv5HHYHlJKohKsUVtiQEWMeq # 0/X/M5Zq8oJ6wCkbw1nsCqkWpZa7eh4YcB9cGNf87dd0ZJ9M93CbjdSQlsugF2gB # pH+5ZGOj+L/zkbEKoaWJNwYzF4G6hJeLpqP2rLMqRfA5MM43wdd0dJ6gK0ylKeuR # Bo7jC1oEOcuLibZY40OhlOwLTMWiDg== # =ME/l # -----END PGP SIGNATURE----- # gpg: Signature made Thu 23 Nov 2023 09:15:40 EST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-for-8.2-fixes-231123-1' of https://gitlab.com/stsquad/qemu: tests/tcg: finesse the registers check for "hidden" regs configure: don't try a "native" cross for linux-user tests/tcg: enable semiconsole test for Arm tests/tcg: enable arm softmmu tests testing: move arm system tests into their own folder hw/core: skip loading debug on all failures docs/system: clarify limits of using gdbstub in system emulation docs/emulation: expand warning about semihosting tests/tcg: fixup Aarch64 semiconsole test target/nios2: Deprecate the Nios II architecture plugins: fix win plugin tests on cross compile tests/docker: merge debian-native with debian-amd64 .gitlab-ci.d/cirrus: Upgrade macOS to 13 (Ventura) tests/docker: replace fedora-i386 with debian-i686 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-24tests: respect --enable/--disable-download for AvocadoPaolo Bonzini
Pass the content of $mkvenv_flags (which is either "--online" or empty) down to tests/Makefile.include. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24coverity: physmem: use simple assertions instead of modellingVladimir Sementsov-Ogievskiy
Unfortunately Coverity doesn't follow the logic aroung "len" and "l" variables in stacks finishing with flatview_{read,write}_continue() and generate a lot of OVERRUN false-positives. When small buffer (2 or 4 bytes) is passed to mem read/write path, Coverity assumes the worst case of sz=8 in stn_he_p()/ldn_he_p() (defined in include/qemu/bswap.h), and reports buffer overrun. To silence these false-positives we have model functions, which hide real logic from Coverity. However, it turned out that these new two assertions are enough to quiet Coverity. Assertions are better than hiding the logic, so let's drop the modelling and move to assertions for memory r/w call stacks. After patch, the sequence cov-make-library --output-file /tmp/master.xmldb \ scripts/coverity-scan/model.c cov-build --dir ~/covtmp/master make -j9 cov-analyze --user-model-file /tmp/master.xmldb \ --dir ~/covtmp/master --all --strip-path "$(pwd) cov-format-errors --dir ~/covtmp/master \ --html-output ~/covtmp/master_html_report Generate for me the same big set of CIDs excepept for 6 disappeared (so it becomes even better). Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Acked-by: David Hildenbrand <david@redhat.com> Message-ID: <20231005140326.332830-1-vsementsov@yandex-team.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-23tests/tcg: finesse the registers check for "hidden" regsAlex Bennée
The reason the ppc64 and s390x test where failing was because gdb hides them although they are still accessible via regnum. We can re-arrange the test a little bit and include these two arches in our test. We also need to be a bit more careful handling remote-registers as the format isn't easily parsed with pure white space separation. Once we fold types like "long long" and "long double" into a single word we can now assert all registers are either listed or elided. Cc: Ilya Leoshkevich <iii@linux.ibm.com> Cc: <qemu-s390x@nongnu.org> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Daniel Henrique Barboza <danielhb413@gmail.com> Cc: <qemu-ppc@nongnu.org> Cc: Luis Machado <luis.machado@arm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231121153606.542101-1-alex.bennee@linaro.org>
2023-11-23configure: don't try a "native" cross for linux-userAlex Bennée
As 32 bit x86 become rarer we are starting to run into problems with search paths. Although we switched to a Debian container we still favour the native CC on a Bookworm host. As a result we have a broken cross compile setup which then fails to build with: BUILD i386-linux-user guest-tests In file included from /usr/include/linux/stat.h:5, from /usr/include/bits/statx.h:31, from /usr/include/sys/stat.h:465, from /home/alex/lsrc/qemu.git/tests/tcg/multiarch/linux/linux-test.c:28: /usr/include/linux/types.h:5:10: fatal error: asm/types.h: No such file or directory 5 | #include <asm/types.h> | ^~~~~~~~~~~~~ compilation terminated. make[1]: *** [Makefile:119: linux-test] Error 1 make: *** [/home/alex/lsrc/qemu.git/tests/Makefile.include:50: build-tcg-tests-i386-linux-user] Error 2 This is likely to affect more and more linux-user builds so wrap the whole check in a test for softmmu targets (aka bare metal) which don't worry about such header niceties. This allows us to keep using the host compiler for softmmu tests and the roms. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-14-alex.bennee@linaro.org>
2023-11-23tests/tcg: enable semiconsole test for ArmAlex Bennée
This still remains a MANUAL test due to blocking issues. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-13-alex.bennee@linaro.org>
2023-11-23tests/tcg: enable arm softmmu testsAlex Bennée
To make it easier to test 32 bit Arm softmmu issues implement a basic boot.S so we can build the multiarch tests. Currently CHECK_UNALIGNED is disabled as I haven't got the right magic set for it to work. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-12-alex.bennee@linaro.org>
2023-11-23testing: move arm system tests into their own folderAlex Bennée
Prepare for expanding the arm system tests by cleaning up the test directory. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-11-alex.bennee@linaro.org>
2023-11-23hw/core: skip loading debug on all failuresAlex Bennée
ELF_LOAD_FAILED is one of many negative return codes we can have. Lets treat any positive size_t as a success for loading. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-10-alex.bennee@linaro.org>
2023-11-23docs/system: clarify limits of using gdbstub in system emulationAlex Bennée
It seems some users will try and use the gdbstub to debug userspace inside a system emulation. While possible clarify the limitations of this approach and direct the users to a less head scratching way of debugging user-space. Clarifies: https://gitlab.com/qemu-project/qemu/-/issues/1274 Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-9-alex.bennee@linaro.org>
2023-11-23docs/emulation: expand warning about semihostingAlex Bennée
A surprising feature of calls like SYS_READC is this can cause QEMU to indefinitely block as there is no handling for EOF. Clarifies: https://gitlab.com/qemu-project/qemu/-/issues/1963 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-8-alex.bennee@linaro.org>
2023-11-23tests/tcg: fixup Aarch64 semiconsole testAlex Bennée
We need to ensure we squash the serial port if we want to hand craft our muxed input. As a bonus emit the example with a V=1 build to make it easier for people to figure out. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-7-alex.bennee@linaro.org>
2023-11-23target/nios2: Deprecate the Nios II architecturePhilippe Mathieu-Daudé
See commit 9ba1caf510 ("MAINTAINERS: Mark the Nios II CPU as orphan"), last contribution from Chris was in 2012 [1] and Marek in 2018 [2]. [1] https://lore.kernel.org/qemu-devel/1352607539-10455-2-git-send-email-crwulff@gmail.com/ [2] https://lore.kernel.org/qemu-devel/805fc7b5-03f0-56d4-abfd-ed010d4fa769@denx.de/ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231117070250.32932-1-philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-6-alex.bennee@linaro.org>
2023-11-23plugins: fix win plugin tests on cross compileGreg Manning
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1972 Cross compile gcc is more picky about argument order than msys. Changed the meson command to take the (now renamed) libqemu_plugin_api.a as a lib, rather than an object. This puts it in the right place on both native and cross compile gcc commands Reenable plugins on crossbuilds Signed-off-by: Greg Manning <gmanning@rapitasystems.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231109124326.21106-2-gmanning@rapitasystems.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-5-alex.bennee@linaro.org>
2023-11-23tests/docker: merge debian-native with debian-amd64Alex Bennée
debian-native isn't really needed and suffers from the problem of tracking a distros dependencies rather than the projects. With a little surgery we can make the debian-amd64 container architecture neutral and allow people to use it to build a native QEMU. Rename it so it follows the same non-arch pattern of the other distro containers. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-4-alex.bennee@linaro.org>
2023-11-23.gitlab-ci.d/cirrus: Upgrade macOS to 13 (Ventura)Philippe Mathieu-Daudé
macOS 14 "Sonoma" was released on September 2023 [1]. According to QEMU's support policy, we stop supporting the previous major release two years after the the new major release has been published. Replace the macOS 12 (Monterey) testing by macOS 13 (Ventura, released on October 2022, [2]). Refresh the generated files by running: $ make lcitool-refresh [1] https://www.apple.com/newsroom/2023/09/macos-sonoma-is-available-today/ [2] https://www.apple.com/newsroom/2022/10/macos-ventura-is-now-available/ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20231108162022.76189-1-philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-3-alex.bennee@linaro.org>
2023-11-23tests/docker: replace fedora-i386 with debian-i686Daniel P. Berrangé
Fedora is gradually killing off i386 packages in its repos, via a death-by-1000-cuts process. Thus Debian looks like a better long term bet for i686 build testing. It has the added advantage that we can generate it via lcitool too. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231107164109.1449014-1-berrange@redhat.com> [AJB: tweak commit msg, set correct prefix] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-2-alex.bennee@linaro.org>
2023-11-22Merge tag 'pull-riscv-to-apply-20231122' of ↵Stefan Hajnoczi
https://github.com/alistair23/qemu into staging Fourth RISC-V PR for 8.2 This is a few bug fixes for the 8.2 release * Add Zicboz block size to hwprobe * Creat the virt machine FDT before machine init is complete * Don't verify ISA compatibility for zicntr and zihpm * Fix SiFive E CLINT clock frequency * Fix invalid exception on MMU translation stage * Fix mxr bit behavior # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEaukCtqfKh31tZZKWr3yVEwxTgBMFAmVdk4sACgkQr3yVEwxT # gBP6gQ/+NzdRT8Wx/9ynnKs0XwXBwOjQTHDcxCIKLWYrM26c3M+4XEU6IBdg2X1T # qRv9Xal/pXqvAz8tIunF1fNd0Syom4UezcjvLjzipWwS32+D9KEKhKz89aoQc2SQ # lnTBYz6lSUNppp3wj68gNAyPpht+5zVwYZDsjeZCRlAS00dcl26Xde8kt9tJW7zy # tPBvHtJP9AVc+HJdClytEZ79G+EHN5Y4ScoJsVinXSBZs9lIQD+nPmFbxopre6kg # +RUk56eATIlVMISD5pCYyCr3jTebMqVIFY9xtQxb4R09aLYN6+k13NfsJeIcQgaF # MbhAGE0WbXEhKyHe4BuVtyz2k+zYtoh6YSE2Czub2pzPAfpKKWiu4Odi7vHlYejw # Nksn3N7LR3FbhrDst71+EQ28vUuEYfECEFICjzHb+DhxlPxHW9WC4f8ciTUpT57O # HPWYN7zn5Yw97nGBVuITVO7DfcQcw8MS8HcFEelkeDOephiDKr327SWTL+lp5+P5 # fm7PM4Z92GRvT3Voj4mebVxC62CGqehDotWRvXCvc87m4DfLsmpt0nNeX9q18zw+ # phEZ5Q8AMmEnRzpmoXEzzcDWyJIO6huJFad0imTR6MqvXYxsJYIr+wURDB6POelP # SfMqdX9cTu8xJ7Hw4gJT9ZgcTlKsTq5LNpGZ/kLPXS6/y7fgC5Y= # =QK14 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 22 Nov 2023 00:37:15 EST # gpg: using RSA key 6AE902B6A7CA877D6D659296AF7C95130C538013 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6AE9 02B6 A7CA 877D 6D65 9296 AF7C 9513 0C53 8013 * tag 'pull-riscv-to-apply-20231122' of https://github.com/alistair23/qemu: target/riscv/cpu_helper.c: Fix mxr bit behavior target/riscv/cpu_helper.c: Invalid exception on MMU translation stage riscv: Fix SiFive E CLINT clock frequency target/riscv: don't verify ISA compatibility for zicntr and zihpm hw/riscv/virt.c: do create_fdt() earlier, add finalize_fdt() linux-user/riscv: Add Zicboz block size to hwprobe Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-22Merge tag 'seabios-hppa-v13-pull-request' of ↵Stefan Hajnoczi
https://github.com/hdeller/qemu-hppa into staging SeaBIOS-hppa v13 Please pull an update of SeaBIOS-hppa to v13 to fix a system reboot crash in qemu-system-hppa as reported in https://gitlab.com/qemu-project/qemu/-/issues/1991 # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZV0uiQAKCRD3ErUQojoP # X/UEAP4vVLO/21SwO8/UpmImQPGTpoGUxA2DWYHBfjmyVGEoqwEA1sfhqpdahDJ0 # FLSculh9fFG7vWOMCZo2Xnur+X9ahgQ= # =FaBT # -----END PGP SIGNATURE----- # gpg: Signature made Tue 21 Nov 2023 17:26:17 EST # gpg: using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F # gpg: Good signature from "Helge Deller <deller@gmx.de>" [unknown] # gpg: aka "Helge Deller <deller@kernel.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 4544 8228 2CD9 10DB EF3D 25F8 3E5F 3D04 A7A2 4603 # Subkey fingerprint: BCE9 123E 1AD2 9F07 C049 BBDE F712 B510 A23A 0F5F * tag 'seabios-hppa-v13-pull-request' of https://github.com/hdeller/qemu-hppa: target/hppa: Update SeaBIOS-hppa to version 13 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-22target/riscv/cpu_helper.c: Fix mxr bit behaviorIvan Klokov
According to RISCV Specification sect 9.5 on two stage translation when V=1 the vsstatus(mstatus in QEMU's terms) field MXR, which makes execute-only pages readable, only overrides VS-stage page protection. Setting MXR at HS-level(mstatus_hs), however, overrides both VS-stage and G-stage execute-only permissions. The hypervisor extension changes the behavior of MXR\MPV\MPRV bits. Due to RISCV Specification sect. 9.4.1 when MPRV=1, explicit memory accesses are translated and protected, and endianness is applied, as though the current virtualization mode were set to MPV and the current nominal privilege mode were set to MPP. vsstatus.MXR makes readable those pages marked executable at the VS translation stage. Fixes: 36a18664ba ("target/riscv: Implement second stage MMU") Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20231121071757.7178-3-ivan.klokov@syntacore.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-11-22target/riscv/cpu_helper.c: Invalid exception on MMU translation stageIvan Klokov
According to RISCV privileged spec sect. 5.3.2 Virtual Address Translation Process access-fault exceptions may raise only after PMA/PMP check. Current implementation generates an access-fault for mbare mode even if there were no PMA/PMP errors. This patch removes the erroneous MMU mode check and generates an access-fault exception based on the pmp_violation flag only. Fixes: 1448689c7b ("target/riscv: Allow specifying MMU stage") Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20231121071757.7178-2-ivan.klokov@syntacore.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-11-22riscv: Fix SiFive E CLINT clock frequencyRomán Cárdenas
If you check the manual of SiFive E310 (https://cdn.sparkfun.com/assets/7/f/0/2/7/fe310-g002-manual-v19p05.pdf), you can see in Figure 1 that the CLINT is connected to the real time clock, which also feeds the AON peripheral (they share the same clock). In page 43, the docs also say that the timer registers of the CLINT count ticks from the rtcclk. I am currently playing with bare metal applications both in QEMU and a physical SiFive E310 board and I confirm that the CLINT clock in the physical board runs at 32.768 kHz. In QEMU, the same app produces a completely different outcome, as sometimes a new CLINT interrupt is triggered before finishing other tasks. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1978 Signed-off-by: Rom\ufffd\ufffdn C\ufffd\ufffdrdenas <rcardenas.rod@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20231117082840.55705-1-rcardenas.rod@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-11-22target/riscv: don't verify ISA compatibility for zicntr and zihpmClément Chigot
The extensions zicntr and zihpm were officially added in the privilege instruction set specification 1.12. However, QEMU has been implemented them long before it and thus they are forced to be on during the cpu initialization to ensure compatibility (see riscv_cpu_init). riscv_cpu_disable_priv_spec_isa_exts was not updated when the above behavior was introduced, resulting in these extensions to be disabled after all. Signed-off-by: Clément Chigot <chigot@adacore.com> Fixes: c004099330 ("target/riscv: add zicntr extension flag for TCG") Fixes: 0824121660 ("target/riscv: add zihpm extension flag for TCG") Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20231114123913.536194-1-chigot@adacore.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-11-22hw/riscv/virt.c: do create_fdt() earlier, add finalize_fdt()Daniel Henrique Barboza
Commit 49554856f0 fixed a problem, where TPM devices were not appearing in the FDT, by delaying the FDT creation up until virt_machine_done(). This create a side effect (see gitlab #1925) - devices that need access to the '/chosen' FDT node during realize() stopped working because, at that point, we don't have a FDT. This happens because our FDT creation is monolithic, but it doesn't need to be. We can add the needed FDT components for realize() time and, at the same time, do another FDT round where we account for dynamic sysbus devices. In other words, the problem fixed by 49554856f0 could also be fixed by postponing only create_fdt_sockets() and its dependencies, leaving everything else from create_fdt() to be done during init(). Split the FDT creation in two parts: - create_fdt(), now moved back to virt_machine_init(), will create FDT nodes that doesn't depend on additional (dynamic) devices from the sysbus; - a new finalize_fdt() step is added, where create_fdt_sockets() and friends is executed, accounting for the dynamic sysbus devices that were added during realize(). This will make both use cases happy: TPM devices are still working as intended, and devices such as 'guest-loader' have a FDT to work on during realize(). Fixes: 49554856f0 ("riscv: Generate devicetree only after machine initialization is complete") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1925 Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20231110172559.73209-1-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-15 03:49:24 +0000