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2023-11-08hw/ide/ahci: trigger either error IRQ or regular IRQ, not bothNiklas Cassel
According to AHCI 1.3.1, 5.3.8.1 RegFIS:Entry, if ERR_STAT is set, we jump to state ERR:FatalTaskfile, which will raise a TFES IRQ unconditionally, regardless if the I bit is set in the FIS or not. Thus, we should never raise a normal IRQ after having sent an error IRQ. NOTE: for QEMU platforms that use SeaBIOS, this patch depends on QEMU commit 784155cdcb02 ("seabios: update submodule to git snapshot"), and QEMU commit 14f5a7bae4cb ("seabios: update binaries to git snapshot"), which update SeaBIOS to a version that contains SeaBIOS commit 1281e340 ("ahci: handle TFES irq correctly"). Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> Message-ID: <20231011131220.1992064-1-nks@flawful.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-08block: Protect bs->file with graph_lockKevin Wolf
Almost all functions that access bs->file already take the graph lock now. Add locking to the remaining users and finally annotate the struct field itself as protected by the graph lock. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-ID: <20231027155333.420094-25-kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-08block: Take graph lock for most of .bdrv_openKevin Wolf
Most implementations of .bdrv_open first open their file child (which is an operation that internally takes the write lock and therefore we shouldn't hold the graph lock while calling it), and afterwards many operations that require holding the graph lock, e.g. for accessing bs->file. This changes block drivers that follow this pattern to take the graph lock after opening the child node. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-ID: <20231027155333.420094-24-kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-08vhdx: Take locks for accessing bs->fileKevin Wolf
This updates the vhdx code to add GRAPH_RDLOCK annotations for all places that read bs->file. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-ID: <20231027155333.420094-23-kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-08qcow2: Take locks for accessing bs->fileKevin Wolf
This updates the qcow2 code to add GRAPH_RDLOCK annotations for all places that read bs->file. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-ID: <20231027155333.420094-22-kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-08block: Add missing GRAPH_RDLOCK annotationsKevin Wolf
This adds GRAPH_RDLOCK to some driver callbacks that are already called with the graph lock held, and which will need the annotation because they access bs->file, but don't have it yet. This also covers a few callbacks that were not marked GRAPH_RDLOCK before, but where updating BlockDriver is trivially possible. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-ID: <20231027155333.420094-21-kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-08block: Introduce bdrv_co_change_backing_file()Kevin Wolf
bdrv_change_backing_file() is called both inside and outside coroutine context. This makes it difficult for it to take the graph lock internally. It also means that driver implementations need to be able to run outside of coroutines, too. Switch it to the usual model with a coroutine based implementation and a co_wrapper instead. The new function is marked GRAPH_RDLOCK. As the co_wrapper now runs the function in the AioContext of the node (as it should always have done), this is not GLOBAL_STATE_CODE() any more. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-ID: <20231027155333.420094-20-kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-08blkverify: Add locking for request_fnKevin Wolf
This is either bdrv_co_preadv() or bdrv_co_pwritev() which both need to have the graph locked. Annotate the function pointer accordingly and add locking to its callers. This shouldn't actually have resulted in a bug because the graph lock is already held by blkverify_co_prwv(), which waits for the coroutines to terminate. Annotate with GRAPH_RDLOCK as well to make this clearer. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-ID: <20231027155333.420094-19-kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-08block: Protect bs->backing with graph_lockKevin Wolf
Almost all functions that access bs->backing already take the graph lock now. Add locking to the remaining users and finally annotate the struct field itself as protected by the graph lock. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-ID: <20231027155333.420094-18-kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-08Revert "tests/tcg/nios2: Re-enable linux-user tests"Alex Bennée
nios2 signal tests are broken again: retry.py -n 10 -c -- ./qemu-nios2 ./tests/tcg/nios2-linux-user/signals Results summary: 0: 8 times (80.00%), avg time 2.254 (0.00 varience/0.00 deviation) -11: 2 times (20.00%), avg time 0.253 (0.00 varience/0.00 deviation) Ran command 10 times, 8 passes This wasn't picked up by CI as we don't have a docker container that can build QEMU with the nios2 compiler. I don't have time to bisect the breakage and the target is orphaned anyway so take the easy route and revert it. This reverts commit 20e7524ff9f0cab4c9a0306014d6f3d7b467ae1e. Cc: Chris Wulff <crwulff@gmail.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-23-alex.bennee@linaro.org>
2023-11-08mailmap: fixup some more corrupted author fieldsAlex Bennée
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: Timothée Cocault <timothee.cocault@gmail.com> Cc: fanwenjie <fanwj@mail.ustc.edu.cn> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-22-alex.bennee@linaro.org>
2023-11-08contrib/gitdm: add Daynix to domain-mapAlex Bennée
Daynix describes itself as a cloud technology company so I assume employee contributions should count as such. Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-21-alex.bennee@linaro.org>
2023-11-08contrib/gitdm: map HiSilicon to HuaweiAlex Bennée
HiSilicon is a wholly owned subsidiary of Huawei so map the domain to the same company to avoid splitting the contributions. Reviewed-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-20-alex.bennee@linaro.org>
2023-11-08contrib/gitdm: add domain-map for Cestcluzhipeng
Signed-off-by: luzhipeng <luzhipeng@cestc.cn> Message-Id: <20230628072236.1925-1-luzhipeng@cestc.cn> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-19-alex.bennee@linaro.org>
2023-11-08contrib/gitdm: Add Rivos Inc to the domain mapAlex Bennée
Whatever they are up to a number of people for the company are contributing to QEMU so lets group them together. Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-18-alex.bennee@linaro.org>
2023-11-08plugins: allow plugins to be enabled on windowsGreg Manning
allow plugins to be enabled in the configure script on windows. Also, add the qemu_plugin_api.lib to the installer. Signed-off-by: Greg Manning <gmanning@rapitasystems.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231102172053.17692-5-gmanning@rapitasystems.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> [AJB: add check for dlltool to configure] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-17-alex.bennee@linaro.org>
2023-11-08gitlab: add dlltool to Windows CIAlex Bennée
We also --disable-plugins for the two mingw based cross builds as although they have dlltool they seem to be unhappy linking. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2023-11-08plugins: disable lockstep plugin on windowsGreg Manning
The lockstep plugin uses unix sockets and would require a different communication mechanism to work on Windows. Signed-off-by: Greg Manning <gmanning@rapitasystems.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231102172053.17692-4-gmanning@rapitasystems.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-16-alex.bennee@linaro.org>
2023-11-08plugins: make test/example plugins work on windowsGreg Manning
Generate a qemu_plugin_api.lib delay import lib on windows, for windows qemu plugins to link against. Implement an example dll load fail hook to link up the API functions correctly when a plugin is loaded on windows. Update the build scripts for the test and example plugins to use these things. Signed-off-by: Greg Manning <gmanning@rapitasystems.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231102172053.17692-3-gmanning@rapitasystems.com> [AJB: use find_program for dlltool, s/Windows/windows/] Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-15-alex.bennee@linaro.org>
2023-11-08plugins: add dllexport and dllimport to api funcsGreg Manning
In qemu-plugin.h, mark all API functions as __declspec(dllexport) when compiling the executables, and as __declspec(dllimport) when being used to compile plugins against. Signed-off-by: Greg Manning <gmanning@rapitasystems.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231102172053.17692-2-gmanning@rapitasystems.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231106185112.2755262-14-alex.bennee@linaro.org>
2023-11-08configure: tell meson and contrib_plugins about DLLTOOLAlex Bennée
To cleanly handle cross-building we need to export the details of dlltool into meson's list of cross binaries and into the contrib/plugins/ make configuration. Cc: Greg Manning <gmanning@rapitasystems.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-13-alex.bennee@linaro.org>
2023-11-08cpu: Call plugin hooks only when readyAkihiko Odaki
The initialization and exit hooks will not affect the state of vCPU outside TCG context, but they may depend on the state of vCPU. Therefore, it's better to call plugin hooks after the vCPU state is fully initialized and before it gets uninitialized. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231025093128.33116-16-akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-12-alex.bennee@linaro.org>
2023-11-08gdbstub: Introduce GDBFeatureBuilderAkihiko Odaki
GDBFeatureBuilder unifies the logic to generate dynamic GDBFeature. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231025093128.33116-4-akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-11-alex.bennee@linaro.org>
2023-11-08gdbstub: Introduce gdb_find_static_feature()Akihiko Odaki
This function is useful to determine the number of registers exposed to GDB from the XML name. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231025093128.33116-3-akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-10-alex.bennee@linaro.org>
2023-11-08gdbstub: Add num_regs member to GDBFeatureAkihiko Odaki
Currently the number of registers exposed to GDB is written as magic numbers in code. Derive the number of registers GDB actually see from XML files to replace the magic numbers in code later. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231025093128.33116-2-akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-9-alex.bennee@linaro.org>
2023-11-08tests/avocado: update the tcg_plugins testAlex Bennée
There are a number of things that are broken on the test currently so lets fix that up: - replace retired Debian kernel for tuxrun_baseline one - remove "detected repeat instructions test" since ea185a55 - log total counted instructions/memory accesses Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-8-alex.bennee@linaro.org>
2023-11-08tests/tcg: add an explicit gdbstub register testerAlex Bennée
We already do a couple of "info registers" for specific tests but this is a more comprehensive multiarch test. It also has some output helpful for debugging the gdbstub by showing which XML features are advertised and what the underlying register numbers are. My initial motivation was to see if there are any duplicate register names exposed via the gdbstub while I was reviewing the proposed register interface for TCG plugins. Mismatches between the xml and remote-desc are reported for debugging but do not fail the test. We also skip the tests for the following arches for now until we can investigate and fix any issues: - s390x (fails to read v0l->v15l, not seen in remote-registers) - ppc64 (fails to read vs0h->vs31h, not seen in remote-registers) Cc: Akihiko Odaki <akihiko.odaki@daynix.com> Cc: Luis Machado <luis.machado@linaro.org> Cc: Ilya Leoshkevich <iii@linux.ibm.com> Cc: qemu-s390x@nongnu.org Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Daniel Henrique Barboza <danielhb413@gmail.com> Cc: qemu-ppc@nongnu.org Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-7-alex.bennee@linaro.org>
2023-11-08target/arm: hide aliased MIDR from gdbstubAlex Bennée
This is just a constant alias register with the same value as the "other" MIDR so it serves no purpose being presented to gdbstub. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20231106185112.2755262-6-alex.bennee@linaro.org>
2023-11-08target/arm: hide all versions of DBGD[RS]AR from gdbstubAlex Bennée
This avoids two duplicates being presented to gdbstub. As the registers are RAZ anyway it is unlikely their value would be of use to someone using gdbstub anyway. Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-5-alex.bennee@linaro.org>
2023-11-08target/arm: mark the 32bit alias of PAR when LPAE enabledAlex Bennée
We also mark it ARM_CP_NO_GDB so we avoid duplicate PAR's in the system register XML we send to gdb. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231107105145.2916124-1-alex.bennee@linaro.org>
2023-11-08gdb-xml: fix duplicate register in arm-neon.xmlAlex Bennée
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Fixes: 56aebc8916 ("Add GDB XML register description support") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-3-alex.bennee@linaro.org>
2023-11-08default-configs: Add TARGET_XML_FILES definitionAkihiko Odaki
loongarch64-linux-user has references to XML files so include them. Fixes: d32688ecdb ("default-configs: Add loongarch linux-user support") Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20231030054834.39145-6-akihiko.odaki@daynix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [AJB: remove base32 from list] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-2-alex.bennee@linaro.org>
2023-11-08Merge tag 'pull-ppc-20231107' of https://gitlab.com/danielhb/qemu into stagingStefan Hajnoczi
ppc patch queue for 2023-11-07: This queue, the last one before the 8.2 feature freeze, has miscellanous changes that includes new PowerNV features and the new AmigaONE XE board. # -----BEGIN PGP SIGNATURE----- # # iIwEABYKADQWIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCZUqiORYcZGFuaWVsaGI0 # MTNAZ21haWwuY29tAAoJEDzZypbeAzFkBSUA/2qm8CyrRqY5+tsjtWQqZmPZ3L1F # CgnXFNqtY2tzbTe5AQCi6FeQBEmXbZYVfryZyA+CQ4DUERc+18pe6hV3bBR9Cg== # =cnHS # -----END PGP SIGNATURE----- # gpg: Signature made Wed 08 Nov 2023 04:46:49 HKT # gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164 # gpg: issuer "danielhb413@gmail.com" # gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164 * tag 'pull-ppc-20231107' of https://gitlab.com/danielhb/qemu: ppc: qtest already exports qtest_rtas_call() hw/pci-host: Update PHB5 XSCOM registers ppc/pnv: Fix number of I2C engines and ports for power9/10 ppc/pnv: Connect PNV I2C controller to powernv10 ppc/pnv: Connect I2C controller model to powernv9 chip ppc/pnv: Add an I2C controller model tests/avocado: Add test for amigaone board hw/ppc: Add emulation of AmigaOne XE board hw/pci-host: Add emulation of Mai Logic Articia S Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-08Merge tag 'misc-fixes-pull-request' of https://gitlab.com/berrange/qemu into ↵Stefan Hajnoczi
staging * Print error with f32 audio format in wav backend instead of abort * Drop redundant listener name suffix * Update libvirt mailing list address * Cleanup RSA key error paths * Fix CPU uarch ABI script QMP command calling # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE2vOm/bJrYpEtDo4/vobrtBUQT98FAmVKiwoACgkQvobrtBUQ # T9+SjxAAmDBWE9WI/eKZEb3QVNi3W90bVNIKMSdu7DMaqSPGMe6dcNeJy6kHL2ud # EgdvtKgWq5wwFDojrYiUB75tSFGP7InK2a7EN7t60kE/XxtqR/fvLo11d+gUI7Z6 # vetsHLtDYEs3Hr/75qg1/ock/G1TxzlJknzww1zDjQrwFSaJnOWDdY+RSRGTwEho # PRfFRkIDZqs3LAKyjRdiYWms90vogG2Bwygmo/mirgta9Lmkz9WC9SN/EqOvOBOE # NyaO84xu38U3JwN5d9w4MFdgayFNRYTcvTu8J0NdHLp16CYBViGecIGb4deDYN0U # jhmfKChyr0tJucPsRndXQU2KFusePjiSWEsG9FdbpXdjFGIwinJUDKOaHI4Kk9pc # stGCwb8+9Ec0e31JqtMBd5VeoToK8UsthVqAx1brnXv9K5liSXS7nyFPwNp/SMi4 # UNpjawSItAHEgc6VzqDNZY+dGtueMZmM0lf7cMLho3BgAeyTbr1NuwOIJx28JP2E # NnkAwDHjj9u1mkhRM7BbgBzGq006naWP8V6dCGQSH+/D0C9P3yzs7XLtvwtUDO3P # DalGRsazT+o+pyuyw0uyV2z6GuLAl9ZhI0MJCgIxsmASdxANxMcIaCrs1yc0IG2A # y16e4/Ic/FzqkbwkkBy3tkDF7vI0++1MuqmcWki+RFz1hzqmY+Y= # =KHzn # -----END PGP SIGNATURE----- # gpg: Signature made Wed 08 Nov 2023 03:07:54 HKT # gpg: using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104FDF # gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full] # gpg: aka "Daniel P. Berrange <berrange@redhat.com>" [full] # Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF * tag 'misc-fixes-pull-request' of https://gitlab.com/berrange/qemu: scripts/cpu-x86-uarch-abi.py: Fix parameter error of cmd MAINTAINERS: update libvirt devel mailing list address audio: don't abort on f32 audio format in wav backend io: Stop appending -listen to net listeners crypto/rsakey-builtin.c.inc: Clean up two error paths Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-08Merge tag 'pull-request-2023-11-07' of https://gitlab.com/thuth/qemu into ↵Stefan Hajnoczi
staging * Fix s390x CPU reconfiguration information in the SCLP facility map * Fix condition code problem in the CLC and LAALG instruction * Fix ordering of the new s390x topology list entries * Add some more files to the MAINTAINERS file * Allow newer versions of Tesseract in the m68k nextcube test # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmVKgksRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbWIHg//TM3JOpsMEqHKlUKqOJH02mFQrK6H7LG0 # BC56FG7T+/mpYs1NTG92t8nCK03C2ZCweQWD7ZulRJAjPhZv+TF5bJEForivU7+k # PKEshz9xKCWn2YGyNnf2LA06J1JkF215+KlReOoxwSgj1cPlHfBLQ0DtxmpJJZ1G # h5p4d26BbSlwR58HrFWTlhgJMPenl59BETUGIK1FklBxunmZeeijddfniAhOT44y # i0u9/H9KCg3tkwBROUy+42QV+ef32kz/yvi5RmYQI5W7PixO4sxH6MYduOjshsu9 # wK70f8EOwiZV6lFxqmbV7vxFeNnp5IuaVU7PMBoAkwZqLw99mSFy1+1BabCuL5b+ # 3iUTiD4UW48MYwE2Ua6Lit4kpfjhwcp/UYz6pIk6TCBQX6LfzO+nj+rod0GdIpyZ # 4Lwm7jBtpTlYkGrsMvpA/qcidOtqPA1lmBTNlY1hFodQF6KWtyObn0w5AM80xeeU # /mGxQDz97Bpz7LKZvhu+k38jaWvnJFnl3jF1zet88CYL9YL+YI/k1KjhFafCXb0V # 38Xpt5JTWxyLSh2B3gx0OpokX5bftvW9GlLix0HqL7c23uYwR2Bq+Rd6I8SAlk4C # uJq6gqP8IFBFHfgbmyqf/fyd/eHxm7J1voIdy9PZyxZ1JYT9A7yu56qV6SJYwCpr # aARwui/Dm4o= # =y+cC # -----END PGP SIGNATURE----- # gpg: Signature made Wed 08 Nov 2023 02:30:35 HKT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2023-11-07' of https://gitlab.com/thuth/qemu: target/s390x/cpu topology: Fix ordering and creation of TLEs tests/tcg/s390x: Test ADD LOGICAL WITH CARRY tests/tcg/s390x: Test LAALG with negative cc_src target/s390x: Fix LAALG not updating cc_src tests/tcg/s390x: Test CLC with inaccessible second operand target/s390x: Fix CLC corrupting cc_src target/s390x/cpu_models: Use 'first_cpu' in s390_get_feat_block() s390/sclp: fix SCLP facility map tests/avocado: Allow newer versions of tesseract in the nextcube test MAINTAINERS: Add artist.c to the hppa machine section MAINTAINERS: Add the virtio-gpu documentation to the corresponding section Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-08Merge tag 'misc-cpus-20231107' of https://github.com/philmd/qemu into stagingStefan Hajnoczi
Misc hardware patch queue HW emulation: - PMBus fixes and tests (Titus) - IDE fixes and tests (Fiona) - New ADM1266 sensor (Titus) - Better error propagation in PCI-ISA i82378 (Philippe) - Declare SD model QOM types using DEFINE_TYPES macro (Philippe) Topology: - Fix CPUState::nr_cores calculation (Zhuocheng Ding and Zhao Liu) Monitor: - Synchronize CPU state in 'info lapic' (Dongli Zhang) QOM: - Have 'cpu-qom.h' target-agnostic (Philippe) - Move ArchCPUClass definition to each target's cpu.h (Philippe) - Call object_class_is_abstract once in cpu_class_by_name (Philippe) UI: - Use correct key names in titles on MacOS / SDL2 (Adrian) MIPS: - Fix MSA BZ/BNZ and TX79 LQ/SQ opcodes (Philippe) Nios2: - Create IRQs *after* vCPU is realized (Philippe) PPC: - Restrict KVM objects to system emulation (Philippe) - Move target-specific definitions out of 'cpu-qom.h' (Philippe) S390X: - Make hw/s390x/css.h and hw/s390x/sclp.h headers target agnostic (Philippe) X86: - HVF & KVM cleanups (Philippe) Various targets: - Use env_archcpu() to optimize (Philippe) Misc: - Few global variable shadowing removed (Philippe) - Introduce cpu_exec_reset_hold and factor tcg_cpu_reset_hold out (Philippe) - Remove few more 'softmmu' mentions (Philippe) - Fix and cleanup in vl.c (Akihiko & Marc-André) - Resource leak fix in dump (Zongmin Zhou) - MAINTAINERS updates (Thomas, Daniel) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmVKKmEACgkQ4+MsLN6t # wN4xHQ//X/enH4C7K3VP/tSinDiwmXN2o61L9rjqSDQkBaCtktZx4c8qKSDL7V4S # vwzmvvBn3biMXQwZNVJo9d0oz2qoaF9tI6Ao0XDHAan9ziagfG9YMqWhkCfj077Q # jLdCqkUuMJBvQgXGB1a6UgCme8PQx7h0oqjbCNfB0ZBls24b5DiEjO87LE4OTbTi # zKRhYEpZpGwIVcy+1dAsbaBpGFP06sr1doB9Wz4c06eSx7t0kFSPk6U4CyOPrGXh # ynyCxPwngxIXmarY8gqPs3SBs7oXsH8Q/ZOHr1LbuXhwSuw/0zBQU9aF7Ir8RPan # DB79JjPrtxTAhICKredWT79v9M18D2/1MpONgg4vtx5K2FzGYoAJULCHyfkHMRSM # L6/H0ZQPHvf7w72k9EcSQIhd0wPlMqRmfy37/8xcLiw1h4l/USx48QeKaeFWeSEu # DgwSk+R61HbrKvQz/U0tF98zUEyBaQXNrKmyzht0YE4peAtpbPNBeRHkd0GMae/Z # HOmkt8QlFQ0T14qSK7mSHaSJTUzRvFGD01cbuCDxVsyCWWsesEikXBACZLG5RCRY # Rn1WeX1H9eE3kKi9iueLnhzcF9yM5XqFE3f6RnDzY8nkg91lsTMSQgFcIpv6uGyp # 3WOTNSC9SoFyI3x8pCWiKOGytPUb8xk+PnOA85wYvVmT+7j6wus= # =OVdQ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Nov 2023 20:15:29 HKT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'misc-cpus-20231107' of https://github.com/philmd/qemu: (75 commits) dump: Add close fd on error return to avoid resource leak ui/sdl2: use correct key names in win title on mac MAINTAINERS: Add more guest-agent related files to the corresponding section MAINTAINERS: Add include/hw/xtensa/mx_pic.h to the XTFPGA machine section MAINTAINERS: update libvirt devel mailing list address MAINTAINERS: Add the CAN documentation file to the CAN section MAINTAINERS: Add include/hw/timer/tmu012.h to the SH4 R2D section hw/sd: Declare QOM types using DEFINE_TYPES() macro hw/i2c: pmbus: reset page register for out of range reads hw/i2c: pmbus: immediately clear faults on request tests/qtest: add tests for ADM1266 hw/sensor: add ADM1266 device model hw/i2c: pmbus: add VCAP register hw/i2c: pmbus: add fan support hw/i2c: pmbus: add vout mode bitfields hw/i2c: pmbus add support for block receive tests/qtest: ahci-test: add test exposing reset issue with pending callback hw/ide: reset: cancel async DMA operation before resetting state hw/cpu: Update the comments of nr_cores and nr_dies system/cpus: Fix CPUState.nr_cores' calculation ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-07Xen: Fix xen_set_irq() and xendevicemodel_set_irq_level()Vikram Garhwal
Remove '=' from 'if CONFIG_XEN_CTRL_INTERFACE_VERSION <= 41500'. Because xendevicemodel_set_irq_level() was introduced in 4.15 version. Also, update xendevicemodel_set_irq_level() to return -1 for older versions. Signed-off-by: Vikram Garhwal <vikram.garhwal@amd.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2023-11-07ppc: qtest already exports qtest_rtas_call()Juan Quintela
Having two functions with the same name is a bad idea. As spapr only uses the function locally, made it static. When you compile with clang, you get this compilation error: /usr/bin/ld: tests/qtest/libqos/libqos.fa.p/.._libqtest.c.o: in function `qtest_rtas_call': /scratch/qemu/clang/full/all/../../../../../mnt/code/qemu/full/tests/qtest/libqtest.c:1195: multiple definition of `qtest_rtas_call'; libqemu-ppc64-softmmu.fa.p/hw_ppc_spapr_rtas.c.o:/scratch/qemu/clang/full/all/../../../../../mnt/code/qemu/full/hw/ppc/spapr_rtas.c:536: first defined here clang-16: error: linker command failed with exit code 1 (use -v to see invocation) ninja: build stopped: subcommand failed. make: *** [Makefile:162: run-ninja] Error 1 Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-ID: <20231030163834.4638-1-quintela@redhat.com> [dhb: remove 'spapr_rtas.h' include from spapr_rtas.c] Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07hw/pci-host: Update PHB5 XSCOM registersSaif Abrar
Add new XSCOM registers introduced in PHB5. Apply bit-masks within xscom-write methods. Bit-masks specified using PPC_BITMASK macro. Signed-off-by: Saif Abrar <saif.abrar@linux.vnet.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Message-ID: <20231016175948.10869-1-saif.abrar@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07ppc/pnv: Fix number of I2C engines and ports for power9/10Glenn Miles
Power9 is supposed to have 4 PIB-connected I2C engines with the following number of ports on each engine: 0: 2 1: 13 2: 2 3: 2 Power10 also has 4 engines but has the following number of ports on each engine: 0: 14 1: 14 2: 2 3: 16 Current code assumes that they all have the same (maximum) number. This can be a problem if software expects to see a certain number of ports present (Power Hypervisor seems to care). Fixed this by adding separate tables for power9 and power10 that map the I2C controller number to the number of I2C buses that should be attached for that engine. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Message-ID: <20231025152714.956664-1-milesg@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07ppc/pnv: Connect PNV I2C controller to powernv10Glenn Miles
Wires up four I2C controller instances to the powernv10 chip XSCOM address space. Each controller instance is wired up to two I2C buses of its own. No other I2C devices are connected to the buses at this time. Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-ID: <20231017221434.810363-1-milesg@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07ppc/pnv: Connect I2C controller model to powernv9 chipCédric Le Goater
Wires up three I2C controller instances to the powernv9 chip XSCOM address space. Each controller instance is wired up to a single I2C bus of its own. No other I2C devices are connected to the buses at this time. Signed-off-by: Cédric Le Goater <clg@kaod.org> [milesg: Split wiring from addition of model itself] [milesg: Added new commit message] [milesg: Moved hardcoded attributes into PnvChipClass] [milesg: Removed TODO comment for I2C] Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <20231016222013.3739530-3-milesg@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07ppc/pnv: Add an I2C controller modelCédric Le Goater
The more recent IBM power processors have an embedded I2C controller that is accessible by software via the XSCOM address space. Each instance of the I2C controller is capable of controlling multiple I2C buses (one at a time). Prior to beginning a transaction on an I2C bus, the bus must be selected by writing the port number associated with the bus into the PORT_NUM field of the MODE register. Once an I2C bus is selected, the status of the bus can be determined by reading the Status and Extended Status registers. I2C bus transactions can be started by writing a command to the Command register and reading/writing data from/to the FIFO register. Not supported : . 10 bit I2C addresses . Multimaster . Slave Signed-off-by: Cédric Le Goater <clg@kaod.org> [milesg: Split wiring to powernv9 into its own commit] [milesg: Added more detail to commit message] [milesg: Added SPDX Licensed Identifier to new files] [milesg: updated copyright dates] [milesg: Added use of g_autofree] [milesg: Added NULL check after pnv_i2c_get_bus] Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <20231016222013.3739530-2-milesg@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07tests/avocado: Add test for amigaone boardBALATON Zoltan
Add an avocado test for the amigaone board that tests it with the firmware. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <b1a0246840fcff1fe6bbd8685e2474a9231b34c5.1698406922.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07hw/ppc: Add emulation of AmigaOne XE boardBALATON Zoltan
The AmigaOne is a rebranded MAI Teron board that uses U-Boot firmware with patches to support AmigaOS and is very similar to pegasos2 so can be easily emulated sharing most code with pegasos2. The reason to emulate it is that AmigaOS comes in different versions for AmigaOne and PegasosII which only have drivers for one machine and firmware so these only run on the specific machine. Adding this board allows another AmigaOS version to be used reusing already existing peagasos2 emulation. (The AmigaOne was the first of these boards so likely most widespread which then inspired Pegasos that was later replaced with PegasosII due to problems with Articia S, so these have a lot of similarity. Pegasos mainly ran MorphOS while the PegasosII version of AmigaOS was added later and therefore less common than the AmigaOne version.) Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Tested-by: Rene Engel <ReneEngel80@emailn.de> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <804935e7a5921548d630576159ae2c758fe6e275.1699382232.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07target/s390x/cpu topology: Fix ordering and creation of TLEsNina Schoetterl-Glausch
In case of horizontal polarization entitlement has no effect on ordering. Moreover, since the comparison is used to insert CPUs at the correct position in the TLE list, this affects the creation of TLEs and now correctly collapses horizontally polarized CPUs into one TLE. Fixes: f4f54b582f ("target/s390x/cpu topology: handle STSI(15) and build the SYSIB") Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Message-ID: <20231027163637.3060537-1-nsg@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-07tests/tcg/s390x: Test ADD LOGICAL WITH CARRYIlya Leoshkevich
Add a test that tries different combinations of ADD LOGICAL WITH CARRY instructions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20231106093605.1349201-6-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-07tests/tcg/s390x: Test LAALG with negative cc_srcIlya Leoshkevich
Add a small test to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20231106093605.1349201-5-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-07target/s390x: Fix LAALG not updating cc_srcIlya Leoshkevich
LAALG uses op_laa() and wout_addu64(). The latter expects cc_src to be set, but the former does not do it. This can lead to assertion failures if something sets cc_src to neither 0 nor 1 before. Fix by introducing op_laa_addu64(), which sets cc_src, and using it for LAALG. Fixes: 4dba4d6fef61 ("target/s390x: Use atomic operations for LOAD AND OP") Cc: qemu-stable@nongnu.org Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20231106093605.1349201-4-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-07tests/tcg/s390x: Test CLC with inaccessible second operandIlya Leoshkevich
Add a small test to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20231106093605.1349201-3-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-15 10:32:08 +0000