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2023-11-07hw/s390x/sclp: Have sclp_service_call[_protected]() take S390CPU*Philippe Mathieu-Daudé
"hw/s390x/sclp.h" is a header used by target-agnostic objects (such hw/char/sclpconsole[-lm].c), thus can not use target-specific types, such CPUS390XState. Have sclp_service_call[_protected]() take a S390CPU pointer, which is target-agnostic. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231106114500.5269-3-philmd@linaro.org>
2023-11-07hw/s390x/css: Have css_do_sic() take S390CPU instead of CPUS390XStatePhilippe Mathieu-Daudé
"hw/s390x/css.h" is a header used by target-agnostic objects (such hw/s390x/virtio-ccw-gpu.c), thus can not use target-specific types, such CPUS390XState. Have css_do_sic() take S390CPU a pointer, which is target-agnostic. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231106114500.5269-2-philmd@linaro.org>
2023-11-07target/ppc: Move powerpc_input_t definition to 'cpu.h'Philippe Mathieu-Daudé
The powerpc_input_t definition is only used by target/ppc/, no need to expose it. Restrict it by moving it to "target/ppc/cpu.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20231013125630.95116-8-philmd@linaro.org>
2023-11-07target/ppc: Move powerpc_mmu_t definition to 'cpu.h'Philippe Mathieu-Daudé
The powerpc_mmu_t definition is only used by target/ppc/, no need to expose it. Restrict it by moving it to "target/ppc/cpu.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20231013125630.95116-7-philmd@linaro.org>
2023-11-07target/ppc: Move powerpc_excp_t definition to 'cpu.h'Philippe Mathieu-Daudé
The powerpc_excp_t definition is only used by target/ppc/, no need to expose it. Restrict it by moving it to "target/ppc/cpu.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20231013125630.95116-6-philmd@linaro.org>
2023-11-07target/ppc: Move PowerPCCPUClass definition to 'cpu.h'Philippe Mathieu-Daudé
The OBJECT_DECLARE_CPU_TYPE() macro forward-declares the PowerPCCPUClass type. This forward declaration is sufficient for code in hw/ to use the QOM definitions. No need to expose the structure definition. Keep it local to target/ppc/ by moving it to target/ppc/cpu.h. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231013125630.95116-5-philmd@linaro.org>
2023-11-07target/ppc: Move ppc_cpu_class_by_name() declaration to 'cpu.h'Philippe Mathieu-Daudé
ppc_cpu_class_by_name() is only called in target/ppc/, no need to expose outside (in particular to hw/). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20231013125630.95116-4-philmd@linaro.org>
2023-11-07target/ppc: Define powerpc_pm_insn_t in 'internal.h'Philippe Mathieu-Daudé
PM instructions are only used by TCG helpers. No need to expose to other hardware. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20231013125630.95116-3-philmd@linaro.org>
2023-11-07target/ppc: Prohibit target specific KVM prototypes on user emulationPhilippe Mathieu-Daudé
None of these target-specific prototypes should be used by user emulation. Remove their declaration there, so we get a compile failure if ever used (instead of having to deal with linker and its possible optimizations, such dead code removal). Suggested-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20231003070427.69621-5-philmd@linaro.org>
2023-11-07target/ppc: Restrict KVM objects to system emulationPhilippe Mathieu-Daudé
CONFIG_KVM is always FALSE on user emulation, so 'kvm.c' won't be added to ppc_ss[] source set; direcly use the system specific ppc_system_ss[] source set. Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231003070427.69621-4-philmd@linaro.org>
2023-11-07hw/ppc/e500: Restrict ppce500_init_mpic_kvm() to KVMPhilippe Mathieu-Daudé
Inline and guard the single call to kvm_openpic_connect_vcpu() allows to remove kvm-stub.c. Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231003070427.69621-3-philmd@linaro.org>
2023-11-07sysemu/kvm: Restrict kvmppc_get_radix_page_info() to ppc targetsPhilippe Mathieu-Daudé
kvm_get_radix_page_info() is only defined for ppc targets (in target/ppc/kvm.c). The declaration is not useful in other targets, reduce its scope. Rename using the 'kvmppc_' prefix following other declarations from target/ppc/kvm_ppc.h. Suggested-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20231003070427.69621-2-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07target/mips: Fix TX79 LQ/SQ opcodesPhilippe Mathieu-Daudé
The base register address offset is *signed*. Cc: qemu-stable@nongnu.org Fixes: aaaa82a9f9 ("target/mips/tx79: Introduce LQ opcode (Load Quadword)") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230914090447.12557-1-philmd@linaro.org>
2023-11-07target/mips: Fix MSA BZ/BNZ opcodes displacementPhilippe Mathieu-Daudé
The PC offset is *signed*. Cc: qemu-stable@nongnu.org Reported-by: Sergey Evlashev <vectorchiefrocks@gmail.com> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1624 Fixes: c7a9ef7517 ("target/mips: Introduce decode tree bindings for MSA ASE") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230914085807.12241-1-philmd@linaro.org>
2023-11-07target/i386/monitor: synchronize cpu state for lapic infoDongli Zhang
While the default "info lapic" always synchronizes cpu state ... mon_get_cpu() -> mon_get_cpu_sync(mon, true) -> cpu_synchronize_state(cpu) -> ioctl KVM_GET_LAPIC (taking KVM as example) ... the cpu state is not synchronized when the apic-id is available as argument. The cpu state should be synchronized when apic-id is available. Otherwise the "info lapic <apic-id>" always returns stale data. Reference: https://lore.kernel.org/all/20211028155457.967291-19-berrange@redhat.com/ Cc: Joe Jin <joe.jin@oracle.com> Signed-off-by: Dongli Zhang <dongli.zhang@oracle.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: David Woodhouse <dwmw@amazon.co.uk> Message-ID: <20231030085336.2681386-1-armbru@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-ID: <20231026211938.162815-1-dongli.zhang@oracle.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07target/i386/kvm: Correct comment in kvm_cpu_realize()Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230918160257.30127-4-philmd@linaro.org>
2023-11-07target/i386/hvf: Rename 'X86CPU *x86_cpu' variable as 'cpu'Philippe Mathieu-Daudé
Follow the naming used by other files in target/i386/. No functional changes. Suggested-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20231020111136.44401-4-philmd@linaro.org>
2023-11-07target/i386/hvf: Rename 'CPUState *cpu' variable as 'cs'Philippe Mathieu-Daudé
Follow the naming used by other files in target/i386/. No functional changes. Suggested-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20231020111136.44401-3-philmd@linaro.org>
2023-11-07target/i386/hvf: Use CPUState typedefPhilippe Mathieu-Daudé
Follow C style guidelines and use CPUState forward declaration from "qemu/typedefs.h". No functional changes. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20231020111136.44401-2-philmd@linaro.org>
2023-11-07target/i386/hvf: Use env_archcpu() in simulate_[rdmsr/wrmsr]()Philippe Mathieu-Daudé
When CPUArchState* is available (here CPUX86State*), we can use the fast env_archcpu() macro to get ArchCPU* (here X86CPU*). The QOM cast X86_CPU() macro will be slower when building with --enable-qom-cast-debug. Pass CPUX86State* as argument to simulate_rdmsr / simulate_wrmsr instead of a CPUState* to avoid an extra cast. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Roman Bolshakov <roman@roolebo.dev> Tested-by: Roman Bolshakov <roman@roolebo.dev> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20231009110239.66778-7-philmd@linaro.org>
2023-11-07target/i386/hvf: Use x86_cpu in simulate_[rdmsr|wrmsr]()Philippe Mathieu-Daudé
We already have 'x86_cpu = X86_CPU(cpu)'. Use the variable instead of doing another QOM cast with X86_CPU(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Roman Bolshakov <roman@roolebo.dev> Tested-by: Roman Bolshakov <roman@roolebo.dev> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20231009110239.66778-6-philmd@linaro.org>
2023-11-07target/xtensa: Use env_archcpu() in update_c[compare|count]()Philippe Mathieu-Daudé
When CPUArchState* is available (here CPUXtensaState*), we can use the fast env_archcpu() macro to get ArchCPU* (here XtensaCPU*). The QOM cast XTENSA_CPU() macro will be slower when building with --enable-qom-cast-debug. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20231009110239.66778-5-philmd@linaro.org>
2023-11-07target/s390x: Use env_archcpu() in handle_diag_308()Philippe Mathieu-Daudé
When CPUArchState* is available (here CPUS390XState*), we can use the fast env_archcpu() macro to get ArchCPU* (here S390CPU*). The QOM cast S390_CPU() macro will be slower when building with --enable-qom-cast-debug. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20231009110239.66778-4-philmd@linaro.org>
2023-11-07target/riscv: Use env_archcpu() in [check_]nanbox()Philippe Mathieu-Daudé
When CPUArchState* is available (here CPURISCVState*), we can use the fast env_archcpu() macro to get ArchCPU* (here RISCVCPU*). The QOM cast RISCV_CPU() macro will be slower when building with --enable-qom-cast-debug. Inspired-by: Richard W.M. Jones <rjones@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Richard W.M. Jones <rjones@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20231009110239.66778-3-philmd@linaro.org>
2023-11-07target/ppc: Use env_archcpu() in helper_book3s_msgsndp()Philippe Mathieu-Daudé
When CPUArchState* is available (here CPUPPCState*), we can use the fast env_archcpu() macro to get ArchCPU* (here PowerPCCPU*). The QOM cast POWERPC_CPU() macro will be slower when building with --enable-qom-cast-debug. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20231009110239.66778-2-philmd@linaro.org>
2023-11-07target/riscv: Move TYPE_RISCV_CPU_BASE definition to 'cpu.h'Philippe Mathieu-Daudé
TYPE_RISCV_CPU_BASE depends on the TARGET_RISCV32/TARGET_RISCV64 definitions which are target specific. Such target specific definition taints "cpu-qom.h". Since "cpu-qom.h" must be target agnostic, remove its target specific definition uses by moving TYPE_RISCV_CPU_BASE to "target/riscv/cpu.h". "target/riscv/cpu-qom.h" is now fully target agnostic. Add a comment clarifying that in the header. Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231013140116.255-12-philmd@linaro.org>
2023-11-07target/openrisc: Declare QOM definitions in 'cpu-qom.h'Philippe Mathieu-Daudé
"target/foo/cpu.h" contains the target specific declarations. A heterogeneous setup need to access target agnostic declarations (at least the QOM ones, to instantiate the objects). Our convention is to add such target agnostic QOM declarations in the "target/foo/cpu-qom.h" header. Add a comment clarifying that in the header. Extract QOM definitions from "cpu.h" to "cpu-qom.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231013140116.255-11-philmd@linaro.org>
2023-11-07target/nios2: Declare QOM definitions in 'cpu-qom.h'Philippe Mathieu-Daudé
"target/foo/cpu.h" contains the target specific declarations. A heterogeneous setup need to access target agnostic declarations (at least the QOM ones, to instantiate the objects). Our convention is to add such target agnostic QOM declarations in the "target/foo/cpu-qom.h" header. Add a comment clarifying that in the header. Extract QOM definitions from "cpu.h" to "cpu-qom.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231013140116.255-10-philmd@linaro.org>
2023-11-07target/loongarch: Declare QOM definitions in 'cpu-qom.h'Philippe Mathieu-Daudé
"target/foo/cpu.h" contains the target specific declarations. A heterogeneous setup need to access target agnostic declarations (at least the QOM ones, to instantiate the objects). Our convention is to add such target agnostic QOM declarations in the "target/foo/cpu-qom.h" header. Add a comment clarifying that in the header. Extract QOM definitions from "cpu.h" to "cpu-qom.h". Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231013140116.255-9-philmd@linaro.org>
2023-11-07target/hexagon: Declare QOM definitions in 'cpu-qom.h'Philippe Mathieu-Daudé
"target/foo/cpu.h" contains the target specific declarations. A heterogeneous setup need to access target agnostic declarations (at least the QOM ones, to instantiate the objects). Our convention is to add such target agnostic QOM declarations in the "target/foo/cpu-qom.h" header. Add a comment clarifying that in the header. Extract QOM definitions from "cpu.h" to "cpu-qom.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Brian Cain <bcain@quicinc.com> Message-Id: <20231013140116.255-8-philmd@linaro.org>
2023-11-07target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'Philippe Mathieu-Daudé
Hegerogeneous code needs access to the FOO_CPU_TYPE_NAME() macro to resolve target CPU types. Move the declaration (along with the required FOO_CPU_TYPE_SUFFIX) to "cpu-qom.h". "target/foo/cpu-qom.h" is supposed to be target agnostic (include-able by any target). Add such mention in the header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231013140116.255-7-philmd@linaro.org>
2023-11-07target/riscv: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h'Philippe Mathieu-Daudé
CPU_RESOLVING_TYPE is a per-target definition, and is irrelevant for other targets. Move it to "cpu.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231013140116.255-6-philmd@linaro.org>
2023-11-07target/ppc: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h'Philippe Mathieu-Daudé
CPU_RESOLVING_TYPE is a per-target definition, and is irrelevant for other targets. Move it to "cpu.h". "target/ppc/cpu-qom.h" is supposed to be target agnostic (include-able by any target). Add such mention in the header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231013140116.255-5-philmd@linaro.org>
2023-11-07target/arm: Move internal declarations from 'cpu-qom.h' to 'cpu.h'Philippe Mathieu-Daudé
These definitions and declarations are only used by target/arm/, no need to expose them to generic hw/. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231013140116.255-4-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <c48c9829-3dfa-79cf-3042-454fda0d00dc@linaro.org>
2023-11-07target: Mention 'cpu-qom.h' is target agnosticPhilippe Mathieu-Daudé
"target/foo/cpu-qom.h" is supposed to be target agnostic (include-able by any target). Add such mention in the header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231013140116.255-3-philmd@linaro.org>
2023-11-07target: Unify QOM stylePhilippe Mathieu-Daudé
Enforce the style described by commit 067109a11c ("docs/devel: mention the spacing requirement for QOM"): The first declaration of a storage or class structure should always be the parent and leave a visual space between that declaration and the new code. It is also useful to separate backing for properties (options driven by the user) and internal state to make navigation easier. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20231013140116.255-2-philmd@linaro.org>
2023-11-07accel/tcg: Factor tcg_cpu_reset_hold() outPhilippe Mathieu-Daudé
Factor the TCG specific code from cpu_common_reset_hold() to tcg_cpu_reset_hold() within tcg-accel-ops.c. Since this file is sysemu specific, we can inline tcg_flush_softmmu_tlb(), removing its declaration in "exec/cpu-common.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230918104153.24433-4-philmd@linaro.org>
2023-11-07accel: Introduce cpu_exec_reset_hold()Philippe Mathieu-Daudé
Introduce cpu_exec_reset_hold() which call an accelerator specific AccelOpsClass::cpu_reset_hold() handler. Define a stub on TCG user emulation, because CPU reset is irrelevant there. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230918104153.24433-3-philmd@linaro.org>
2023-11-07accel/tcg: Declare tcg_flush_jmp_cache() in 'exec/tb-flush.h'Philippe Mathieu-Daudé
"exec/cpu-common.h" is meant to contain the declarations related to CPU usable with any accelerator / target combination. tcg_flush_jmp_cache() is specific to TCG, so restrict its declaration by moving it to "exec/tb-flush.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230918104153.24433-2-philmd@linaro.org>
2023-11-07tests/unit/test-seccomp: Remove mentions of softmmu in test namesPhilippe Mathieu-Daudé
Wether we are using a software MMU or not is irrelevant for the seccomp facility. The facility is restricted to system emulation, but such detail isn't really helpful, so directly drop the 'softmmu' mention from the test names. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231002145104.52193-3-philmd@linaro.org>
2023-11-07tests/vm/ubuntu.aarch64: Correct comment about TCG specific delayPhilippe Mathieu-Daudé
Wether we use a software MMU or not to set the SSH timeout isn't really relevant. What we want to know is if we use a hardware or software accelerator (TCG). Replace the 'softmmu' mention by 'TCG'. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231002145104.52193-2-philmd@linaro.org>
2023-11-07vl: constify default_listMarc-André Lureau
It's not modified, let's make it const. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231030101529.105266-1-marcandre.lureau@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07vl: Free machine listAkihiko Odaki
Free machine list and make LeakSanitizer happy. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20230722062641.18505-1-akihiko.odaki@daynix.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07Merge tag 'pixman-pull-request' of https://gitlab.com/marcandre.lureau/qemu ↵Stefan Hajnoczi
into staging Make Pixman an optional dependency # -----BEGIN PGP SIGNATURE----- # # iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmVKDhkcHG1hcmNhbmRy # ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5f8CD/0YX5sXR3IwUfTp8B51 # iIwgOlVunzcT9oDYegIekaHdvggv3B39+gjC/khcehQ30qV6MDowj3ZagIeLavU2 # ZpHJMUkg1YRDHMiJ8aJmDhOyZHINCETWV2YoJX1ACllKOOMSXHC3mWKZd/eIqAPJ # EBMlSWBP1rRtwfaX+p1Y65XappJewzzb9SqFn8s5deowEAM3aK7xafHQOBWSVx9z # 5adhIWn3HMVnbYolVXlcHsPurfI86sqCl7QAqkFdwAvGIKghhqMT6pFfvu3BalHN # nz8GqpSvjlj/WNFABi00piXKx4kkqBJSsYMP8owZQZIeepT5RXuKAB15BA1Cc5N7 # wTkuLe7zXLUST32yAHLa2UZY8Gv/a6C+dH1EFRd7vMMczBPrzwuqzWChRTZPQaX6 # e4uhXnhuu8Io11TnkmwWeWtrLOf+6EmVOjxNwhUUXOqPXPxd7LGMh/ZIc1SuXh0a # k7khpXez4MoBWGftjCEUNlLZ13rcrqnkUWAZeOwjjaqxnYK+Lz32OGS3BtjRYvov # WgogC2c2vVHrSHxRxuytCHiM+7NY0Tf2B6PxZJKOQUtfFxvHjWkHghnJWwHH2OP/ # lMnJUU+XAaAxsiEiDN4BSd0DSA6jn6/vg8SgXXEDyIDExq5jELVMgw2q1cbQJK1s # mOgr8FZZfnxvwYIFvH7PFiDm3A== # =bLPz # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Nov 2023 18:14:49 HKT # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * tag 'pixman-pull-request' of https://gitlab.com/marcandre.lureau/qemu: (25 commits) build-sys: make pixman actually optional hw/display/ati: allow compiling without PIXMAN hw/mips: FULOONG depends on VT82C686 hw/sm501: allow compiling without PIXMAN hw/arm: XLNX_VERSAL depends on XLNX_CSU_DMA arm/kconfig: XLNX_ZYNQMP_ARM depends on PIXMAN ui/dbus: do not require PIXMAN ui/gtk: -display gtk requires PIXMAN ui/spice: SPICE/QXL requires PIXMAN ui/vnc: VNC requires PIXMAN ui/gl: opengl doesn't require PIXMAN vhost-user-gpu: skip VHOST_USER_GPU_UPDATE when !PIXMAN ui/console: when PIXMAN is unavailable, don't draw placeholder msg virtio-gpu: replace PIXMAN for region/rect test qmp/hmp: disable screendump if PIXMAN is missing ui/vc: console-vc requires PIXMAN ui/console: allow to override the default VC vl: move display early init before default devices vl: simplify display_remote logic qemu-options: define -vnc only #ifdef CONFIG_VNC ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-07Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu ↵Stefan Hajnoczi
into staging virtio,pc,pci: features, fixes virtio sound card support vhost-user: back-end state migration cxl: line length reduction enabling fabric management vhost-vdpa: shadow virtqueue hash calculation Support shadow virtqueue RSS Support tests: CPU topology related smbios test cases Fixes, cleanups all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmVKDDoPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpF08H/0Zts8uvkHbgiOEJw4JMHU6/VaCipfIYsp01 # GSfwYOyEsXJ7GIxKWaCiMnWXEm7tebNCPKf3DoUtcAojQj3vuF9XbWBKw/bfRn83 # nGO/iiwbYViSKxkwqUI+Up5YiN9o0M8gBFrY0kScPezbnYmo5u2bcADdEEq6gH68 # D0Ea8i+WmszL891ypvgCDBL2ObDk3qX3vA5Q6J2I+HKX2ofJM59BwaKwS5ghw+IG # BmbKXUZJNjUQfN9dQ7vJuiuqdknJ2xUzwW2Vn612ffarbOZB1DZ6ruWlrHty5TjX # 0w4IXEJPBgZYbX9oc6zvTQnbLDBJbDU89mnme0TcmNMKWmQKTtc= # =vEv+ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Nov 2023 18:06:50 HKT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (63 commits) acpi/tests/avocado/bits: enable console logging from bits VM acpi/tests/avocado/bits: enforce 32-bit SMBIOS entry point hw/cxl: Add tunneled command support to mailbox for switch cci. hw/cxl: Add dummy security state get hw/cxl/type3: Cleanup multiple CXL_TYPE3() calls in read/write functions hw/cxl/mbox: Add Get Background Operation Status Command hw/cxl: Add support for device sanitation hw/cxl/mbox: Wire up interrupts for background completion hw/cxl/mbox: Add support for background operations hw/cxl: Implement Physical Ports status retrieval hw/pci-bridge/cxl_downstream: Set default link width and link speed hw/cxl/mbox: Add Physical Switch Identify command. hw/cxl/mbox: Add Information and Status / Identify command hw/cxl: Add a switch mailbox CCI function hw/pci-bridge/cxl_upstream: Move defintion of device to header. hw/cxl/mbox: Generalize the CCI command processing hw/cxl/mbox: Pull the CCI definition out of the CXLDeviceState hw/cxl/mbox: Split mailbox command payload into separate input and output hw/cxl/mbox: Pull the payload out of struct cxl_cmd and make instances constant hw/cxl: Fix a QEMU_BUILD_BUG_ON() in switch statement scope issue. ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-07Merge tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu into ↵Stefan Hajnoczi
staging UI patch queue # -----BEGIN PGP SIGNATURE----- # # iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmVKA7McHG1hcmNhbmRy # ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5Z47D/4/SrS87f62a8Xczc4U # fj8idH8a9rC/Rbd/AXDDIIgEb3Om4xWI4M5FZrx2K+D38hgc4atRuQhTHPi/SdEK # zlNkKcePNRs7/hh8ZWUnLtu+EqJS3HqmcJfahkzV6U0vn6BxPrdX/5Qdryix4gr3 # C2RRxJx8RdZ5R7V9pm4JTgqGnXkKwDN4W06/btrhz7YNgyXls0PVrHm4lE01HDnX # D0ZxWo3gXAiK1dQlaT5qHsegpPPJ2LB3O6gU3yLDBpsD3elkjgbB5seycgeJmO1R # kMBA+HUf2PS0gdUATs/KqjVyoSbWoIeyOTTb8ol8cQSWruqfSLUnJLP4lFBCKbMt # NH4KqqPvZZuJh4K1ir1/eANC6Du7hotavmV+57Vv73N91IQ0PUEzoUbLL1PN25RZ # +q5chBClAvc9IRbnDSM6EXpxznzAkPYQo8JyRPkHE9w9dFfOIRsAK3WGcVkwMmaQ # 4v4OAM/CQlfqcwpVsmT/prkoaCceJHE6IO7hOkV1QOe+I5yzZF9PJpVsONhhCXUD # XVaoOMeZYmT8lIEPm099MwjmGKKxTroEo+n18xQOV+ZXGdIsmkvrYffqAO5y/hB3 # m8ucVWeoXq50IYPoxxdw86NyadHvSBb6fMNjU2fEtYId+Tm7T0ud77uIY8rU6euc # x7w6wDUm4C2K7fHrtYzBLhUj7A== # =upvZ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Nov 2023 17:30:27 HKT # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu: ui: Replacing pointer in function ui/cocoa: add zoom-to-fit display option ui/gtk-egl: apply scale factor when calculating window's dimension ui/gtk-egl: Check EGLSurface before doing scanout ui/gtk: force realization of drawing area Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-07Merge tag 'pull-xenfv.for-upstream-20231107' of ↵Stefan Hajnoczi
git://git.infradead.org/users/dwmw2/qemu into staging Xen PV guest support for 8.2 Add Xen PV console and network support, the former of which enables the Xen "PV shim" to be used to support PV guests. Also clean up the block support and make it work when the user passes just 'drive file=IMAGE,if=xen' on the command line. Update the documentation to reflect all of these, taking the opportunity to simplify what it says about q35 by making unplug work for AHCI. Ignore the VCPU_SSHOTTMR_future timer flag, and advertise the 'fixed' per-vCPU upcall vector support, as newer upstream Xen do. # -----BEGIN PGP SIGNATURE----- # # iQJIBAABCAAyFiEEvgfZ/VSAmrLEsP9fY3Ys2mfi81kFAmVJ/7EUHGR3bXcyQGlu # ZnJhZGVhZC5vcmcACgkQY3Ys2mfi81k+/xAAswivVR4+nwz3wTSN7EboGogS3hy+ # ZsTpvbJnfprGQJAK8vv8OP4eunaCJkO/dy3M/33Dh270msmV6I/1ki0E1RIPG45D # n5wKM1Zxk0ABvjIgdp3xiLwITTdruJ+k9aqV8U9quhjgNFdOa7yjBOG8MD32GEPZ # KHbavJ++huOu7+DZHJRNRq4gI/fREIULoPGHVg7WuEiRDYokOOmMROXqmTHTaUkV # yFhkofzWxlpYhh7qRQx6/A80CSf7xwCof8krjdMCOYj3XGzYVZND0z5ZfHQYEwqt # fowhargA8gH4V3d21S/MWCaZ+QrswFXZhcnl5wuGgWakV4ChvFETKs+fz2mODWUx # 2T13trqeFJ5ElTrSpH1iWCoSEy6KCeLecvx7c/6HPSkDYQ3w5q8dXPpqgEtXY24S # Wcmw4PkQ+HrLX7wbSU7QLyTZjvCQLFZ3Sb0uTf2zwsJZyeCCiT2lqAaogoMm6Kg0 # m/jG1JzE+9AC3j0Upp1lS3EK1qdxIuLdBuIcaEBEjy7Am+Y14PlZYoU2c751KbRF # kqnIOYMoijX0PJDomPqCQtYNE0mrtogo0AbcFFIu+4k25vGbkl7xS5p2du9qw2Rd # ++IdqQYzdzrUcIwmxocFQqFBJQ2dcbOGB1d7+VJ+A1Uj3yY2/DnFG5WqSaqS0KJi # ZhBdFs3OTlPnRoM= # =Dg79 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Nov 2023 17:13:21 HKT # gpg: using RSA key BE07D9FD54809AB2C4B0FF5F63762CDA67E2F359 # gpg: issuer "dwmw2@infradead.org" # gpg: Good signature from "David Woodhouse <dwmw2@infradead.org>" [unknown] # gpg: aka "David Woodhouse <dwmw2@exim.org>" [unknown] # gpg: aka "David Woodhouse <david@woodhou.se>" [unknown] # gpg: aka "David Woodhouse <dwmw2@kernel.org>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: BE07 D9FD 5480 9AB2 C4B0 FF5F 6376 2CDA 67E2 F359 * tag 'pull-xenfv.for-upstream-20231107' of git://git.infradead.org/users/dwmw2/qemu: docs: update Xen-on-KVM documentation xen-platform: unplug AHCI disks hw/i386/pc: support '-nic' for xen-net-device hw/xen: update Xen PV NIC to XenDevice model hw/xen: only remove peers of PCI NICs on unplug hw/xen: add support for Xen primary console in emulated mode hw/xen: update Xen console to XenDevice model hw/xen: do not repeatedly try to create a failing backend device hw/xen: add get_frontend_path() method to XenDeviceClass hw/xen: automatically assign device index to block devices hw/xen: populate store frontend nodes with XenStore PFN/port i386/xen: advertise XEN_HVM_CPUID_UPCALL_VECTOR in CPUID include: update Xen public headers to Xen 4.17.2 release hw/xen: Clean up event channel 'type_val' handling to use union i386/xen: Ignore VCPU_SSHOTTMR_future flag in set_singleshot_timer() Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-07MAINTAINERS: Add the virtio-gpu documentation to the corresponding sectionThomas Huth
Add virtio-gpu.rst to the corresponding section in MAINTAINERS, so that the maintainers gets CC:-ed on corresponding patches. Message-ID: <20231027060808.242442-1-thuth@redhat.com> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-07build-sys: make pixman actually optionalMarc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
2023-11-07hw/display/ati: allow compiling without PIXMANMarc-André Lureau
Change the "x-pixman" property default value and use the fallback path when PIXMAN support is disabled. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: BALATON Zoltan <balaton@eik.bme.hu>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-15 20:23:34 +0000