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2023-11-21ppc/pnv: Fix PNV I2C invalid status after resetGlenn Miles
The PNV I2C Controller was clearing the status register after a reset without repopulating the "upper threshold for I2C ports", "Command Complete" and the SCL/SDA input level fields. Fixed this for resets caused by a system reset as well as from writing to the "Immediate Reset" register. Fixes: 263b81ee15af ("ppc/pnv: Add an I2C controller model") Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-11-21ppc/pnv: PNV I2C engines assigned incorrect XSCOM addressesGlenn Miles
The PNV I2C engines for power9 and power10 were being assigned a base XSCOM address that was off by one I2C engine's address range such that engine 0 had engine 1's address and so on. The xscom address assignment was being based on the device tree engine numbering, which starts at 1. Rather than changing the device tree numbering to start with 0, the addressing was changed to be based on the existing device tree numbers minus one. Fixes: 1ceda19c28a1 ("ppc/pnv: Connect PNV I2C controller to powernv10) Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-11-21target/ppc: Fix bugs in VSX_CVT_FP_TO_INT and VSX_CVT_FP_TO_INT2 macrosJohn Platts
The patch below fixes a bug in the VSX_CVT_FP_TO_INT and VSX_CVT_FP_TO_INT2 macros in target/ppc/fpu_helper.c where a non-NaN floating point value from the source vector is incorrectly converted to 0, 0x80000000, or 0x8000000000000000 instead of the expected value if a preceding source floating point value from the same source vector was a NaN. The bug in the VSX_CVT_FP_TO_INT and VSX_CVT_FP_TO_INT2 macros in target/ppc/fpu_helper.c was introduced with commit c3f24257e3c0. This patch also adds a new vsx_f2i_nan test in tests/tcg/ppc64 that checks that the VSX xvcvspsxws, xvcvspuxws, xvcvspsxds, xvcvspuxds, xvcvdpsxws, xvcvdpuxws, xvcvdpsxds, and xvcvdpuxds instructions correctly convert non-NaN floating point values to integer values if the source vector contains NaN floating point values. Fixes: c3f24257e3c0 ("target/ppc: Clear fpstatus flags on helpers missing it") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1941 Signed-off-by: John Platts <john_platts@hotmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-11-21ppc/pnv: Fix potential overflow in I2C modelCédric Le Goater
Coverity warns that "i2c_bus_busy(i2c->busses[i]) << i" might overflow because the expression is evaluated using 32-bit arithmetic and then used in a context expecting a uint64_t. While we are at it, introduce a PNV_I2C_MAX_BUSSES constant and check the number of busses at realize time. Fixes: Coverity CID 1523918 Cc: Glenn Miles <milesg@linux.vnet.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Glenn Miles <milesg@linux.vnet.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-11-21tcg/loongarch64: Fix tcg_out_mov() AbortedSong Gao
On LoongArch host, we got an Aborted from tcg_out_mov(). qemu-x86_64 configure with '--enable-debug'. > (gdb) b /home1/gaosong/code/qemu/tcg/loongarch64/tcg-target.c.inc:312 > Breakpoint 1 at 0x2576f0: file /home1/gaosong/code/qemu/tcg/loongarch64/tcg-target.c.inc, line 312. > (gdb) run hello [...] > Thread 1 "qemu-x86_64" hit Breakpoint 1, tcg_out_mov (s=0xaaaae91760 <tcg_init_ctx>, type=TCG_TYPE_V128, ret=TCG_REG_V2, > arg=TCG_REG_V0) at /home1/gaosong/code/qemu/tcg/loongarch64/tcg-target.c.inc:312 > 312 g_assert_not_reached(); > (gdb) bt > #0 tcg_out_mov (s=0xaaaae91760 <tcg_init_ctx>, type=TCG_TYPE_V128, ret=TCG_REG_V2, arg=TCG_REG_V0) > at /home1/gaosong/code/qemu/tcg/loongarch64/tcg-target.c.inc:312 > #1 0x000000aaaad0fee0 in tcg_reg_alloc_mov (s=0xaaaae91760 <tcg_init_ctx>, op=0xaaaaf67c20) at ../tcg/tcg.c:4632 > #2 0x000000aaaad142f4 in tcg_gen_code (s=0xaaaae91760 <tcg_init_ctx>, tb=0xffe8030340 <code_gen_buffer+197328>, > pc_start=4346094) at ../tcg/tcg.c:6135 [...] > (gdb) c > Continuing. > ** > ERROR:/home1/gaosong/code/qemu/tcg/loongarch64/tcg-target.c.inc:312:tcg_out_mov: code should not be reached > Bail out! ERROR:/home1/gaosong/code/qemu/tcg/loongarch64/tcg-target.c.inc:312:tcg_out_mov: code should not be reached > > Thread 1 "qemu-x86_64" received signal SIGABRT, Aborted. > 0x000000fff7b1c390 in raise () from /lib64/libc.so.6 > (gdb) q Fixes: 16288ded94 ("tcg/loongarch64: Lower basic tcg vec ops to LSX") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20231120065916.374045-1-gaosong@loongson.cn>
2023-11-20hw/arm/fsl-imx: Do not ignore Error argumentPhilippe Mathieu-Daudé
Both i.MX25 and i.MX6 SoC models ignore the Error argument when setting the PHY number. Pick &error_abort which is the error used by the i.MX7 SoC (see commit 1f7197deb0 "ability to change the FEC PHY on i.MX7 processor"). Fixes: 74c1330582 ("ability to change the FEC PHY on i.MX25 processor") Fixes: a9c167a3c4 ("ability to change the FEC PHY on i.MX6 processor") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231120115116.76858-1-philmd@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-20hw/arm/stm32f100: Report error when incorrect CPU is usedPhilippe Mathieu-Daudé
The 'stm32vldiscovery' machine ignores the CPU type requested by the command line. This might confuse users, since the following will create a machine with a Cortex-M3 CPU: $ qemu-system-aarch64 -M stm32vldiscovery -cpu neoverse-n1 Set the MachineClass::valid_cpu_types field (introduced in commit c9cf636d48 "machine: Add a valid_cpu_types property"). Remove the now unused MachineClass::default_cpu_type field. We now get: $ qemu-system-aarch64 -M stm32vldiscovery -cpu neoverse-n1 qemu-system-aarch64: Invalid CPU type: neoverse-n1-arm-cpu The valid types are: cortex-m3-arm-cpu Since the SoC family can only use Cortex-M3 CPUs, hard-code the CPU type name at the SoC level, removing the QOM property entirely. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231117071704.35040-5-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-20hw/arm/stm32f205: Report error when incorrect CPU is usedPhilippe Mathieu-Daudé
The 'netduino2' machine ignores the CPU type requested by the command line. This might confuse users, since the following will create a machine with a Cortex-M3 CPU: $ qemu-system-arm -M netduino2 -cpu cortex-a9 Set the MachineClass::valid_cpu_types field (introduced in commit c9cf636d48 "machine: Add a valid_cpu_types property"). Remove the now unused MachineClass::default_cpu_type field. We now get: $ qemu-system-arm -M netduino2 -cpu cortex-a9 qemu-system-arm: Invalid CPU type: cortex-a9-arm-cpu The valid types are: cortex-m3-arm-cpu Since the SoC family can only use Cortex-M3 CPUs, hard-code the CPU type name at the SoC level, removing the QOM property entirely. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231117071704.35040-4-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-20hw/arm/stm32f405: Report error when incorrect CPU is usedPhilippe Mathieu-Daudé
Both 'netduinoplus2' and 'olimex-stm32-h405' machines ignore the CPU type requested by the command line. This might confuse users, since the following will create a machine with a Cortex-M4 CPU: $ qemu-system-aarch64 -M netduinoplus2 -cpu cortex-r5f Set the MachineClass::valid_cpu_types field (introduced in commit c9cf636d48 "machine: Add a valid_cpu_types property"). Remove the now unused MachineClass::default_cpu_type field. We now get: $ qemu-system-aarch64 -M netduinoplus2 -cpu cortex-r5f qemu-system-aarch64: Invalid CPU type: cortex-r5f-arm-cpu The valid types are: cortex-m4-arm-cpu Since the SoC family can only use Cortex-M4 CPUs, hard-code the CPU type name at the SoC level, removing the QOM property entirely. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20231117071704.35040-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-20hw/core/machine: Constify MachineClass::valid_cpu_types[]Gavin Shan
Constify MachineClass::valid_cpu_types[i], as suggested by Richard Henderson. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231117071704.35040-2-philmd@linaro.org [PMD: Constify HPPA machines, restrict valid_cpu_types to machine_class_init() handlers] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-20target/arm: Fix SME FMOPA (16-bit), BFMOPARichard Henderson
Perform the loop increment unconditionally, not nested within the predication. Cc: qemu-stable@nongnu.org Fixes: 3916841ac75 ("target/arm: Implement FMOPA, FMOPS (widening)") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1985 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231117193135.1180657-1-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-20hw/intc/arm_gicv3: ICC_PMR_EL1 high bits should be RAZBen Dooks
The ICC_PMR_ELx and ICV_PMR_ELx bit masks returned from ic{c,v}_fullprio_mask should technically also remove any bit above 7 as these are marked reserved (read 0) and should therefore should not be written as anything other than 0. This was noted during a run of a proprietary test system and discused on the mailing list [1] and initially thought not to be an issue due to RES0 being technically allowed to be written to and read back as long as the implementation does not use the RES0 bits. It is very possible that the values are used in comparison without masking, as pointed out by Peter in [2], if (cs->hppi.prio >= cs->icc_pmr_el1) may well do the wrong thing. Masking these values in ic{c,v}_fullprio_mask() should fix this and prevent any future problems with playing with the values. [1]: https://lists.nongnu.org/archive/html/qemu-arm/2023-11/msg00607.html [2]: https://lists.nongnu.org/archive/html/qemu-arm/2023-11/msg00737.html Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Message-id: 20231116172818.792364-1-ben.dooks@codethink.co.uk Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-20target/arm: enable FEAT_RNG on Neoverse-N2Marcin Juszkiewicz
I noticed that Neoverse-V1 has FEAT_RNG enabled so let enable it also on Neoverse-N2. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231114103443.1652308-1-marcin.juszkiewicz@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-20Merge tag '20231119-xtensa-1' of https://github.com/OSLL/qemu-xtensa into ↵Stefan Hajnoczi
staging target/xtensa fixes for v8.2: - fix signal delivery in FDPIC # -----BEGIN PGP SIGNATURE----- # # iQJHBAABCgAxFiEEK2eFS5jlMn3N6xfYUfnMkfg/oEQFAmVaXU4THGpjbXZia2Jj # QGdtYWlsLmNvbQAKCRBR+cyR+D+gRF13EACXNP0MPn2iWqxLPvxW9mDXaQu9cSlJ # BcAlHKbi21CDdqLYpyMoenRONtHMDKjEhR4Atv+DRhc2qQYKNogLgCM1PtGkb6+z # rNS6HBaUFsAKovS03JGcBDDYWS97bfN1AQRrrEzCV+SKq5Gq8Tr23LSgFHred0hS # OlGmb7/S+uMh1Uo+rqLKFvSkcWLyaPxOhw1BoaNWdifSotfRwK++PZUvv7slQk+/ # J2ePbjU/ZTBTmumn0tg8BP66UHmGQ+TcvGOdD0m6qlQoq5XaqAYgNb6/Cm16xIPJ # GQtmB1m74Dl1cQGYXlg3YFGluOJGidkT6In6dYzOEzjvOg9Rku+9bdCxIyRgQK7g # gXcQJaEdpBiex3c21XWhMfjpM1pQruRgIQ3xqYETBMKXXqvbgYdUT09JpuaoTUkP # oTymnBVL+9hyrlhPWXzn8M6IPUlyT7Hmnb0uVmHfTi8UNBhiGBRSN4x3CMDNi9oL # ziE3xKgEkii9WEY+qSCodLMvLJBzShpKTjmUhfJMYdK07uVzazhGhmtQ8qSi3Rm7 # 6hDfnnBwrnX/CBE1IMca280Aax3TMf8Sn1pJqsTHwlNFb3O5vcixRajJw7xNprkP # 5CcS+G2fRK7JIb18FI2aBf7DXD4kfasF8UAaiyQfkmD1/LITSGiDKfKFvaqjA7Ln # wVrNbrGvDRvdEw== # =sZPo # -----END PGP SIGNATURE----- # gpg: Signature made Sun 19 Nov 2023 14:09:02 EST # gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044 # gpg: issuer "jcmvbkbc@gmail.com" # gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown] # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [unknown] # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * tag '20231119-xtensa-1' of https://github.com/OSLL/qemu-xtensa: linux-user: xtensa: fix signal delivery in FDPIC Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-20Merge tag 'hppa64-fixes-pull-request' of ↵Stefan Hajnoczi
https://github.com/hdeller/qemu-hppa into staging HPPA64-PATCHES-for-8.2 Two patches for 8.2. The SHRPD patch fixes a real translation bug which then allows to boot the 64-bit Linux kernels of the Debian-11 and Debian-12 installation CDs. The second patch adds the instruction byte sequence to the assembly log. This is not an actual bug fix, but it's important since it helps a lot when trying to fix qemu translation bugs on hppa. # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZVfHPwAKCRD3ErUQojoP # X3TrAQD2SfFsTWIYqTamh1ZHmydaJRL1xhXmPMqXgXFkDmiyhQD/VeyIyWEGj5Oe # x70WR8HrtkadsUddgSGzFRChaVb0/wI= # =Sapq # -----END PGP SIGNATURE----- # gpg: Signature made Fri 17 Nov 2023 15:04:15 EST # gpg: using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F # gpg: Good signature from "Helge Deller <deller@gmx.de>" [unknown] # gpg: aka "Helge Deller <deller@kernel.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 4544 8228 2CD9 10DB EF3D 25F8 3E5F 3D04 A7A2 4603 # Subkey fingerprint: BCE9 123E 1AD2 9F07 C049 BBDE F712 B510 A23A 0F5F * tag 'hppa64-fixes-pull-request' of https://github.com/hdeller/qemu-hppa: disas/hppa: Show hexcode of instruction along with disassembly target/hppa: Fix 64-bit SHRPD instruction Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-20Merge tag 'pull-error-2023-11-17' of https://repo.or.cz/qemu/armbru into stagingStefan Hajnoczi
Error reporting patches for 2023-11-17 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmVXLq8SHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTBIsP/3vTjS2QJ2JdjgZV7ARGyfAxsPbG4TS2 # JHqFsF37vY5u+gYjcBJsmDY8YBpYWQFkOYJ8RJtCdedOnW2gML88vc3XKcUrUc7T # ebN8KnpA8mx5nr0SMGD+/w72xZl917lGFhXRqazvS2i0dbJvuAsacoo300oIZncx # 5480GiJpNc/QBUdU9ywFWwQOVzJynn32e1OFWLmbL2xH+kcgMbgWgrEMQUb0D99+ # J9PjKCJxVlJFKEjph7iLCahID5V1gjJTzp3iESOWbO7BTFuKJZ8E510oXd1ng86c # JLOEcu4vhC4JNvMx5R31nVz4LXfQD8Hf1pSVL64gTybVq3bEMhv/wLUuG/AcPIuL # t1GxRhGqY2yXbnP3GfP9xNhFps0uLmJF7g5Q/ao2sEwOiPmGmNKcK7xV6OkYJdIr # isbb+bot19NN+B7r1ZWkb7BEhM99PtHZtsrmnPZ7T19CX/cy2k0D0W78nqJE0AJU # sBhwuntou+DvBbLB3KD33OcE0UI93IxICaqR56q4lwydYOQ4p8VCTRI1aoDrZpPx # Q+kMs+sy3q7CGMKEScnb+HeA8KuvKFGqw3XKJwYQsTITRd+NdWnQ7dKAC2J2sRvO # DRGhUEmOiaDv3HdmToV3owfLsH9raK6Oh8KYjxiOoiJ1Tb0+sZvxayemQ97mRVuJ # r+yle/BX1ODY # =7QAS # -----END PGP SIGNATURE----- # gpg: Signature made Fri 17 Nov 2023 04:13:19 EST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-error-2023-11-17' of https://repo.or.cz/qemu/armbru: target/i386/cpu: Improve error message for property "vendor" balloon: Fix a misleading error message net: Fix a misleading error message ui/qmp-cmds: Improve two error messages qga: Improve guest-exec-status error message hmp: Improve sync-profile error message spapr/pci: Correct "does not support hotplugging error messages Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-20Merge tag 'pull-request-2023-11-16' of https://gitlab.com/thuth/qemu into ↵Stefan Hajnoczi
staging * Fix the avocado tests for running with Python 3.12 * Add some asset hashes to silence warnings * Fix the broken reverse_debugging test # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmVWWRARHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbWOnQ/8DdnPGlXrOl+4QzRaJQovmmS04OZuiWtB # TpOd/cWQMsKKX7YGq9uAuLBa7zYXyHZLmOLcSYYKYzcFnxX155TgtXDqZXJb7k8D # 9rGtF8vgGokT3VmsWW6w5LNa1Pg5FPd56+l8Kus7iqpHbxPzMybP/HFGcuCdeMW9 # kFaLCvtP7LAPM9k8z6Nw9vbQ5aUx2J9fwSgWhoMYmVO72A7HUZ0KA+lti/3xvhKy # zcYJ4PxFaSK4SQwG8yfhmwqCw3QjeH+Se8gxvqR6nmKW9wCA3FdmUFaQPQQF6bq+ # AEUPBJpa+eZA38tA9rts6VSVGgrg5IA9rPYFc8ZIYn6dMgkAqR7snvcphyUAijJ9 # oqS72BJkw6KZ+52QyZ4O2zG4lkgi/uHp0qhmAr/FHDLkmetTjyQ4vA5dm76V5B2G # EAPzNZct0RluD0hk2qIKXRC4FN4HFaEAL4EpDjCuymTArsEhSf9I8IEMu9V4CVHs # Jp2c/0EZNCcTeqc7xr+lO+JFMd1kbB2N9yApFrbQpaIsZQkSF/oNtFZ8h8n/DhNJ # Ojp9hSUkb37eBZuRA5wsDAo9WI1ADV1n7Ku7ao9aJ84iozcAvOjk2T+NXkeKJEdW # br8RCqpm0yiB9W7X9WUa5uQd69pdKX4ILW1ekdrG02CuxbIE42Jx5WYdzUrXDUIz # hzD/QPF3TsI= # =IcSd # -----END PGP SIGNATURE----- # gpg: Signature made Thu 16 Nov 2023 13:01:52 EST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2023-11-16' of https://gitlab.com/thuth/qemu: tests/avocado: Enable reverse_debugging.py tests in gitlab CI tests/avocado: reverse_debugging drain console to prevent hang tests/avocado/mem-addr-space-check: Replace assertEquals() for Python 3.12 tests/avocado/replay_kernel: Mark the test_x86_64_pc as flaky tests/avocado: Make fetch_asset() unconditionally require a crypto hash tests/avocado/multiprocess: Add asset hashes to silence warnings tests/avocado/intel_iommu: Add asset hashes to avoid warnings tests/avocado/virtio-gpu: Fix test_vhost_user_vga_virgl for edid support tests/avocado: Replace assertRegexpMatches() for Python 3.12 compatibility tests/avocado: Replace assertEquals() for Python 3.12 compatibility Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-20Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into stagingStefan Hajnoczi
trivial patches for 2023-11-16 # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmVVxz4PHG1qdEB0bHMu # bXNrLnJ1AAoJEHAbT2saaT5ZI+cH+wexpGPHmmWHaA0moo+1MZPC3pbEvOXq184b # oeGRUidq89380DzsxkIxrDn98KisKnIX3oGZ56Q394Ntg7J2xyFN/KsvQhzpElSb # 01Ws90NVoHIXoXZKNIOFZXkqOLCB+kwqZ1PFiYwALEJkEPBfpV40dTWuyCnxh1D8 # lKHtk5bLKzDbTmDYYfnZ7zkP6CLMhRH7A7evdb/4+W+phbqTHeKbSgq8QhNvVX8n # 38yzPTQPlMyXHw7Psio62N7wz86wEiGkYELud1nPPlA902paM5FHMdjYBohm/ZCM # 4E12gzMg4SgwBIsWoyE/1tUAjyJXeChocxOVLFqDXXaiYgomAh0= # =x0bq # -----END PGP SIGNATURE----- # gpg: Signature made Thu 16 Nov 2023 02:39:42 EST # gpg: using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59 # gpg: issuer "mjt@tls.msk.ru" # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full] # gpg: aka "Michael Tokarev <mjt@debian.org>" [full] # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931 4B22 701B 4F6B 1A69 3E59 * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: (27 commits) util/range.c: spelling fix: inbetween util/filemonitor-inotify.c: spelling fix: kenel tests/qtest/ufs-test.c: spelling fix: tranfer tests/qtest/migration-test.c: spelling fix: bandwith target/riscv/cpu.h: spelling fix: separatly include/hw/virtio/vhost.h: spelling fix: sate include/hw/hyperv/dynmem-proto.h: spelling fix: nunber, atleast include/block/ufs.h: spelling fix: setted hw/net/cadence_gem.c: spelling fixes: Octects hw/mem/memory-device.c: spelling fix: ontaining contrib/vhost-user-gpu/virgl.c: spelling fix: mesage migration/rdma.c: spelling fix: asume target/hppa: spelling fixes: Indicies, Truely target/arm/tcg: spelling fixes: alse, addreses docs/system/arm/emulation.rst: spelling fix: Enhacements docs/devel/migration.rst: spelling fixes: doen't, diferent, responsability, recomend docs/about/deprecated.rst: spelling fix: becase gdbstub: spelling fix: respectivelly hw/cxl: spelling fixes: limitaions, potentialy, intialized linux-user: spelling fixes: othe, necesary ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-19linux-user: xtensa: fix signal delivery in FDPICMax Filippov
In FDPIC signal handlers are passed around as FD pointers. Actual code address and GOT pointer must be fetched from memory by the QEMU code that implements kernel signal delivery functionality. This change is equivalent to the following kernel change: 9c2cc74fb31e ("xtensa: fix signal delivery to FDPIC process") Cc: qemu-stable@nongnu.org Fixes: d2796be69d7c ("linux-user: add support for xtensa FDPIC") Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2023-11-17disas/hppa: Show hexcode of instruction along with disassemblyHelge Deller
On hppa many instructions can be expressed by different bytecodes. To be able to debug qemu translation bugs it's therefore necessary to see the currently executed byte codes without the need to lookup the sequence without the full executable. With this patch the instruction byte code is shown beside the disassembly. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-17target/hppa: Fix 64-bit SHRPD instructionHelge Deller
When shifting the two joined 64-bit registers right, shift the upper 64-bit register to the left and the lower 64-bit register to the right before merging them with OR. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-17target/i386/cpu: Improve error message for property "vendor"Markus Armbruster
Improve $ qemu-system-x86_64 -device max-x86_64-cpu,vendor=me qemu-system-x86_64: -device max-x86_64-cpu,vendor=me: Property '.vendor' doesn't take value 'me' to qemu-system-x86_64: -device max-x86_64-cpu,vendor=0123456789abc: value of property 'vendor' must consist of exactly 12 characters Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20231031111059.3407803-8-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> [Typo corrected]
2023-11-17balloon: Fix a misleading error messageMarkus Armbruster
The error message {"execute": "balloon", "arguments":{"value": -1}} {"error": {"class": "GenericError", "desc": "Parameter 'target' expects a size"}} points to 'target' instead of 'value'. Fix: {"error": {"class": "GenericError", "desc": "Parameter 'value' expects a size"}} Root cause: qmp_balloon()'s parameter is named @target. Rename it to @value to match the QAPI schema. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20231031111059.3407803-7-armbru@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Mario Casquero <mcasquer@redhat.com>
2023-11-17net: Fix a misleading error messageMarkus Armbruster
The error message $ qemu-system-x86_64 -netdev user,id=net0,ipv6-net=fec0::0/ qemu-system-x86_64: -netdev user,id=net0,ipv6-net=fec0::0/: Parameter 'ipv6-prefixlen' expects a number points to ipv6-prefixlen instead of ipv6-net. Fix: qemu-system-x86_64: -netdev user,id=net0,ipv6-net=fec0::0/: parameter 'ipv6-net' expects a number after '/' Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20231031111059.3407803-6-armbru@redhat.com>
2023-11-17ui/qmp-cmds: Improve two error messagesMarkus Armbruster
set_password with "protocol": "vnc" supports only "connected": "keep". Any other value is rejected with Invalid parameter 'connected' Improve this to parameter 'connected' must be 'keep' when 'protocol' is 'vnc' client_migrate_info requires "port" or "tls-port". When both are missing, it fails with Parameter 'port/tls-port' is missing Improve this to parameter 'port' or 'tls-port' is required Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20231031111059.3407803-5-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-17qga: Improve guest-exec-status error messageMarkus Armbruster
When the PID passed to guest-exec-status does not exist, we report "Invalid parameter 'pid'" Improve this to "PID 1234 does not exist" Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20231031111059.3407803-4-armbru@redhat.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-17hmp: Improve sync-profile error messageMarkus Armbruster
Improve (qemu) sync-profile of Error: Invalid parameter 'of' to Error: invalid parameter 'of', expecting 'on', 'off', or 'reset' Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20231031111059.3407803-3-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Dr. David Alan Gilbert <dave@treblig.org>
2023-11-17spapr/pci: Correct "does not support hotplugging error messagesMarkus Armbruster
When dynamic-reconfiguration is off, hot plug / unplug can fail with "Bus 'spapr-pci-host-bridge' does not support hotplugging". spapr-pci-host-bridge is a device, not a bus. Report the name of the bus it provides instead: 'pci.0'. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20231031111059.3407803-2-armbru@redhat.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-16tests/avocado: Enable reverse_debugging.py tests in gitlab CINicholas Piggin
Let's try enable reverse_debugging.py in gitlab CI. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Message-ID: <20231116115354.228678-3-npiggin@gmail.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-16tests/avocado: reverse_debugging drain console to prevent hangNicholas Piggin
Like replay_linux.py, reverse_debugging.py starts the vm with console set but does not interact with it (e.g., with wait_for_console_pattern). In this situation, the console should have a drainer attached so the socket does not fill. replay_linux.py has a drainer, but it is missing from reverse_debugging.py. Per analysis in Link: this can cause the console socket/pipe to fill and QEMU get stuck in qemu_chr_write_buffer, leading to strange test case failures (ppc64 fails because it prints a lot to console in early bios). Attaching a drainer prevents this. Note, this commit does not fix bugs introduced by the commits referenced in the first two Fixes: tags, but together those commits conspire to irritate the problem and cause test case failure, which this commit fixes. Link: https://lore.kernel.org/qemu-devel/ZVT-bY9YOr69QTPX@redhat.com/ Fixes: 1d4796cd0083 ("python/machine: use socketpair() for console connections") Fixes: 761a13b23946 ("tests/avocado: ppc64 reverse debugging tests for pseries and powernv") Fixes: be52eca30978 ("tests/acceptance: add reverse debugging test") Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Message-ID: <20231116115354.228678-1-npiggin@gmail.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-16tests/avocado/mem-addr-space-check: Replace assertEquals() for Python 3.12Thomas Huth
assertEquals() has been removed in Python 3.12 and should be replaced by assertEqual(). See: https://docs.python.org/3.12/whatsnew/3.12.html#id3 Message-ID: <20231116061956.14676-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Ani Sinha <anisinha@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-16tests/avocado/replay_kernel: Mark the test_x86_64_pc as flakyThomas Huth
It's failing very often, so don't run this by default anymore until it gets fixed. Message-ID: <20231114153019.295131-1-thuth@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-16tests/avocado: Make fetch_asset() unconditionally require a crypto hashPhilippe Mathieu-Daudé
In a perfect world we'd have reproducible tests, but then we'd be sure we run the same binaries. If a binary artifact isn't hashed, we have no idea what we are running. Therefore enforce hashing for all our artifacts. With this change, unhashed artifacts produce: $ avocado run tests/avocado/multiprocess.py (1/2) tests/avocado/multiprocess.py:Multiprocess.test_multiprocess_x86_64: ERROR: QemuBaseTest.fetch_asset() missing 1 required positional argument: 'asset_hash' (0.19 s) Inspired-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20231115205149.90765-1-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-16tests/avocado/multiprocess: Add asset hashes to silence warningsThomas Huth
The multiprocess test is currently succeeding with an annoying warning: (1/2) tests/avocado/multiprocess.py:Multiprocess.test_multiprocess_x86_64: WARN: Test passed but there were warnings during execution. Check the log for details In the log, you can find an entry like: WARNI| No hash provided. Cannot check the asset file integrity. Add the proper asset hashes to avoid those warnings. Message-ID: <20231115145852.494052-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-16tests/avocado/intel_iommu: Add asset hashes to avoid warningsThomas Huth
The intel_iommu test is currently succeeding with annoying warnings. Add the proper asset hashes to avoid those. Message-ID: <20231114143531.291820-1-thuth@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-16tests/avocado/virtio-gpu: Fix test_vhost_user_vga_virgl for edid supportThomas Huth
The "edid" feature has been added to vhost-user-gpu in commit c06444261e20 ("contrib/vhost-user-gpu: implement get_edid feature"), so waiting for "features: +virgl -edid" in the test does not work anymore, it's "+edid" instead of "-edid" now! While we're at it, move the expected string to the preceeding exec_command_and_wait_for_pattern() instead (since waiting for empty string here does not make too much sense). Message-ID: <20231114203456.319093-1-thuth@redhat.com> Reviewed-by: Antonio Caggiano <quic_acaggian@quicinc.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-16tests/avocado: Replace assertRegexpMatches() for Python 3.12 compatibilityPhilippe Mathieu-Daudé
assertRegexpMatches() has been removed in Python 3.12 and should be replaced by assertRegex(). See: https://docs.python.org/3.12/whatsnew/3.12.html#id3 Inspired-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231114144832.71612-1-philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-16tests/avocado: Replace assertEquals() for Python 3.12 compatibilityThomas Huth
assertEquals() has been removed in Python 3.12 and should be replaced by assertEqual(). See: https://docs.python.org/3.12/whatsnew/3.12.html#id3 Message-ID: <20231114134326.287242-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-11-15Merge tag 'pull-tcg-20231114' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi
accel/tcg: Forward probe size on to notdirty_write accel/tcg: Remove CF_LAST_IO target/sparc: Fix RETURN # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmVTyVodHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV91UAf/Sf304RJutaNX+85s # 2HP31heScIsrrziDvPhZJG+gD3/Xeq9aDRCNqw7C/MhIHadarJcghTVqPuTMZ8Eg # j3FqvSr6e+6A6VGNdg2d5CKasIYhRMHqCy94g/0fVWtnV9n/2cJPS6zIWGlxl2dT # tJ9AK9IbkLo9b7jifUztTsllhzU8rMvxYznxr6dynJ/3V10gtcAIsc41BeHoLzob # e8wZtuwNUtgiHBGhfEnpspK+oJaPKo2Qy1zPdBiuLadUhl066JdXeOKN9XgCuRyR # 024dOqVwZ+UBQhcmUdJuOjAnsnJJUx29TKtmOOoTugrq+mE1xybSBiiih6EELQlj # AYq6jg== # =D4Wj # -----END PGP SIGNATURE----- # gpg: Signature made Tue 14 Nov 2023 14:24:10 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20231114' of https://gitlab.com/rth7680/qemu: target/sparc: Fix RETURN accel/tcg: Forward probe size on to notdirty_write accel/tcg: Remove CF_LAST_IO Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-15util/range.c: spelling fix: inbetweenMichael Tokarev
Fixes: b439595a08d7 "range: Introduce range_inverse_array()" Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2023-11-15util/filemonitor-inotify.c: spelling fix: kenelMichael Tokarev
Fixes: 2e12dd405c66 "util/filemonitor-inotify: qemu_file_monitor_watch(): assert no overflow" Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2023-11-15tests/qtest/ufs-test.c: spelling fix: tranferMichael Tokarev
Fixes: 631c872614ac "tests/qtest: Introduce tests for UFS" Reviewed-by: Jeuk Kim <jeuk20.kim@samsung.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2023-11-15tests/qtest/migration-test.c: spelling fix: bandwithMichael Tokarev
Fixes: 17257b90be4f "tests: Add migration dirty-limit capability test" Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2023-11-15target/riscv/cpu.h: spelling fix: separatlyMichael Tokarev
Fixes: 40336d5b1d4c "target/riscv: Add HS-mode virtual interrupt and IRQ filtering support." Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2023-11-15include/hw/virtio/vhost.h: spelling fix: sateMichael Tokarev
Fixes: 4a00d5d7f4b6 "vhost: Add high-level state save/load functions" Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2023-11-15include/hw/hyperv/dynmem-proto.h: spelling fix: nunber, atleastMichael Tokarev
Fixes: 4f80cd2f033e "Add Hyper-V Dynamic Memory Protocol definitions" Acked-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2023-11-15include/block/ufs.h: spelling fix: settedMichael Tokarev
Fixes: bc4e68d362ec "hw/ufs: Initial commit for emulated Universal-Flash-Storage" Reviewed-by: Jeuk Kim <jeuk20.kim@samsung.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2023-11-15hw/net/cadence_gem.c: spelling fixes: OctectsMichael Tokarev
Fixes: c755c943aa2e "hw/net/cadence_gem: use REG32 macro for register definitions" Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Luc Michel <luc.michel@amd.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2023-11-15hw/mem/memory-device.c: spelling fix: ontainingMichael Tokarev
Fixes: 6c1b28e9e405 "memory-device: Support empty memory devices" Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2023-11-15contrib/vhost-user-gpu/virgl.c: spelling fix: mesageMichael Tokarev
Fixes: e3c82fe04f31 "contrib/vhost-user-gpu: add support for sending dmabuf modifiers" Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-15 02:10:41 +0000