Age | Commit message (Expand) | Author |
2014-04-17 | allwinner-a10-pic: set vector address when an interrupt is pending | Beniamino Galvani |
2014-04-17 | timer: cadence_ttc: Fix match register write logic | Peter Crosthwaite |
2014-04-17 | target-arm/gdbstub64.c: remove useless 'break' statement. | Chen Gang |
2014-04-17 | target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32 | Peter Maydell |
2014-04-17 | target-arm: Handle the CPU being in AArch32 mode in the AArch64 set_pc | Peter Maydell |
2014-04-17 | target-arm: Make Cortex-A15 CBAR read-only | Peter Maydell |
2014-04-17 | target-arm: Implement CBAR for Cortex-A57 | Peter Maydell |
2014-04-17 | target-arm: Implement Cortex-A57 implementation-defined system registers | Peter Maydell |
2014-04-17 | target-arm: Implement RVBAR register | Peter Maydell |
2014-04-17 | target-arm: Implement AArch64 address translation operations | Peter Maydell |
2014-04-17 | target-arm: Implement auxiliary fault status registers | Peter Maydell |
2014-04-17 | target-arm: Replace wildcarded cpreg definitions with precise ones for ARMv8 | Peter Maydell |
2014-04-17 | target-arm: Don't expose wildcard ID register definitions for ARMv8 | Peter Maydell |
2014-04-17 | target-arm: Remove THUMB2EE feature from AArch64 'any' CPU | Peter Maydell |
2014-04-17 | target-arm: Implement ISR_EL1 register | Peter Maydell |
2014-04-17 | target-arm: Implement AArch64 view of ACTLR | Peter Maydell |
2014-04-17 | target-arm: Implement AArch64 view of CONTEXTIDR | Peter Maydell |
2014-04-17 | target-arm: Implement AArch64 views of AArch32 ID registers | Peter Maydell |
2014-04-17 | target-arm: Add Cortex-A57 processor | Peter Maydell |
2014-04-17 | target-arm: Implement ARMv8 MVFR registers | Peter Maydell |
2014-04-17 | target-arm: Implement AArch64 EL1 exception handling | Rob Herring |
2014-04-17 | target-arm: Move arm_log_exception() into internals.h | Peter Maydell |
2014-04-17 | target-arm: Implement AArch64 SPSR_EL1 | Peter Maydell |
2014-04-17 | target-arm: Implement SP_EL0, SP_EL1 | Peter Maydell |
2014-04-17 | target-arm: Add AArch64 ELR_EL1 register. | Peter Maydell |
2014-04-17 | target-arm: Implement AArch64 views of fault status and data registers | Rob Herring |
2014-04-17 | target-arm: Use dedicated CPU state fields for ARM946 access bit registers | Peter Maydell |
2014-04-17 | target-arm: A64: Implement DC ZVA | Peter Maydell |
2014-04-17 | target-arm: Don't mention PMU in debug feature register | Peter Maydell |
2014-04-17 | target-arm: Add v8 mmu translation support | Rob Herring |
2014-04-17 | target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1 | Peter Maydell |
2014-04-17 | target-arm: A64: Add assertion that FP access was checked | Peter Maydell |
2014-04-17 | target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN set | Peter Maydell |
2014-04-17 | target-arm: Provide syndrome information for MMU faults | Rob Herring |
2014-04-17 | target-arm: Add support for generating exceptions with syndrome information | Peter Maydell |
2014-04-17 | target-arm: Provide correct syndrome information for cpreg access traps | Peter Maydell |
2014-04-17 | target-arm: Define exception record for AArch64 exceptions | Peter Maydell |
2014-04-17 | target-arm: Implement AArch64 DAIF system register | Peter Maydell |
2014-04-17 | target-arm: Split out private-to-target functions into internals.h | Peter Maydell |
2014-04-17 | Merge remote-tracking branch 'remotes/rth/tcg-aarch-6-5' into staging | Peter Maydell |
2014-04-17 | Open 2.1 development tree | Peter Maydell |
2014-04-17 | Update version for v2.0.0 releasev2.0.0 | Peter Maydell |
2014-04-16 | tcg-aarch64: Use tcg_out_mov in preference to tcg_out_movr | Richard Henderson |
2014-04-16 | tcg-aarch64: Prefer unsigned offsets before signed offsets for ldst | Richard Henderson |
2014-04-16 | tcg-aarch64: Introduce tcg_out_insn_3312, _3310, _3313 | Richard Henderson |
2014-04-16 | tcg-aarch64: Merge aarch64_ldst_get_data/type into tcg_out_op | Richard Henderson |
2014-04-16 | tcg-aarch64: Introduce tcg_out_insn_3507 | Richard Henderson |
2014-04-16 | tcg-aarch64: Support stores of zero | Richard Henderson |
2014-04-16 | tcg-aarch64: Implement TCG_TARGET_HAS_new_ldst | Richard Henderson |
2014-04-16 | tcg-aarch64: Pass qemu_ld/st arguments directly | Richard Henderson |