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QEMU is a generic and open source machine & userspace emulator and virtualizer
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2022-04-22
hw/core: tcg-cpu-ops.h: Update comments of debug_check_watchpoint()
Bin Meng
2022-04-22
target/riscv: cpu: Enable native debug feature
Bin Meng
2022-04-22
target/riscv: machine: Add debug state description
Bin Meng
2022-04-22
target/riscv: csr: Hook debug CSR read/write
Bin Meng
2022-04-22
target/riscv: cpu: Add a config option for native debug
Bin Meng
2022-04-22
target/riscv: debug: Implement debug related TCGCPUOps
Bin Meng
2022-04-22
hw/intc: riscv_aclint: Add reset function of ACLINT devices
Jim Shu
2022-04-22
hw/intc: Make RISC-V ACLINT mtime MMIO register writable
Frank Chang
2022-04-22
hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RISC-V ACLINT
Frank Chang
2022-04-22
hw/intc: Add .impl.[min|max]_access_size declaration in RISC-V ACLINT
Frank Chang
2022-04-22
hw/riscv: virt: fix DT property mmu-type when CPU mmu option is disabled
Niklas Cassel
2022-04-22
target/riscv/pmp: fix NAPOT range computation overflow
Nicolas Pitre
2022-04-22
hw/riscv: virt: Exit if the user provided -bios in combination with KVM
Ralf Ramsauer
2022-04-22
target/riscv: Use cpu_loop_exit_restore directly from mmu faults
Richard Henderson
2022-04-22
target/riscv: fix start byte for vmv<nf>r.v when vstart != 0
Weiwei Li
2022-04-22
target/riscv: Add isa extenstion strings to the device tree
Atish Patra
2022-04-22
target/riscv: misa to ISA string conversion fix
Tsukasa OI
2022-04-22
target/riscv: optimize helper for vmv<nr>r.v
Weiwei Li
2022-04-22
target/riscv: optimize condition assign for scale < 0
Weiwei Li
2022-04-22
target/riscv: Add initial support for the Sdtrig extension
Bin Meng
2022-04-22
target/riscv: Allow software access to MIP SEIP
Alistair Francis
2022-04-22
target/riscv: cpu: Fixup indentation
Alistair Francis
2022-04-22
target/riscv: Enable privileged spec version 1.12
Atish Patra
2022-04-22
target/riscv: Add *envcfg* CSRs support
Atish Patra
2022-04-22
target/riscv: Add support for mconfigptr
Atish Patra
2022-04-22
target/riscv: Introduce privilege version field in the CSR ops.
Atish Patra
2022-04-22
target/riscv: Add the privileged spec version 1.12.0
Atish Patra
2022-04-22
target/riscv: Define simpler privileged spec version numbering
Atish Patra
2022-04-22
riscv: opentitan: Connect opentitan SPI Host
Wilfred Mallawa
2022-04-22
hw/ssi: Add Ibex SPI device model
Wilfred Mallawa
2022-04-21
Merge tag 'python-pull-request' of https://gitlab.com/jsnow/qemu into staging
Richard Henderson
2022-04-21
Merge tag 'pull-qapi-2022-04-21' of git://repo.or.cz/qemu/armbru into staging
Richard Henderson
2022-04-21
Merge tag 'misc-pull-request' of gitlab.com:marcandre.lureau/qemu into staging
Richard Henderson
2022-04-21
Merge tag 'pull-target-arm-20220421' of https://git.linaro.org/people/pmaydel...
Richard Henderson
2022-04-21
python/qmp: remove pylint workaround from legacy.py
John Snow
2022-04-21
python: rename 'aqmp-tui' to 'qmp-tui'
John Snow
2022-04-21
python: rename qemu.aqmp to qemu.qmp
John Snow
2022-04-21
python: re-enable pylint duplicate-code warnings
John Snow
2022-04-21
python: remove the old QMP package
John Snow
2022-04-21
python/aqmp: copy qmp docstrings to qemu.aqmp.legacy
John Snow
2022-04-21
python/aqmp: fully separate from qmp.QEMUMonitorProtocol
John Snow
2022-04-21
python/aqmp: take QMPBadPortError and parse_address from qemu.qmp
John Snow
2022-04-21
python: temporarily silence pylint duplicate-code warnings
John Snow
2022-04-21
python/aqmp-tui: relicense as LGPLv2+
John Snow
2022-04-21
python/qmp-shell: relicense as LGPLv2+
John Snow
2022-04-21
python/aqmp: relicense as LGPLv2+
John Snow
2022-04-21
python/aqmp: add explicit GPLv2 license to legacy.py
John Snow
2022-04-21
iotests: switch to AQMP
John Snow
2022-04-21
iotests/mirror-top-perms: switch to AQMP
John Snow
2022-04-21
scripts/bench-block-job: switch to AQMP
John Snow
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