aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2012-11-01usb/ehci-pci: dynamic type generationGerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01uhci: add ich9 00:1a.* variantsGerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01uhci: stick irq routing info into UHCIInfo too.Gerd Hoffmann
Kills the ugly "switch (device_id) { ... }" struct and makes it easier to figure what the differences between the uhci variants are. Need our own DeviceClass struct for that so we can allocate some space to store UHCIInfo. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01uhci: dynamic type generationGerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01xilinx_zynq: add USB controllersPeter Crosthwaite
Add the two usb controllers in Zynq. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01usb/ehci: add sysbus variantGerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01usb/ehci: split into multiple source filesGerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01usb/ehci: Guard definition of EHCI_DEBUGPeter Crosthwaite
Guard against re-definition of EHCI_DEBUG. Allows for turning on of debug info from configure (using --qemu-extra-cflags="-DEHCI_DEBUG=1") rather than source code hacking. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01usb/ehci: seperate out PCIismsPeter Crosthwaite
Seperate the PCI stuff from the EHCI components. Extracted the PCIDevice out into a new wrapper struct to make EHCIState non-PCI-specific. Seperated tho non PCI init component out into a seperate "common" init function. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01usb/ehci: Abstract away PCI DMA APIPeter Crosthwaite
Pull the DMAContext for the PCI DMA out at device init time and put it into the device state. Use dma_memory_read/write() instead of pci specific versions. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01usb/ehci: parameterise the register region offsetsPeter Crosthwaite
The capabilities register and operational register offsets can vary from one EHCI implementation to the next. Parameterise accordingly. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01xhci: allow address slot being called multiple timesGerd Hoffmann
win8 guests do that for some reason ... Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01xhci: add port trace pointsGerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01xhci: set pls in xhci_port_update & xhci_port_resetGerd Hoffmann
Set the port link state to the correct values in xhci_port_update and xhci_port_reset functions. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01xhci: add xhci_port_resetGerd Hoffmann
Move port reset logic to its own function. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01xhci: add xhci_port_notifyGerd Hoffmann
Create a function to notify the guest about port status changes and put it into use. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01xhci: add xhci_port_have_deviceGerd Hoffmann
Factor out the code which checks whenever a usb device is attached to the port in question. No functional change. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01xhci: s/xhci_update_port/xhci_port_update/Gerd Hoffmann
Rename the function for xhci_port_* naming scheme, also drop the xhci parameter as port carries a pointer to xhci anyway. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-11-01xhci: add {get,set}_field macros & enum for plsGerd Hoffmann
Add {get,set}_field macros (simliar to ehci) to read and update some bits of a word. Put them into use for updating pls (port link state) values. Also add a enum for pls values. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-10-31target-mips: don't flush extra TLB on permissions upgradeAurelien Jarno
If the guest uses a TLBWI instruction for upgrading permissions, we don't need to flush the extra TLBs. This improve boot time performance by about 10%. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: fix TLBR wrt SEGMaskAurelien Jarno
Like r4k_map_address(), r4k_helper_tlbp() should use SEGMask to mask the address. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: use deposit instead of hardcoded versionAurelien Jarno
Use the deposit op instead of and hardcoded bit field insertion. It allows the host to emit the corresponding instruction if available. At the same time remove the (lsb > msb) test. The MIPS64R2 instruction set manual says "Because of the instruction format, lsb can never be greater than msb, so there is no UNPREDICATABLE case for this instruction." (Bug reported as LP:1071149.) Cc: Никита Канунников <n.kanunnikov@sbtcom.ru> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: optimize ddiv/ddivu/div/divu with movcondAurelien Jarno
The result of a division by 0, or a division of INT_MIN by -1 in the signed case, is unpredictable. Just replace 0 by 1 in that case so that it doesn't trigger a floating point exception on the host. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: implement movn/movz using movcondAurelien Jarno
Avoid the branches in movn/movz implementation and replace them with movcond. Also update a wrong command. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: don't use local temps for store conditionalAurelien Jarno
Store conditional operations only need local temps in user mode. Fix the code to use temp local only in user mode, this spares two memory stores in system mode. At the same time remove a wrong a wrong copied & pasted comment, store operations don't have a register destination. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: implement unaligned loads using TCGAurelien Jarno
Load/store from helpers should be avoided as they are quite inefficient. Rewrite unaligned loads instructions using TCG and aligned loads. The number of actual loads operations to implement an unaligned load instruction is reduced from up to 8 to 1. Note: As we can't rely on shift by 32 or 64 undefined behaviour, the code loads already shift by one constants. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: simplify load/store microMIPS helpersAurelien Jarno
load/store microMIPS helpers are reinventing the wheel. Call do_lw, do_ll, do_sw and do_sl instead of using a macro calling the cpu_* load/store functions. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: optimize load operationsAurelien Jarno
Only allocate t1 when needed. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: cleanup load/store operationsAurelien Jarno
Load/store operations use macros for historical reasons. Now that there is no point in keeping them, replace them by direct calls to qemu_ld/st. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: restore CPU state after an FPU exceptionAurelien Jarno
Rework *raise_exception*() functions so that they can be called from other helpers, passing the return address as an argument. Use do_raise_exception() function in update_fcr31() to correctly restore the CPU state after an FPU exception. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: use softfloat constants when possibleAurelien Jarno
softfloat already has a few constants defined, use them instead of redefining them in target-mips. Rename FLOAT_SNAN32 and FLOAT_SNAN64 to FP_TO_INT32_OVERFLOW and FP_TO_INT64_OVERFLOW as even if they have the same value, they are technically different (and defined differently in the MIPS ISA). Remove the unused constants. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: cleanup float to int conversion helpersAurelien Jarno
Instead of accessing the flags from the floating point control register after updating it, read the softfloat flags. This is just code cleanup and should not change the behaviour. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: fix FPU exceptionsAurelien Jarno
For each FPU instruction that can trigger an FPU exception, to call call update_fcr31() after. Remove the manual NaN assignment in case of float to float operation, as softfloat is already taking care of that. However for float to int operation, the value has to be changed to the MIPS one. In the cvtpw_ps case, the two registers have to be handled separately to guarantee a correct final value in both registers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: keep softfloat exception set to 0 between instructionsAurelien Jarno
Instead of clearing the softfloat exception flags before each floating point instruction, reset them to 0 in update_fcr31() when an exception is detected. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: use the softfloat floatXX_muladd functionsAurelien Jarno
Use the new softfloat floatXX_muladd() functions to implement the madd, msub, nmadd and nmsub instructions. At the same time replace the name of the helpers by the name of the instruction, as the only reason for the previous names was to keep the macros simple. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31softfloat: implement fused multiply-add NaN propagation for MIPSAurelien Jarno
Add a pickNaNMulAdd function for MIPS, implementing NaN propagation rules for MIPS fused multiply-add instructions. Cc: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: do not save CPU state when using retranslationAurelien Jarno
When the CPU state after a possible retranslation is going to be handled through code retranslation, we don't need to save the CPU state before. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: correctly restore btarget upon exceptionAurelien Jarno
When the CPU state is restored through retranslation after an exception, btarget should also be restored. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31tcg: don't remove op if output needs to be synced to memoryAurelien Jarno
Commit 9c43b68de628a1e2cba556adfb71c17028eb802e do not correctly check for dead outputs when they need to be synced to memory in case of half-dead operations. Fix that by applying the same pattern than for the default case. Tested-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-alpha: Use TCG_CALL_NO_WGRichard Henderson
Mark helper functions that raise exceptions, but otherwise do not change TCG register state, with TCG_CALL_NO_WG. Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-10-31chardev: Use timer instead of bottom-half to postpone open eventJan Kiszka
As the block layer may decide to flush bottom-halfs while the machine is still initializing (e.g. to read geometry data from the disk), our postponed open event may be processed before the last frontend registered with a muxed chardev. Until the semantics of BHs have been clarified, use an expired timer to achieve the same effect (suggested by Paolo Bonzini). This requires to perform the alarm timer initialization earlier as otherwise timer subsystem can be used before being ready. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-10-31target-mips: remove #if defined(TARGET_MIPS64) in opcode enumsAurelien Jarno
All switch() decoding instruction have a default entry, so it is possible to have unused enum entries. Remove conditional definitions of MIPS64 opcode enums, as it only makes the code less readable. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Change TODO fileJia Liu
Change DSP r1 & DSP r2 into microMIPS DSP encodings in TODO file. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP testcasesJia Liu
Add MIPS ASE DSP testcases. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP processorsJia Liu
Add 74kf and mips64dspr2-generic-cpu model for test. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP accumulator instructionsJia Liu
Add MIPS ASE DSP Accumulator and DSPControl Access instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP compare-pick instructionsJia Liu
Add MIPS ASE DSP Compare-Pick instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP bit/manipulation instructionsJia Liu
Add MIPS ASE DSP Bit/Manipulation instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP multiply instructionsJia Liu
Add MIPS ASE DSP Multiply instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP GPR-based shift instructionsJia Liu
Add MIPS ASE DSP GPR-Based Shift instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-15 06:05:44 +0000