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2022-07-05Merge tag 'pull-request-2022-07-05' of https://gitlab.com/thuth/qemu into ↵Richard Henderson
staging * Fix memory leak in test-cutils * Fix edk2/opensbi jobs to not run automatically by accident * Improve timings in the migration qtest * Remove libvixl disassembler * Add ukrainian translation * Require a recent version of libpng # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmLECEkRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbV7lxAAmEItM6PIoW58eWPzReKVH8LE2w3UlvOZ # JQhNgJjuN23fqjUVkcT0yCfdNCz/nKvafHnxfHQnrAXyB5V5vU8ovBgSuWK2mcmD # NTFK+/2x5lcsyBrOe3QoeD2g1r7+Os3AYVkdnN/t2HAMLwQyaoshKaMV/UHC9O/i # Kle1svYRNyCgyXJgxaOdbVMBSLi/L9h2R5AaG31GIi9wnf0n8HDH/ONtmeIpN09g # BlMeZqPhGJT+tpMvviif65/Za57Y9h/r+TOgEIIs00cWmxqaBmcXXN9qog2s0n7A # nOm3ck2lpGJCQ6+sl6/Mphyr3X6nWHsxGrLDElS0Ba5bg6T/Xqfg2pBcb81Klkjc # QcTdFPiMxKUczgpFq326sqiaVzMgys4vwnW5iPSd5swNzrkYKADAIreki5jyM3cH # lohBG/ruOmg5xMkX2K6pra0iOAeCz44Ku/HTREfY1CTUgEQZJY4SZrMJSnmUTnM+ # EQCkDcmOsnFDaQazneCbo18l37cXOgEhH8VoGAOqg1aRjr7TNlsJzx87PoD+9zNR # GEh7kp18ABRGik5ZACdLQ/HhhOJa8+UWsGCwCdeBGv/TVug1Byz0OUG0PxX3X5SV # WwubeKyZcqzoH92SQI3jZGSmuGBySy9q51T2k8FjZvaDsPiUN/MLPspNezH1qj2B # W7qEaqIyGmo= # =Q2vV # -----END PGP SIGNATURE----- # gpg: Signature made Tue 05 Jul 2022 03:15:45 PM +0530 # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [undefined] # gpg: aka "Thomas Huth <thuth@redhat.com>" [undefined] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2022-07-05' of https://gitlab.com/thuth/qemu: include/qemu/host-utils: Remove unused code in the *_overflow wrappers meson.build: Require a recent version of libpng po: add ukrainian translation disas: Remove libvixl disassembler tests: use consistent bandwidth/downtime limits in migration tests tests: increase migration test converge downtime to 30 seconds tests: wait for migration completion before looking for STOP event tests: wait max 120 seconds for migration test status changes gitlab-ci: Extend timeout for ubuntu-20.04-s390x-all to 75m gitlab: honour QEMU_CI variable in edk2/opensbi jobs gitlab: tweak comments in edk2/opensbi jobs gitlab: normalize indentation in edk2/opensbi rules tests/fp: Do not build softfloat3 tests if TCG is disabled tests: fix test-cutils leaks Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-05Merge tag 'pull-la-20220705' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson
Loongarch patch queue: Build fix for --enable-debug --enable-tcg-interpreter. Build fix for ls7a_rtc. Clear tlb on reset. Fixes for ipi mailboxes. Minor tweak to scripts/qemu-binfmt-conf. # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmLEGVIdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+SYAgAqMk+GHMT6VQANEsk # So58d9WCPG0XSavowl9oD4w/YSSvPZe5P4KVpJbC3WAgVwEI0RRKTX3RMAeg5z0I # zEEzFUSplSl7cO/7vQG86JRf5C7C/n4V9Q1pQUstNnTEf1s7MdgcG9597OZbV+cF # G5KY1RTQRUr6gpChZQSrv+6j6+aQCA5ZgNwjiVnkBjsNefz1GVFKYppanwHXmMiX # qjxVLgZb1FwOysiKpHKObLsC9pV7ub0QKrlBBk90UyidNjXxcLvV+oQrkyaVwB0m # UM/NN/x5Ive2dqEDfq007TXUc1RpFgwDvKU8EffavBYxx8hCed3DysroiYN+v2MK # qoYWmg== # =+zUy # -----END PGP SIGNATURE----- # gpg: Signature made Tue 05 Jul 2022 04:28:26 PM +0530 # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-la-20220705' of https://gitlab.com/rth7680/qemu: hw/intc/loongarch_ipi: Fix mail send and any send function hw/intc/loongarch_ipi: Fix ipi device access of 64bits tcg/tci: Remove CONFIG_DEBUG_TCG_INTERPRETER scripts/qemu-binfmt-conf: Add LoongArch to qemu_get_family() target/loongarch: Clean up tlb when cpu reset hw/rtc/ls7a_rtc: Drop unused inline functions Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-05hw/intc/loongarch_ipi: Fix mail send and any send functionXiaojuan Yang
By the document of ipi mailsend device, byte is written only when the mask bit is 0. The original code discards mask bit and overwrite the data always, this patch fixes the issue. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220705064901.2353349-3-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-05hw/intc/loongarch_ipi: Fix ipi device access of 64bitsXiaojuan Yang
In general loongarch ipi device, 32bit registers is emulated, however for anysend/mailsend device only 64bit register access is supported. So separate the ipi memory region into two regions, including 32 bits and 64 bits. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220705064901.2353349-2-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-05tcg/tci: Remove CONFIG_DEBUG_TCG_INTERPRETERRichard Henderson
There is nothing in this environment variable that cannot be done better with -d flags. There is nothing special about TCI that warrants this hack. Moreover, it does not compile -- remove it. Reported-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-05scripts/qemu-binfmt-conf: Add LoongArch to qemu_get_family()Song Gao
qemu_get_family() needs to add LoongArch support. Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220705065943.2353930-1-gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-05target/loongarch: Clean up tlb when cpu resetSong Gao
We should make sure that tlb is clean when cpu reset. Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220705070950.2364243-1-gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-05hw/rtc/ls7a_rtc: Drop unused inline functionsRichard Henderson
Remove toy_val_to_time_mon and toy_val_to_time_year as unused, to avoid a build failure with clang. Remove all of the other inline markers too so that this does not creep back in. Reviewed-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-05include/qemu/host-utils: Remove unused code in the *_overflow wrappersThomas Huth
According to commit cec07c0b612975 the code in the #else paths was required for GCC < 5.0 and Clang < 3.8. We don't support such old compilers at all anymore, so we can remove these lines now. We keep the wrapper function, though, since they are easier to read and help to make sure that the parameters have the right types. Message-Id: <20220701025132.303469-1-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-05meson.build: Require a recent version of libpngThomas Huth
According to https://gitlab.com/qemu-project/qemu/-/issues/1080#note_998088246 QEMU does not compile with older versions of libpng, so we should check for a good version in meson.build. According to repology.org, our supported host target operating systems ship these versions: Fedora 35: 1.6.37 CentOS 8 (RHEL-8): 1.6.34 Debian 11: 1.6.37 OpenSUSE Leap 15.3: 1.6.34 Ubuntu LTS 20.04: 1.6.37 FreeBSD Ports: 1.6.37 NetBSD pkgsrc: 1.6.37 OpenBSD Ports: 1.6.37 Homebrew: 1.6.37 MSYS2 mingw: 1.6.37 So it seem reasonable to require at least libpng version 1.6.34 for our builds. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1080 Message-Id: <20220623174941.531196-1-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-05po: add ukrainian translationAndrij Mizyk
Signed-off-by: Andrij Mizyk <andmizyk@gmail.com> Message-Id: <20220613123758.13280-1-andmizyk@gmail.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-05disas: Remove libvixl disassemblerThomas Huth
The disassembly via capstone should be superiour to our old vixl sources nowadays, so let's finally cut this old disassembler out of the QEMU source tree. Message-Id: <20220603164249.112459-1-thuth@redhat.com> Tested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-05tests: use consistent bandwidth/downtime limits in migration testsDaniel P. Berrangé
The different migration test cases are using a variety of settings to ensure convergance/non-convergance. Introduce two helpers to extra the common functionality and ensure consistency. * Non-convergance: 1ms downtime, 30mbs bandwidth * Convergance: 30s downtime, 1gbs bandwidth Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20220628105434.295905-5-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-05tests: increase migration test converge downtime to 30 secondsDaniel P. Berrangé
While 1 second might be enough to converge migration on a fast host, this is not guaranteed, especially if using TLS in the tests without hardware accelerated crypto available. Increasing the downtime to 30 seconds should guarantee it can converge in any sane scenario. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220628105434.295905-4-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-05tests: wait for migration completion before looking for STOP eventDaniel P. Berrangé
When moving into the convergance phase, the precopy tests will first look for a STOP event and once found will look for migration completion status. If the test VM is not converging, the test suite will be waiting for the STOP event forever. If we wait for the migration completion status first, then we will trigger the previously added timeout and prevent the test hanging forever. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220628105434.295905-3-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-05tests: wait max 120 seconds for migration test status changesDaniel P. Berrangé
Currently the wait_for_migration_fail and wait_for_migration_complete functions will spin in an infinite loop checking query-migrate status to detect a specific change/goal. This is fine when everything goes to plan, but when the unusual happens, these will hang the test suite forever. Any normally executing migration test case normally takes < 1 second for a state change, with exception of the autoconverge test which takes about 5 seconds. Taking into account possibility of people running tests inside TCG, allowing a factor of x20 slowdown gives a reasonable worst case of 120 seconds. Anything taking longer than this is a strong sign that the test has hung, or the test should be rewritten to be faster. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220628105434.295905-2-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-05gitlab-ci: Extend timeout for ubuntu-20.04-s390x-all to 75mRichard Henderson
Recent runs have been taking just over the 60m default. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606182436.410053-1-richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-05gitlab: honour QEMU_CI variable in edk2/opensbi jobsDaniel P. Berrangé
To preserve contributor CI credits we don't want jobs to run by default unless the QEMU_CI variable is set. For most jobs we can achieve this using the base template, but the edk2/opensbi jobs are a little special as they have some complex conditions we can't easily model in the base template. We duplicate existing rules and put them under control of QEMU_CI variable, such that QEMU_CI=1 creates manual jobs and QEMU_CI=2 immediately runs jobs. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20220629170638.520630-4-berrange@redhat.com> [thuth: Fixed "on_success" <-> "manual" copy-n-paste bug] Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-05gitlab: tweak comments in edk2/opensbi jobsDaniel P. Berrangé
Get rid of comments stating the obvious and re-arrange remaining comments. The opensbi split of rules for file matches is also merged into one rule. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220629170638.520630-3-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-05gitlab: normalize indentation in edk2/opensbi rulesDaniel P. Berrangé
The edk2/opensbi gitlab CI config was using single space indents which is not consistent with the rest of the gitlab CI config files. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220629170638.520630-2-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-05tests/fp: Do not build softfloat3 tests if TCG is disabledPhilippe Mathieu-Daudé
Technically we don't need the TCG accelerator to run the softfloat3 tests. However it is unlikely an interesting build combination. Developers using softfloat3 likely use TCG too. Similarly, developers disabling TCG shouldn't mind much about softfloat3 tests. This reduces a non-TCG build by 474 objects! Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220204152924.6253-3-f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-04tests: fix test-cutils leaksMarc-André Lureau
Reported by ASAN. Fixes commit cfb34489 ("cutils: add functions for IEC and SI prefixes"). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220621083420.66365-1-marcandre.lureau@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-04Merge tag 'pull-la-20220704' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson
LoongArch patch queue: Support linux-user. Fixes for CSR BADV. Fix ASRT{LE,GT} exception. Fixes for LS7A RTC. Fix for interrupt vector spacing. # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmLCs4gdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV89IQgAsgGM117dgDlI48wP # zRVRE9rmK9EE/YR8b4rejh5iFlH0kZTELWAaXmjxWSv9uyXwsApNdnxnthUH1CRD # RbT8AOIUphH6MBMb2joy+zFyBkGBnJQbSxJWN0jDT/ie67I/O0qOIemXU9tETssn # OLNCn+GuNFLiS8EytczkZHDmQjjt00PGZLsnCm+ZY+/ejNci0FV0NItBo6iWxDdj # 8MPJU8pDkXyi+djJpExPc0hTxJ2qmH0FZtpjKwWnU8dbLSRD9IfYhFK5Tsh1oxYJ # 9Er9ZS0RI2CqK3o2k7keYsJHMaIZbNZKhcoA3XiGs15T9YHe1Rc9FeYDasrQw4wQ # 60FwkA== # =i2CR # -----END PGP SIGNATURE----- # gpg: Signature made Mon 04 Jul 2022 03:01:52 PM +0530 # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-la-20220704' of https://gitlab.com/rth7680/qemu: (23 commits) target/loongarch: Add lock when writing timer clear reg target/loongarch: Fix the meaning of ECFG reg's VS field hw/rtc/ls7a_rtc: Fix 'calculate' spelling errors hw/rtc/ls7a_rtc: Use tm struct pointer as arguments in toy_time_to_val() hw/rtc/ls7a_rtc: Fix rtc enable and disable function hw/rtc/ls7a_rtc: Add reset function hw/rtc/ls7a_rtc: Remove unimplemented device in realized function hw/rtc/ls7a_rtc: Fix timer call back function hw/rtc/ls7a_rtc: Fix uninitialied bugs and toymatch writing function hw/intc/loongarch_pch_msi: Fix msi vector convertion target/loongarch: Update README default-configs: Add loongarch linux-user support target/loongarch: Adjust functions and structure to support user-mode target/loongarch: remove unused include hw/loader.h target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong exception target/loongarch: Fix missing update CSR_BADV target/loongarch: remove badaddr from CPULoongArch scripts: add loongarch64 binfmt config linux-user: Add LoongArch cpu_loop support linux-user: Add LoongArch syscall support ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04Merge tag 'kraxel-20220704-pull-request' of https://gitlab.com/kraxel/qemu ↵Richard Henderson
into staging usb: canokey fixes. ui: better tab labels, cocoa fix, docs: convert fw_cfg to rst. # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEoDKM/7k6F6eZAf59TLbY7tPocTgFAmLCndwACgkQTLbY7tPo # cTjNHA/+MT56crVXnjMTdgBRLOuq0cxYnIUptN0JPKx9DTJzdlXEyT+zYD7iIzUt # W0xbOrTLVzU9hfJVh9/5V2HuFmc1eAhfl0BDTzd1TT0kdH6LyUkz5RWgotzo3nvH # 7tnl/sBy48a7diSyQn6K2s8r35ubrX1GNJiJcCLWdVEqvzKKWDEqebs02PxbN/OJ # 9UG9xtkM/QQ1+h74jq5BGKXf08xOhOZIjO274Sn5zievBC9JU6RVkCOlUXiBdk51 # +vNTfKt3c864cstryXSTknYWyVv7zKzCqr7xR7c+fgbt3cN/HmLkM9LGytDMEDl/ # IC0CtKiRN316GgVHHMDT8v8X2dVHNH9ZEEoXRKIbc5jD/tetJw7IIEO7blJphdpV # WE4/bRpJwYVW9UHzig9rPRxsHLs3NSZbNCQEbGUvAbZzS2kq9hnDa/BBtFSYaf+X # RIwR7rY7WhENfSrus1jR5rfWRU7n+q+fcNIFZetUakH1V6Idb0xQir3eM/yM6sBC # nzQSzzLsd3Mwh2ahbnLZ1HkyybZV692usVylKsFLVwcUhCvk+VHccOF31QfrxO/j # ogVzTYYtfrGM5kaknueIMg7XAhjQ04Av70+0b886kZawB3ZE5Ccare2TztHq1jcG # dMdEm7DLaDRm2RXa9NtcbxsIrS0DT2EuFcBnQ1mHMCGql4MidzE= # =Bhbw # -----END PGP SIGNATURE----- # gpg: Signature made Mon 04 Jul 2022 01:29:24 PM +0530 # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [undefined] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [undefined] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * tag 'kraxel-20220704-pull-request' of https://gitlab.com/kraxel/qemu: hw: canokey: Remove HS support as not compliant to the spec docs/system/devices/usb/canokey: remove limitations on qemu-xhci hw/usb/canokey: fix compatibility of qemu-xhci hw/usb/canokey: Fix CCID ZLP ui/cocoa: Fix clipboard text release ui/console: allow display device to be labeled with given id Convert fw_cfg.rst to reStructuredText syntax Rename docs/specs/fw_cfg.txt to .rst Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04target/loongarch: Add lock when writing timer clear regXiaojuan Yang
There is such error info when running linux kernel: tcg_handle_interrupt: assertion failed: (qemu_mutex_iothread_locked()). calling stack: #0 in raise () at /lib64/libc.so.6 #1 in abort () at /lib64/libc.so.6 #2 in g_assertion_message_expr.cold () at /lib64/libglib-2.0.so.0 #3 in g_assertion_message_expr () at /lib64/libglib-2.0.so.0 #4 in tcg_handle_interrupt (cpu=0x632000030800, mask=2) at ../accel/tcg/tcg-accel-ops.c:79 #5 in cpu_interrupt (cpu=0x632000030800, mask=2) at ../softmmu/cpus.c:248 #6 in loongarch_cpu_set_irq (opaque=0x632000030800, irq=11, level=0) at ../target/loongarch/cpu.c:100 #7 in helper_csrwr_ticlr (env=0x632000039440, val=1) at ../target/loongarch/csr_helper.c:85 #8 in code_gen_buffer () #9 in cpu_tb_exec (cpu=0x632000030800, itb=0x7fff946ac280, tb_exit=0x7ffe4fcb6c30) at ../accel/tcg/cpu-exec.c:358 Add mutex iothread lock around loongarch_cpu_set_irq in csrwr_ticlr() to fix the bug. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220701093407.2150607-10-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04target/loongarch: Fix the meaning of ECFG reg's VS fieldXiaojuan Yang
By the manual of LoongArch CSR, the VS field(18:16 bits) of ECFG reg means that the number of instructions between each exception entry is 2^VS. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220701093407.2150607-9-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04hw/rtc/ls7a_rtc: Fix 'calculate' spelling errorsXiaojuan Yang
Fix 'calculate' spelling errors. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220701093407.2150607-8-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04hw/rtc/ls7a_rtc: Use tm struct pointer as arguments in toy_time_to_val()Xiaojuan Yang
Use pointer as arguments in toy_time_to_val() instead of struct tm. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220701093407.2150607-7-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04hw/rtc/ls7a_rtc: Fix rtc enable and disable functionXiaojuan Yang
Fix ls7a rtc enable and disable function. When rtc disabled, it do not support to read or write, but the real time is still continue, so we need not neither save the time nor update the rtc offset. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220701093407.2150607-6-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04hw/rtc/ls7a_rtc: Add reset functionXiaojuan Yang
Add ls7a rtc reset function to delete timers and clear regs when rtc reset. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220701093407.2150607-5-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04hw/rtc/ls7a_rtc: Remove unimplemented device in realized functionXiaojuan Yang
Remove the unimplemented device when realized ls7a RTC, as it is not uesd. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220701093407.2150607-4-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04hw/rtc/ls7a_rtc: Fix timer call back functionXiaojuan Yang
Replace qemu_irq_pulse with qemu_irq_raise in ls7a_timer_cb function to keep consistent with hardware behavior when raise irq. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220701093407.2150607-3-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04hw/rtc/ls7a_rtc: Fix uninitialied bugs and toymatch writing functionXiaojuan Yang
1. Initialize the tm struct in toymatch_write() and ls7a_toy_start() to fix uninitialized bugs. 2. Fix toymatch_val_to_time function. By the document, when we calculate the expiration year, we should first get current year, and replace the 0-5 bits with toymatch's 26-31 bits. Fixes: Coverity CID 1489766, 1489763 Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220701093407.2150607-2-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04hw/intc/loongarch_pch_msi: Fix msi vector convertionMao Bibo
Loongarch pch msi intc connects to extioi controller, the range of irq number is 64-255. Add a property for irqbase, so that we can compute the irq offset from the view of pch_msi controller with the method: msi vector (from view of upper extioi intc) - irqbase Signed-off-by: Mao Bibo <maobibo@loongson.cn> Message-Id: <20220701030740.2469162-1-maobibo@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04target/loongarch: Update READMESong Gao
Add linux-user emulation introduction Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220624031049.1716097-14-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04default-configs: Add loongarch linux-user supportSong Gao
This patch adds loongarch64 linux-user default configs file. Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: WANG Xuerui <git@xen0n.name> Message-Id: <20220624031049.1716097-13-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04target/loongarch: Adjust functions and structure to support user-modeSong Gao
Some functions and member of the structure are different with softmmu-mode So we need adjust them to support user-mode. Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220624031049.1716097-12-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04target/loongarch: remove unused include hw/loader.hSong Gao
Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220624031049.1716097-11-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong exceptionSong Gao
Raise EXCCODE_BCE instead of EXCCODE_ADEM for helper_asrtle_d/asrtgt_d. Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220624031049.1716097-10-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04target/loongarch: Fix missing update CSR_BADVSong Gao
loongarch_cpu_do_interrupt() should update CSR_BADV for some EXCCODE. Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220624031049.1716097-9-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04target/loongarch: remove badaddr from CPULoongArchSong Gao
We can use CSR_BADV to replace badaddr. Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220624031049.1716097-8-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04scripts: add loongarch64 binfmt configSong Gao
Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220624031049.1716097-7-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04linux-user: Add LoongArch cpu_loop supportSong Gao
Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220624031049.1716097-6-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04linux-user: Add LoongArch syscall supportSong Gao
Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220624031049.1716097-5-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04linux-user: Add LoongArch elf supportSong Gao
Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220624031049.1716097-4-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04linux-user: Add LoongArch signal supportSong Gao
Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220624031049.1716097-3-gaosong@loongson.cn> [rth: Rework extctx frame allocation and locking; Properly read/write fcc from signal frame.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-04linux-user: Add LoongArch generic header filesSong Gao
This includes: - sockbits.h - target_errno_defs.h - target_fcntl.h - termbits.h - target_resource.h - target_structs.h Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: WANG Xuerui <git@xen0n.name> Message-Id: <20220624031049.1716097-2-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-03Merge tag 'pull-riscv-to-apply-20220703-1' of github.com:alistair23/qemu ↵Richard Henderson
into staging Fifth RISC-V PR for QEMU 7.1 * Fix register zero guarding for auipc and lui * Ensure bins (mtval) is set correctly * Minimize the calls to decode_save_opc * Guard against PMP ranges with a negative size * Implement mcountinhibit CSR * Add support for hpmcounters/hpmevents * Improve PMU implenentation * Support mcycle/minstret write operation * Fixup MSECCFG minimum priv check * Ibex (OpenTitan) fixup priv version * Fix bug resulting in always using latest priv spec * Reduce FDT address alignment constraints * Set minumum priv spec version for mcountinhibit * AIA update to v0.3 of the spec # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEE9sSsRtSTSGjTuM6PIeENKd+XcFQFAmLA3r8ACgkQIeENKd+X # cFQdFQf6A63mocJxSc0vqMTBNULwgcUKbRbnkazbFS4vtbo/YXioCGaHA8c8trKj # HbZfJv64phOThj7Y8ifLozENjnHX7dHbspPOcWIK9yalvKLA4EB4+OI7LisoL1vg # H4E+9nXSzskaCmJgwSM6WlS0Vf89VxL0CoBb3XqJocSaajstg1XpqrR9anTZlUhl # N712cLze+bOxBHTdjtC5Kxuxj+zmNvcMmuhldIJRdPCW8P5v2yccNVc6+hrE3WUX # 9jHGMthS4qC5oVhok14/tPoyL0QTZpU2DXrJPFGUigOvUHoMBfQ3Qhulx3/rGLZv # 4SdTD9ASrNWJfa+eyHAPNw//5NxTYA== # =N7VN # -----END PGP SIGNATURE----- # gpg: Signature made Sun 03 Jul 2022 05:41:43 AM +0530 # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * tag 'pull-riscv-to-apply-20220703-1' of github.com:alistair23/qemu: target/riscv: Update default priority table for local interrupts target/riscv: Remove CSRs that set/clear an IMSIC interrupt file bits target/riscv: Set minumum priv spec version for mcountinhibit hw/riscv: boot: Reduce FDT address alignment constraints target/riscv: Don't force update priv spec version to latest target/riscv: Ibex: Support priv version 1.11 target/riscv: Fixup MSECCFG minimum priv check target/riscv: Support mcycle/minstret write operation target/riscv: Add support for hpmcounters/hpmevents target/riscv: Implement mcountinhibit CSR target/riscv: pmu: Make number of counters configurable target/riscv: pmu: Rename the counters extension to pmu target/riscv: Implement PMU CSR predicate function for S-mode target/riscv: Fix PMU CSR predicate function target/riscv/pmp: guard against PMP ranges with a negative size target/riscv: Minimize the calls to decode_save_opc target/riscv: Remove generate_exception_mtval target/riscv: Set env->bins in gen_exception_illegal target/riscv: Remove condition guarding register zero for auipc and lui Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-03target/riscv: Update default priority table for local interruptsAnup Patel
The latest AIA draft v0.3.0 defines a relatively simpler scheme for default priority assignments where: 1) local interrupts 24 to 31 and 48 to 63 are reserved for custom use and have implementation specific default priority. 2) remaining local interrupts 0 to 23 and 32 to 47 have a recommended (not mandatory) priority assignments. We update the default priority table and hviprio mapping as-per above. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220616031543.953776-3-apatel@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-07-03target/riscv: Remove CSRs that set/clear an IMSIC interrupt file bitsAnup Patel
Based on architecture review committee feedback, the [m|s|vs]seteienum, [m|s|vs]clreienum, [m|s|vs]seteipnum, and [m|s|vs]clreipnum CSRs are removed in the latest AIA draft v0.3.0 specification. (Refer, https://github.com/riscv/riscv-aia/releases/tag/0.3.0-draft.31) These CSRs were mostly for software convenience and software can always use [m|s|vs]iselect and [m|s|vs]ireg CSRs to update the IMSIC interrupt file bits. We update the IMSIC CSR emulation as-per above to match the latest AIA draft specification. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220616031543.953776-2-apatel@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-14 05:13:12 +0000