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2023-02-07include/hw/riscv/opentitan: update opentitan IRQsWilfred Mallawa
Updates the opentitan IRQs to match the latest supported commit of Opentitan from TockOS. OPENTITAN_SUPPORTED_SHA := 565e4af39760a123c59a184aa2f5812a961fde47 Memory layout as per [1] [1] https://github.com/lowRISC/opentitan/blob/565e4af39760a123c59a184aa2f5812a961fde47/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230123063619.222459-1-wilfred.mallawa@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-07target/riscv: update disas.c for xnor/orn/andn and slli.uwPhilipp Tomsich
The decoding of the following instructions from Zb[abcs] currently contains decoding/printing errors: * xnor,orn,andn: the rs2 operand is not being printed * slli.uw: decodes and prints the immediate shift-amount as a register (e.g. 'shift-by-2' becomes 'sp') instead of interpreting this as an immediate This commit updates the instruction descriptions to use the appropriate decoding/printing formats. Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230120151551.1022761-1-philipp.tomsich@vrull.eu> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-05Merge tag 'pull-ppc-20230205' of https://gitlab.com/danielhb/qemu into stagingPeter Maydell
ppc patch queue for 2023-02-05: This queue includes patches that aren't PPC specific but benefit/impact PPC machines, such as the changes to guestperf.py, mv64361 and sm501. As for PPC specific changes we have e500 and PNV_PHB5 fixes. # -----BEGIN PGP SIGNATURE----- # # iIwEABYKADQWIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCY99+yRYcZGFuaWVsaGI0 # MTNAZ21haWwuY29tAAoJEDzZypbeAzFkOQsA/1UxMHen/3tW908shrRMwS7WSzDa # 4x0tU4L+bMpEfgVJAQDeKIyIbdajtv4v2XfZyQ9flfUo64cY0xze+T+SDW+fBw== # =eB7g # -----END PGP SIGNATURE----- # gpg: Signature made Sun 05 Feb 2023 10:02:49 GMT # gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164 # gpg: issuer "danielhb413@gmail.com" # gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164 * tag 'pull-ppc-20230205' of https://gitlab.com/danielhb/qemu: hw/display/sm501: Code style fix hw/display/sm501: Remove unneeded casts from void pointer hw/display/sm501: Remove parenthesis around constant macro definitions hw/ppc/pegasos2: Fix a typo in a comment ppc/pnv/pci: Fix PHB xscom registers memory region name ppc/pnv/pci: Update PHB5 version register ppc/pnv/pci: Remove duplicate definition of PNV_PHB5_DEVICE_ID ppc/pnv/pci: Cleanup PnvPHBPecState structure hw/ppc/e500.c: Attach eSDHC unimplemented region to ccsr_addr_space hw/ppc/e500.c: Avoid hardcoding parent device in create_devtree_etsec() hw/ppc/e500{, plat}: Drop redundant checks for presence of platform bus hw/ppc: Set machine->fdt in e500 machines hw/pci-host/mv64361: Reuse pci_swizzle_map_irq_fn ppc/pegasos2: Improve readability of VIA south bridge creation tests/migration: add support for ppc64le for guestperf.py tests/migration: add sysprof-capture-4 as dependency for stress binary Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-05hw/display/sm501: Code style fixBALATON Zoltan
Fix checkpatch warning about multi-line comment. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <8801292992a304609e1eac680fe36b515592b926.1674333199.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/display/sm501: Remove unneeded casts from void pointerBALATON Zoltan
This is not needed in C. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <58f599387dd0739ea1880bfb678872c0be26bf1b.1674333199.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/display/sm501: Remove parenthesis around constant macro definitionsBALATON Zoltan
No need to wrap constants in parenthesis. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <9194546b73b05e7098761ec62b2dfd0699b97b65.1674333199.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/ppc/pegasos2: Fix a typo in a commentBALATON Zoltan
Reported-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230203194312.33834745712@zero.eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05ppc/pnv/pci: Fix PHB xscom registers memory region nameFrederic Barrat
The name is for the region mapping the PHB xscom registers. It was apparently a bad cut-and-paste from the per-stack pci xscom area just above, so we had two regions with the same name. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20230127122848.550083-5-fbarrat@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05ppc/pnv/pci: Update PHB5 version registerFrederic Barrat
Update register value per its P10 DD2 definition. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20230127122848.550083-4-fbarrat@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05ppc/pnv/pci: Remove duplicate definition of PNV_PHB5_DEVICE_IDFrederic Barrat
PNV_PHB5_DEVICE_ID is defined in two different headers. The definition in hw/pci-host/pnv_phb4.h was left out in a previous rework. Remaining definition is in hw/pci-host/pnv_phb.h. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20230127122848.550083-3-fbarrat@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05ppc/pnv/pci: Cleanup PnvPHBPecState structureFrederic Barrat
Remove unused structure member 'system_memory'. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20230127122848.550083-2-fbarrat@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/ppc/e500.c: Attach eSDHC unimplemented region to ccsr_addr_spaceBernhard Beschow
Makes the unimplemented region move together with the CCSR address space if moved by a bootloader. Moving the CCSR address space isn't implemented yet but this patch is a preparation for it. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230125130024.158721-5-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/ppc/e500.c: Avoid hardcoding parent device in create_devtree_etsec()Bernhard Beschow
The "platform" node is available through data->node, so use that instead of making assumptions about the parent device. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20230125130024.158721-4-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/ppc/e500{, plat}: Drop redundant checks for presence of platform busBernhard Beschow
This is a follow-up on commit 47a0b1dff7e9 'hw/ppc/mpc8544ds: Add platform bus': Both mpc85xx boards now have a platform bus unconditionally. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20230125130024.158721-3-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/ppc: Set machine->fdt in e500 machinesBernhard Beschow
This enables support for the 'dumpdtb' QMP/HMP command for all e500 machines. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20230125130024.158721-2-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05hw/pci-host/mv64361: Reuse pci_swizzle_map_irq_fnBernhard Beschow
mv64361_pcihost_map_irq() is a reimplementation of pci_swizzle_map_irq_fn(). Resolve this redundancy. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <20230106113927.8603-1-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05ppc/pegasos2: Improve readability of VIA south bridge creationBALATON Zoltan
Slightly improve readability of creating the south btidge by cnamging type of a local variable to avoid some casts within function arguments which makes some lines shorter and easier to read. Also remove an unneded line break. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230117214545.5E191746369@zero.eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05tests/migration: add support for ppc64le for guestperf.pyMurilo Opsfelder Araujo
Add support for ppc64le for guestperf.py. On ppc, console is usually hvc0 and serial device for pseries machine is spapr-vty. Signed-off-by: Murilo Opsfelder Araujo <muriloo@linux.ibm.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20220809002451.91541-3-muriloo@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-05tests/migration: add sysprof-capture-4 as dependency for stress binaryMurilo Opsfelder Araujo
`make tests/migration/stress` fails with: FAILED: tests/migration/stress cc -m64 -mlittle-endian -o tests/migration/stress tests/migration/stress.p/stress.c.o -Wl,--as-needed -Wl,--no-undefined -pie -Wl,--warn-common -Wl,-z,relro -Wl,-z,now -fstack-protector-strong -static -pthread -Wl,--start-group -lgthread-2.0 -lglib-2.0 -Wl,--end-group /usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gutils.c.o): in function `.annobin_gutils.c': (.text+0x3b4): warning: Using 'getpwuid' in statically linked applications requires at runtime the shared libraries from the glibc version used for linking /usr/bin/ld: (.text+0x178): warning: Using 'getpwnam_r' in statically linked applications requires at runtime the shared libraries from the glibc version used for linking /usr/bin/ld: (.text+0x1bc): warning: Using 'getpwuid_r' in statically linked applications requires at runtime the shared libraries from the glibc version used for linking /usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gthread.c.o):(.toc+0x0): undefined reference to `sysprof_clock' /usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gtrace.c.o): in function `.annobin_gtrace.c': (.text+0x24): undefined reference to `sysprof_collector_mark_vprintf' /usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gtrace.c.o): in function `g_trace_define_int64_counter': (.text+0x8c): undefined reference to `sysprof_collector_request_counters' /usr/bin/ld: (.text+0x108): undefined reference to `sysprof_collector_define_counters' /usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gtrace.c.o): in function `g_trace_set_int64_counter': (.text+0x23c): undefined reference to `sysprof_collector_set_counters' /usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gspawn.c.o):(.toc+0x0): undefined reference to `sysprof_clock' /usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gmain.c.o):(.toc+0x0): undefined reference to `sysprof_clock' collect2: error: ld returned 1 exit status ninja: build stopped: subcommand failed. make: *** [Makefile:162: run-ninja] Error 1 Add sysprof-capture-4 as dependency for stress binary. Tested on: - CentOS Stream 9 ppc64le - Fedora 36 x86_64 Signed-off-by: Murilo Opsfelder Araujo <muriloo@linux.ibm.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20220809002451.91541-2-muriloo@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-02-04Merge tag 'pull-tcg-20230204' of https://gitlab.com/rth7680/qemu into stagingPeter Maydell
tcg: Add support for TCGv_i128 in parameters and returns. tcg: Add support for TCGv_i128 in cmpxchg. tcg: Test CPUJumpCache in tb_jmp_cache_clear_page tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32,64} tcg/aarch64: Fix patching of LDR in tb_target_set_jmp_target target/arm: Use tcg_gen_atomic_cmpxchg_i128 target/i386: Use tcg_gen_atomic_cmpxchg_i128 target/i386: Use tcg_gen_nonatomic_cmpxchg_i{32,64} target/s390x: Use tcg_gen_atomic_cmpxchg_i128 target/s390x: Use TCGv_i128 in passing and returning float128 target/s390x: Implement CC_OP_NZ in gen_op_calc_cc # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmPeiDYdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+hFQf+K1MkEK1wtpjnqrYD # 4l36Uo3B7w8Yi6FxbCx9NP78dJNNTjTn0zqhtISRKSzI7TGUCGnmQs40iqYrRe5S # 9x6LJgTJplI2dsANvtsTaWB5gNzhowPt5tlit+J6Q0POwvvwcBZAOumY8AYt1YP+ # dMsjBLw6HFaqSCU5IERZrB4kBwl61VTkTAtHL2utSZpdsOYoc3y2hzbJ/w3kLK2u # YXnMvom+Gc1rvQTaSMgiPYFITyx/VtXDe+JQwNikpu7Na+RFjtu7cHmg/BtZFo6s # 15AsAS8JlENKAunpJiX41UR7SxB8MdyQL5LyjVNWo5F7+YgQuuO1gqYKt6qUwd+A # oH2uBA== # =xjMy # -----END PGP SIGNATURE----- # gpg: Signature made Sat 04 Feb 2023 16:30:46 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20230204' of https://gitlab.com/rth7680/qemu: (40 commits) tcg/aarch64: Fix patching of LDR in tb_target_set_jmp_target target/i386: Inline cmpxchg16b target/i386: Inline cmpxchg8b target/i386: Split out gen_cmpxchg8b, gen_cmpxchg16b target/s390x: Implement CC_OP_NZ in gen_op_calc_cc target/s390x: Use tcg_gen_atomic_cmpxchg_i128 for CDSG target/s390x: Use Int128 for passing float128 target/s390x: Use Int128 for returning float128 target/s390x: Copy wout_x1 to wout_x1_P target/s390x: Use Int128 for return from TRE target/s390x: Use Int128 for return from CKSM target/s390x: Use Int128 for return from CLST target/s390x: Use a single return for helper_divs64/u64 target/s390x: Use a single return for helper_divs32/u32 tests/tcg/s390x: Add cdsg.c tests/tcg/s390x: Add long-double.c tests/tcg/s390x: Add clst.c tests/tcg/s390x: Add div.c target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCX target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASP ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-04Merge tag 'linux-user-for-8.0-pull-request' of ↵Peter Maydell
https://gitlab.com/laurent_vivier/qemu into staging linux-user branch pull request 20230204 Implement execveat() un-parent OBJECT(cpu) when closing thread Revert fix for glibc >= 2.36 sys/mount.h Fix/update strace move target_flat.h to target subdirs Fix SO_ERROR return code of getsockopt() Fix /proc/cpuinfo output for hppa Add emulation for MADV_WIPEONFORK and MADV_KEEPONFORK in madvise() Implement SOL_ALG encryption support linux-user: Allow sendmsg() without IOV # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmPeguUSHGxhdXJlbnRA # dml2aWVyLmV1AAoJEPMMOL0/L748tnQP/1A4eu33pLe4+tjBuDGt2zcGAVuz+wN9 # rcwN5BQgjILwfECfRsy9QIkC8+M496tLk4W7pNkW9x/GSpzBp9x0+066uUghsa1Q # c0bFU0FM8xpywEXvOrz3LvEWaWqeBV/R+XYMqKFaiBQXf/5kmmteei9guH42L3gV # a+d0s1cWT48TslTaga9ECbiPD9lK+yfW879+wRhex1/BetkJPzLU1hZB4vfC5YQo # XagcmLWiseT4U8uCysikOgKQE4g2bv1oJXUuYjBxW15s5/llg8e57dEboO7MFEPK # a9P3Hl1qiA5Ol3scF1I7WURmGP6UVfdhTYe1aKYHhKY7QVBVjbU7r/NkdQ3dR6Nv # db58Lkurnrf5dMksZk8+25F/fvJT0nZpnbipunZejetNjrDVPk19XK5E6kJf91hk # 3W3vOeWMp4QjThpqghnlQ3gm2XfVmCGSMIOywTKZ4/M/TP28+9zY7GZqQXQXCBMy # nJFahfVTCfiYaGAYGjlMe5CMOQ6tJ6lwxuTCl9O1X565ifMBNUj3rcte1FvO/i24 # Rk0/lQVO+tD9ImxHJrei0Y2C0xzo7V8kaB9+foAf6Ku91SY1X1FIOm81DEyAhK61 # Biv2zlNwUV0aCierrn3oLuDkviVaAg6FkLO9snPG+lQy2uxgyJJ2/Pv0OCZhniWI # 9WifjYZKAXDa # =AcC6 # -----END PGP SIGNATURE----- # gpg: Signature made Sat 04 Feb 2023 16:08:05 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * tag 'linux-user-for-8.0-pull-request' of https://gitlab.com/laurent_vivier/qemu: (22 commits) linux-user: Allow sendmsg() without IOV linux-user: Implement SOL_ALG encryption support linux-user: Enhance strace output for various syscalls linux-user: Show 4th argument of rt_sigprocmask() in strace linux-user: Add emulation for MADV_WIPEONFORK and MADV_KEEPONFORK in madvise() linux-user: Improve strace output of personality() and sysinfo() linux-user: Fix /proc/cpuinfo output for hppa linux-user: Fix SO_ERROR return code of getsockopt() linux-user: move target_flat.h to target subdirs linux-user: Improve strace output of getgroups() and setgroups() linux-user: Add strace output for clock_getres_time64() and futex_time64() Revert "linux-user: fix compat with glibc >= 2.36 sys/mount.h" Revert "linux-user: add more compat ioctl definitions" linux-user: add more netlink protocol constants linux-user: fix strace build w/out munlockall linux-user: un-parent OBJECT(cpu) when closing thread linux-user: Add missing MAP_HUGETLB and MAP_STACK flags in strace linux-user/syscall: Implement execveat() linux-user/syscall: Extract do_execve() from do_syscall1() linux-user/strace: Add output for execveat() syscall ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-04tcg/aarch64: Fix patching of LDR in tb_target_set_jmp_targetRichard Henderson
'offset' should be bits [23:5] of LDR instruction, rather than [4:0]. Fixes: d59d83a1c388 ("tcg/aarch64: Reorg goto_tb implementation") Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Reported-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/i386: Inline cmpxchg16bRichard Henderson
Use tcg_gen_atomic_cmpxchg_i128 for the atomic case, and tcg_gen_qemu_ld/st_i128 otherwise. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/i386: Inline cmpxchg8bRichard Henderson
Use tcg_gen_atomic_cmpxchg_i64 for the atomic case, and tcg_gen_nonatomic_cmpxchg_i64 otherwise. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/i386: Split out gen_cmpxchg8b, gen_cmpxchg16bRichard Henderson
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/s390x: Implement CC_OP_NZ in gen_op_calc_ccRichard Henderson
This case is trivial to implement inline. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/s390x: Use tcg_gen_atomic_cmpxchg_i128 for CDSGRichard Henderson
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/s390x: Use Int128 for passing float128Richard Henderson
Acked-by: David Hildenbrand <david@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Fix SPEC_in1_x1.
2023-02-04target/s390x: Use Int128 for returning float128Richard Henderson
Acked-by: David Hildenbrand <david@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Remove extraneous return_low128.
2023-02-04target/s390x: Copy wout_x1 to wout_x1_PRichard Henderson
Make a copy of wout_x1 before modifying it, as wout_x1_P emphasizing that it operates on the out/out2 pair. The insns that use x1_P are data movement that will not change to Int128. Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/s390x: Use Int128 for return from TRERichard Henderson
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/s390x: Use Int128 for return from CKSMRichard Henderson
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/s390x: Use Int128 for return from CLSTRichard Henderson
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/s390x: Use a single return for helper_divs64/u64Richard Henderson
Pack the quotient and remainder into a single Int128. Use the divu128 primitive to remove the cpu_abort on 32-bit hosts. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Extended div test case to cover these insns.
2023-02-04target/s390x: Use a single return for helper_divs32/u32Richard Henderson
Pack the quotient and remainder into a single uint64_t. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Fix operand ordering; use tcg_extr32_i64.
2023-02-04tests/tcg/s390x: Add cdsg.cIlya Leoshkevich
Add a simple test to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20230201133257.3223115-1-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tests/tcg/s390x: Add long-double.cRichard Henderson
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tests/tcg/s390x: Add clst.cIlya Leoshkevich
Add a basic test to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20221025213008.2209006-2-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tests/tcg/s390x: Add div.cIlya Leoshkevich
Add a basic test to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20221101111300.2539919-1-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCXRichard Henderson
Note that the previous direct reference to reserve_val, - tcg_gen_ld_i64(t1, cpu_env, (ctx->le_mode - ? offsetof(CPUPPCState, reserve_val2) - : offsetof(CPUPPCState, reserve_val))); was incorrect because all references should have gone through cpu_reserve_val. Create a cpu_reserve_val2 tcg temp to fix this. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20221112061122.2720163-2-richard.henderson@linaro.org>
2023-02-04target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASPRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20221112042555.2622152-3-richard.henderson@linaro.org>
2023-02-04target/arm: Use tcg_gen_atomic_cmpxchg_i128 for STXPRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20221112042555.2622152-2-richard.henderson@linaro.org>
2023-02-04tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32,64}Richard Henderson
Normally this is automatically handled by the CF_PARALLEL checks with in tcg_gen_atomic_cmpxchg_i{32,64}, but x86 has a special case of !PREFIX_LOCK where it always wants the non-atomic version. Split these out so that x86 does not have to roll its own. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Add tcg_gen_{non}atomic_cmpxchg_i128Richard Henderson
This will allow targets to avoid rolling their own. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Add guest load/store primitives for TCGv_i128Richard Henderson
These are not yet considering atomicity of the 16-byte value; this is a direct replacement for the current target code which uses a pair of 8-byte operations. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Add basic data movement for TCGv_i128Richard Henderson
Add code generation functions for data movement between TCGv_i128 (mov) and to/from TCGv_i64 (concat, extract). Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Add temp allocation for TCGv_i128Richard Henderson
This enables allocation of i128. The type is not yet usable, as we have not yet added data movement ops. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128Richard Henderson
Fill in the parameters for the host ABI for Int128 for those backends which require no extra modification. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg/tci: Add TCG_TARGET_CALL_{RET,ARG}_I128Richard Henderson
Fill in the parameters for libffi for Int128. Adjust the interpreter to allow for 16-byte return values. Adjust tcg_out_call to record the return value length. Call parameters are no longer all the same size, so we cannot reuse the same call_slots array for every function. Compute it each time now, but only fill in slots required for the call we're about to make. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-04tcg/tci: Fix big-endian return register orderingRichard Henderson
We expect the backend to require register pairs in host-endian ordering, thus for big-endian the first register of a pair contains the high part. We were forcing R0 to contain the low part for calls. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-06 14:14:44 +0000