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2021-03-05target/arm: Enable FEAT_SSBS for "max" AARCH64 CPURebecca Cran
Set ID_AA64PFR1_EL1.SSBS to 2 and ID_PFR2.SSBS to 1. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210216224543.16142-3-rebecca@nuviainc.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-05target/arm: Add support for FEAT_SSBS, Speculative Store Bypass SafeRebecca Cran
Add support for FEAT_SSBS. SSBS (Speculative Store Bypass Safe) is an optional feature in ARMv8.0, and mandatory in ARMv8.5. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210216224543.16142-2-rebecca@nuviainc.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-05sbsa-ref: add 'max' to list of allowed cpusMarcin Juszkiewicz
Let add 'max' cpu while work goes on adding newer CPU types than Cortex-A72. This allows us to check SVE etc support. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Acked-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210216150122.3830863-3-marcin.juszkiewicz@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-05sbsa-ref: remove cortex-a53 from list of supported cpusMarcin Juszkiewicz
Cortex-A53 supports 40bits of address space. sbsa-ref's memory starts above this limit. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Leif Lindholm <leif@nuviainc.com> Message-id: 20210216150122.3830863-2-marcin.juszkiewicz@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-05Merge remote-tracking branch ↵Peter Maydell
'remotes/alistair/tags/pull-riscv-to-apply-20210304' into staging RISC-V PR for 6.0 This PR is a collection of RISC-V patches: - Improvements to SiFive U OTP - Upgrade OpenSBI to v0.9 - Support the QMP dump-guest-memory - Add support for the SiFive SPI controller (sifive_u) - Initial RISC-V system documentation - A fix for the Goldfish RTC - MAINTAINERS updates - Support for high PCIe memory in the virt machine # gpg: Signature made Thu 04 Mar 2021 14:44:31 GMT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20210304: hw/riscv: virt: Map high mmio for PCIe hw/riscv: virt: Limit RAM size in a 32-bit system hw/riscv: virt: Drop the 'link_up' parameter of gpex_pcie_init() hw/riscv: Drop 'struct MemmapEntry' MAINTAINERS: Add a SiFive machine section goldfish_rtc: re-arm the alarm after migration docs/system: riscv: Add documentation for sifive_u machine docs/system: Add RISC-V documentation docs/system: Sort targets in alphabetical order hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card hw/riscv: sifive_u: Add QSPI0 controller and connect a flash hw/ssi: Add SiFive SPI controller support hw/block: m25p80: Add various ISSI flash information hw/block: m25p80: Add ISSI SPI flash support target-riscv: support QMP dump-guest-memory roms/opensbi: Upgrade from v0.8 to v0.9 hw/misc: sifive_u_otp: Use error_report() when block operation fails target/riscv: Declare csr_ops[] with a known size Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-04hw/riscv: virt: Map high mmio for PCIeBin Meng
Some peripherals require 64-bit PCI address, so let's map the high mmio space for PCIe. For RV32, the address is hardcoded to below 4 GiB from the highest accessible physical address. For RV64, the base address depends on top of RAM and is aligned to its size which is using 16 GiB for now. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210220144807.819-5-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04hw/riscv: virt: Limit RAM size in a 32-bit systemBin Meng
RV32 supports 34-bit physical address hence the maximum RAM size should be limited. Limit the RAM size to 10 GiB, which leaves some room for PCIe high mmio space. For 32-bit host, this is not needed as machine->ram_size cannot represent a RAM size that big. Use a #if size test to only do the size limitation for the 64-bit host. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210220144807.819-4-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04hw/riscv: virt: Drop the 'link_up' parameter of gpex_pcie_init()Bin Meng
`link_up` is never used in gpex_pcie_init(). Drop it. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210220144807.819-3-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04hw/riscv: Drop 'struct MemmapEntry'Bin Meng
There is already a MemMapEntry type defined in hwaddr.h. Let's drop the RISC-V defined `struct MemmapEntry` and use the existing one. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210220144807.819-2-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04MAINTAINERS: Add a SiFive machine sectionAlistair Francis
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Bin Meng <bin.meng@windriver.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 6bc077e5ae4a9512c8adf81ae194718f2f17c402.1612836645.git.alistair.francis@wdc.com
2021-03-04goldfish_rtc: re-arm the alarm after migrationLaurent Vivier
After a migration the clock offset is updated, but we also need to re-arm the alarm if needed. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201220112615.933036-7-laurent@vivier.eu Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04docs/system: riscv: Add documentation for sifive_u machineBin Meng
This adds detailed documentation for RISC-V `sifive_u` machine, including the following information: - Supported devices - Hardware configuration information - Boot options - Machine-specific options - Running Linux kernel - Running VxWorks kernel - Running U-Boot, and with an alternate configuration Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 20210126060007.12904-10-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04docs/system: Add RISC-V documentationBin Meng
Add RISC-V system emulator documentation for generic information. `Board-specific documentation` and `RISC-V CPU features` are only a placeholder and will be added in the future. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210126060007.12904-9-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04docs/system: Sort targets in alphabetical orderBin Meng
Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210126060007.12904-8-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal valueBin Meng
All other peripherals' IRQs are in the format of decimal value. Change SIFIVE_U_GEM_IRQ to be consistent. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210126060007.12904-7-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04hw/riscv: sifive_u: Add QSPI2 controller and connect an SD cardBin Meng
This adds the QSPI2 controller to the SoC, and connects an SD card to it. The generation of corresponding device tree source fragment is also added. Specify machine property `msel` to 11 to boot the same upstream U-Boot SPL and payload image for the SiFive HiFive Unleashed board. Note subsequent payload is stored in the SD card image. $ qemu-system-riscv64 -nographic -M sifive_u,msel=11 -smp 5 -m 8G \ -bios u-boot-spl.bin -drive file=sdcard.img,if=sd Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210126060007.12904-6-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04hw/riscv: sifive_u: Add QSPI0 controller and connect a flashBin Meng
This adds the QSPI0 controller to the SoC, and connects an ISSI 25WP256 flash to it. The generation of corresponding device tree source fragment is also added. Since the direct memory-mapped mode is not supported by the SiFive SPI model, the <reg> property does not populate the second group which represents the memory mapped address of the SPI flash. With this commit, upstream U-Boot for the SiFive HiFive Unleashed board can boot on QEMU 'sifive_u' out of the box. This allows users to develop and test the recommended RISC-V boot flow with a real world use case: ZSBL (in QEMU) loads U-Boot SPL from SPI flash to L2LIM, then U-Boot SPL loads the payload from SPI flash that is combined with OpenSBI fw_dynamic firmware and U-Boot proper. Specify machine property `msel` to 6 to allow booting from the SPI flash. U-Boot spl is directly loaded via `-bios`, and subsequent payload is stored in the SPI flash image. Example command line: $ qemu-system-riscv64 -nographic -M sifive_u,msel=6 -smp 5 -m 8G \ -bios u-boot-spl.bin -drive file=spi-nor.img,if=mtd Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210126060007.12904-5-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04hw/ssi: Add SiFive SPI controller supportBin Meng
This adds the SiFive SPI controller model for the FU540 SoC. The direct memory-mapped SPI flash mode is unsupported. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210126060007.12904-4-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04hw/block: m25p80: Add various ISSI flash informationBin Meng
This updates the flash information table to include various ISSI flashes that are supported by upstream U-Boot and Linux kernel. Signed-off-by: Bin Meng <bin.meng@windriver.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210126060007.12904-3-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04hw/block: m25p80: Add ISSI SPI flash supportBin Meng
This adds the ISSI SPI flash support. The number of dummy cycles in fast read, fast read dual output and fast read quad output commands is currently using the default 8. Likewise, the same default value is used for fast read dual/quad I/O command. Per the datasheet [1], the number of dummy cycles is configurable, but this is not modeled at present. For flash whose size is larger than 16 MiB, the sequence of 3-byte address along with EXTADD bit in the bank address register (BAR) is not supported. We assume that guest software always uses op codes with 4-byte address sequence. Fortunately, this is the case for both U-Boot and Linux spi-nor drivers. QPI (Quad Peripheral Interface) that supports 2-cycle instruction has different default values for dummy cycles of fast read family commands, and is unsupported at the time being. [1] http://www.issi.com/WW/pdf/25LP-WP256.pdf Signed-off-by: Bin Meng <bin.meng@windriver.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210126060007.12904-2-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04target-riscv: support QMP dump-guest-memoryYifei Jiang
Add the support needed for creating prstatus elf notes. This allows us to use QMP dump-guest-memory. Now ELF notes of RISC-V only contain prstatus elf notes. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Mingwang Li <limingwang@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 20210201124458.1248-2-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04roms/opensbi: Upgrade from v0.8 to v0.9Bin Meng
Upgrade OpenSBI from v0.8 to v0.9 and the pre-built bios images. The v0.9 release includes the following commits: 35bc810 docs/platform: Update QEMU parameter for fw_payload 78afe11 config.mk: Update QEMU run command for generic and sifive fu540 platforms ec3e5b1 docs/platform: sifive_fu540: Update U-Boot instructions 7d61a68 README.md: fix markdown link formatting a5f9104 lib/utils: fdt: Update FDT expand size to 1024 for reserved memory node ec1abf6 include: sbi_bitops: Remove dead shift assignment in ffs/fls 8e47649 lib: Add sbi_strncmp implementation 2845d2d lib: utils: Add a macro in libfdt_env.h for strncmp 2cfd2fc lib: utils: Use strncmp in fdt_parse_hart_id() 937caee lib: sbi_misaligned_ldst: Determine transformed instruction length correctly 4b18a2a firmware: fw_base: Improve exception stack setup in trap handler 9d56961 lib: sbi_trap: Fix hstatus.SPVP update in sbi_trap_redirect() d7f87d9 platform: kendryte/k210: fixup FDT e435ba0 lib: sbi_init: Avoid thundering hurd problem with coldboot_lock 4f3bad6 lib: sbi: Handle the case where MTVAL has illegal instruction address 7b0b289 lib: sbi: Remove redundant SBI_HART_HAS_PMP feature 74d1db7 lib: sbi: Improve PMP CSR detection and progamming 2c341f7 lib: sbi: Detect and print MHPM counters at boot-time 162d453 include: sbi: Few cosmetic changes in riscv_encoding.h ebc8ebc lib: sbi: Improve HPM CSR read/write emulation dcb10c0 lib: sbi: Don't handle VS-mode ecall in sbi_trap_handler() bef63d6 include: Rename ECALL defines to match latest RISC-V spec c1c7c3e lib: sbi_trap: Allow M-mode to M-mode ECALLs 6734304 lib: sbi: Allow specifying start mode to sbi_hsm_hart_start() API 7ccf6bf lib: sbi: Allow specifying mode in sbi_hart_pmp_check_addr() API 9f935a4 lib: utils: Improve fdt_cpu_fixup() implementation 172fa16 lib: sbi: Ensure coldboot HART supports next privilege mode aaeca7e platform: generic: Don't mark non-MMU HARTs as invalid 7701ea1 lib: sbi: Fix PMP CSR detection 79bf80b lib: sbi_scratch: typo scatch a04c465 makefile: fix clean directive af4b50f Makefile: Build ELF, BIN and LD script in platform build directory 6ca0969 firmware: Add common FW_FDT_PATH compile-time option 9c07c51 firmware: Remove FW_PAYLOAD_FDT_PATH compile-time option e9a4bfb Makefile: Allow padding zeros when converting DTB to C source a0f2d4a platform: kendryte/k210: Add some padding for FDT fixups dbeeacb include: sbi: Remove redundant includes from sbi_platform.h a12d46a include: sbi: Remove pmp_region callbacks from sbi_platform_operations a126886 lib: sbi: Configure PMP late in coldboot and warmboot path f81d6f6 lib: sbi: Remove redundant hartid parameter from sbi_hart_init() 8b65005 include: sbi: Make hartmask pointer const in sbi_hartmask_test_hart() b1678af lib: sbi: Add initial domain support e73b92d lib: sbi: Extend sbi_hsm_hart_started_mask() for domains 3a30d2c lib: sbi: Extend sbi_hsm_hart_start() for domains 530e95b lib: sbi: Optimize sbi_hsm_hart_started_mask() implementation 3e20037 lib: sbi: Extend sbi_system_reset() for domains 5edbb7c lib: utils: Update fdt_reserved_memory_fixup() to use current domain 5fd99db lib: utils: Update fdt_cpu_fixup() to use current domain e856462 lib: sbi: Remove redundant sbi_hart_pmp_xyz() functions c10c30b lib: sbi: Configure PMP based on domain memory regions c347408 lib: sbi: Display domain details in boot prints fdf5d5c docs: Add initial documentation for domain support 74c0ea1 lib: utils: Implement "ranges" property parsing bf21632 lib: sbi: Detect PMP granularity and number of address bits a809f40 lib: sbi: Improve boot time print with additional PMP information 914f81f Makefile: Add option to use toolchain default ABI and ISA string 48616b3 lib: sbi: Improve boot prints in cold boot sequence 781cafd docs: fix a typo error 54a7734 include: sbi: Add SBI SRST extension related defines c4acc60 include: sbi: Remove opensbi specific reset type defines da07479 platform: Remove dummy system reset functions 5c429ae lib: sbi: Improve system reset platform operations 548d03e lib: sbi: Implement System Reset (SRST) SBI extension 2677324 firmware: fw_base: Optimize trap handler for RV32 systems 8d2edc4 lib: sbi: Fix sbi_hart_switch_mode() for u-mode 3d921fa lib: sbi: Fix typo in sbi_domain_finalize() 4e37022 lib: sbi: Fix domain_count check in sbi_domain_finalize() c709d40 lib: sbi: Auto start domain only if boot HART within limits c1f6d89 include: sbi: Use lower bits for domain memory region permissions 62ea4f4 lib: sbi: Override domain boot HART when coldboot HART assigned to it 555e737 lib: sbi: Add error prints in sbi_domain_finalize() 9b65dca include: sbi: Add domains_init() platform operation c0d2baa docs: Add domain device tree binding documentation ba741ea lib: utils: Add helper routines to populate domains from FDT 4fffb53 platform: generic: Populate domains from FDT e7da0b4 lib: utils/libfdt: Upgrade to v1.6.0 release 2179777 lib: utils: Allow FDT domain iteration functions to fail 7baccfc lib: sbi: Add function to register new domain 6fc1986 lib: utils: Remove fdt_domain_get() function a029bd9 lib: sbi: Remove domain_get() platform callback function 7dcb1e1 lib: sbi: Fix sign-extension in sbi_misaligned_load_handler() 80bc506 lib: sbi: Replace args with trap registers in ecall handler b7df5e4 lib: sbi: Introduce sbi_trap_exit() API 12394a2 lib: sbi: Allow custom local TLB flush function 0d49c3b lib: utils: Fix shakti uart implementation db56341 lib: sbi: Allow platforms to provide root domain memory regions e884416 include: sbi: No need to pack struct sbi_trap_regs 386eba2 include: sbi: No need to pack struct sbi_scratch 1bbf361 include: sbi: Don't pack struct sbi_platform and sbi_platform_operations da5293f platform: template: Fix compile error 234ed8e include: Bump-up version to 0.9 Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: 20210119234438.10132-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04hw/misc: sifive_u_otp: Use error_report() when block operation failsBin Meng
At present when blk_pread() / blk_pwrite() fails, a guest error is logged, but this is not really a guest error. Change to use error_report() instead. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1611026585-29971-1-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04target/riscv: Declare csr_ops[] with a known sizeBin Meng
csr_ops[] is currently declared with an unknown size in cpu.h. Since the array size is known, let's do a complete declaration. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1611024723-14293-1-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04Merge remote-tracking branch 'remotes/kraxel/tags/ui-20210304-pull-request' ↵Peter Maydell
into staging ui/console: message surface tweaks. ui/cocoa: bugfixes and cleanups. # gpg: Signature made Thu 04 Mar 2021 08:36:53 GMT # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/ui-20210304-pull-request: virtio-gpu: Do not distinguish the primary console ui/console: Pass placeholder surface to displays ui/console: Add placeholder flag to message surface ui/cocoa: Replace fprintf with error_report configure: Improve OpenGL dependency detections ui/cocoa: Fix stride resolution of pixman image ui/gtk: vte: fix sending multiple characeters ui/cocoa: Remove the uses of full screen APIs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-04Merge remote-tracking branch ↵Peter Maydell
'remotes/dgilbert-gitlab/tags/pull-virtiofs-20210304' into staging virtiofs minor security fix Fix xattrmap to drop remapped security.capability capabilities. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> # gpg: Signature made Thu 04 Mar 2021 10:36:45 GMT # gpg: using RSA key 45F5C71B4A0CB7FB977A9FA90516331EBC5BFDE7 # gpg: Good signature from "Dr. David Alan Gilbert (RH2) <dgilbert@redhat.com>" [full] # Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7 * remotes/dgilbert-gitlab/tags/pull-virtiofs-20210304: virtiofs: drop remapped security.capability xattr as needed Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-04virtiofs: drop remapped security.capability xattr as neededDr. David Alan Gilbert
On Linux, the 'security.capability' xattr holds a set of capabilities that can change when an executable is run, giving a limited form of privilege escalation to those programs that the writer of the file deemed worthy. Any write causes the 'security.capability' xattr to be dropped, stopping anyone from gaining privilege by modifying a blessed file. Fuse relies on the daemon to do this dropping, and in turn the daemon relies on the host kernel to drop the xattr for it. However, with the addition of -o xattrmap, the xattr that the guest stores its capabilities in is now not the same as the one that the host kernel automatically clears. Where the mapping changes 'security.capability', explicitly clear the remapped name to preserve the same behaviour. This bug is assigned CVE-2021-20263. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Vivek Goyal <vgoyal@redhat.com>
2021-03-04virtio-gpu: Do not distinguish the primary consoleAkihiko Odaki
In the past, virtio-gpu set NULL as the surface for the secondary consoles to hide its window. The distinction is now handled in ui/console and the display backends and virtio-gpu does no longer have to do that. Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <20210225101316.83940-3-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-03-04ui/console: Pass placeholder surface to displaysAkihiko Odaki
ui/console used to accept NULL as graphic console surface, but its semantics was inconsistent among displays: - cocoa and gtk-egl perform NULL dereference. - egl-headless, spice and spice-egl do nothing. - gtk releases underlying resources. - sdl2-2d and sdl2-gl destroys the window. - vnc shows a message, "Display output is not active." Fortunately, only virtio-gpu and virtio-gpu-3d assign NULL so we can study them to figure out the desired behavior. They assign NULL *except* for the primary display when the device is realized, reset, or its scanout is disabled. This effectively destroys windows for the (uninitialized) secondary displays. To implement the consistent behavior of display device realization/reset, this change embeds it to the operation switching the surface. When NULL was given as a new surface when switching, ui/console will instead passes a placeholder down to each display listeners. sdl destroys the window for a secondary console if its surface is a placeholder. The other displays simply shows the placeholder. Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <20210225101316.83940-2-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-03-04ui/console: Add placeholder flag to message surfaceAkihiko Odaki
The surfaces created with former qemu_create_message_surface did not display the content from the guest and always contained simple messages describing the reason. A display backend may want to hide the window showing such a surface. This change renames the function to qemu_create_placeholder_surface, and adds "placeholder" flag; the display can check the flag to decide to do anything special like hiding the window. Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <20210225101316.83940-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-03-04ui/cocoa: Replace fprintf with error_reportAkihiko Odaki
Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210223131106.21166-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-03-04configure: Improve OpenGL dependency detectionsAkihiko Odaki
This has the following visible changes: - GBM is required only for OpenGL dma-buf. - X11 is explicitly required by gtk-egl. - EGL is now mandatory for the OpenGL displays. The last one needs some detailed description. Before this change, EGL was tested only for OpenGL dma-buf with the check of EGL_MESA_image_dma_buf_export. However, all of the OpenGL displays depend on EGL and EGL_MESA_image_dma_buf_export is always defined by epoxy's EGL interface. Therefore, it makes more sense to always check the presence of EGL and say the OpenGL displays are available along with OpenGL dma-buf if it is present. Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <20210223060307.87736-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-03-04ui/cocoa: Fix stride resolution of pixman imageAkihiko Odaki
A display can receive an image which its stride is greater than its width. In fact, when a guest requests virtio-gpu to scan out a smaller part of an image, virtio-gpu passes it to a display as an image which its width represents the one of the part and its stride equals to the one of the whole image. This change makes ui/cocoa to cover such cases. Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <20210222144012.21486-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-03-04ui/gtk: vte: fix sending multiple characetersZack Marvel
When using the GTK UI with libvte, multicharacter keystrokes are not sent correctly (such as arrow keys). gd_vc_in should check the CharBackend's can_receive instead of assuming multiple characters can be received. This is not an issue for e.g. the SDL UI because qemu_chr_be_write is called with len=1 for each character (SDL sends more than once keystroke). Modify gd_vc_in to call qemu_chr_be_write multiple times if necessary. Buglink: https://bugs.launchpad.net/qemu/+bug/1407808 Signed-off-by: Zack Marvel <zpmarvel@gmail.com> Message-Id: <20210221170613.13183-2-zpmarvel@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-03-03Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell
pc,virtio,pci: bug fixes Fixes all over the place. Specifically this fixes a bug which made windows guests lose device config (such as the configured fixed IP) after upgrading to the new QEMU. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Tue 02 Mar 2021 14:19:51 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: vhost: simplify vhost_dev_init() fail_busyloop label hw/pci: Have safer pcie_bus_realize() by checking error path virtio-net: handle zero mac for a vdpa peer i386/acpi: restore device paths for pre-5.1 vms Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-03ui/cocoa: Remove the uses of full screen APIsAkihiko Odaki
The detections of [NSView -enterFullScreen:] and [NSView -exitFullScreen:] were wrong. A detection is coded as: [NSView respondsToSelector:@selector(exitFullScreenModeWithOptions:)] but it should be: [NSView instancesRespondToSelector:@selector(exitFullScreenModeWithOptions:)] Because of those APIs were not detected, ui/cocoa always falled back to a borderless window whose frame matches the screen to implement fullscreen behavior. The code using [NSView -enterFullScreen:] and [NSView -exitFullScreen:] will be used if you fix the detections, but its behavior is undesirable; the full screen view stretches the video, changing the aspect ratio, even if zooming is disabled. This change removes the code as it does nothing good. Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <20210220013138.51437-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-03-02Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ↵Peter Maydell
staging * fix --enable-fuzzing linker failures (Alexander) * target/i386: Add bus lock debug exception support (Chenyi) * update documentation for preferred boolean option syntax (Daniel) * make SCSI io_timeout configurable (Hannes) * fix handling of guest recoverable SCSI errors (myself) * misc fixes (Pavel, Zheng Zhan Liang, Zihao) * fix installation of binaries with entitlements (Akihiko) # gpg: Signature made Thu 25 Feb 2021 14:41:56 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (29 commits) tcg/i386: rdpmc: fix the the condtions chardev: do not use short form boolean options in non-QemuOpts character device descriptions vl: deprecate -writeconfig target/i386: Add bus lock debug exception support qom/object.c: Fix typo target/i386: update to show preferred boolean syntax for -cpu docs: update to show preferred boolean syntax for -cpu docs: update to show preferred boolean syntax for -vnc docs: update to show preferred boolean syntax for -chardev qemu-options: update to show preferred boolean syntax for -vnc qemu-options: update to show preferred boolean syntax for -incoming qemu-options: update to show preferred boolean syntax for -netdev qemu-options: update to show preferred boolean syntax for -spice qemu-options: update to show preferred boolean syntax for -chardev gdbstub: use preferred boolean option syntax char: don't fail when client is not connected scsi: drop 'result' argument from command_complete callback scsi-disk: pass guest recoverable errors through even for rerror=stop scsi-disk: pass SCSI status to scsi_handle_rw_error scsi: introduce scsi_sense_from_errno() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-02vhost: simplify vhost_dev_init() fail_busyloop labelStefan Hajnoczi
Requiring a conditional for every goto is tedious: if (busyloop_timeout) { goto fail_busyloop; } else { goto fail; } Move the conditional to into the fail_busyloop label so that it's safe to jump to this label unconditionally. This change makes the migrate_add_blocker() error case more consistent. It jumped to fail_busyloop unconditionally whereas the memslots limits error case was conditional. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20210222114931.272308-1-stefanha@redhat.com> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-03-02hw/pci: Have safer pcie_bus_realize() by checking error pathPhilippe Mathieu-Daudé
While pci_bus_realize() currently does not use the Error* argument, it would be an error to leave pcie_bus_realize() setting bus->flags if pci_bus_realize() had failed. Fix by using a local Error* and return early (propagating the error) if pci_bus_realize() failed. Reported-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210201153700.618946-1-philmd@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-03-02virtio-net: handle zero mac for a vdpa peerCindy Lu
Some mlx vdpa devices with kernels at least up to 5.11 currently present 0 as their MAC address. This is because they have not been pre-configured with a MAC: they have a learning bridge and only learn the MAC once guest is up. Kernel patches and tools to allow programming the MAC from host are being developed. For now - since these combinations exist in the field - let's detect zero mac and just try to proceed with the mac from the qemu command line. This makes the guest use this MAC to send packets in turn teaching the MAC to the card, and things work. TODO: report the actual MAC from QEMU commad line in the info message. TODO: detect that a (non-zero) hardware MAC does not match QEMU command line and fail init. Signed-off-by: Cindy Lu <lulu@redhat.com> Message-Id: <20210225165506.18321-2-lulu@redhat.com> mst: rewritten code comments, message printed and the commit log. Cc: Eli Cohen <elic@nvidia.com> Cc: Parav Pandit <parav@nvidia.com> Tested-by: Adrian Moreno <amorenoz@redhat.com> Tested-by: Sean Mooney <smooney@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-03-02i386/acpi: restore device paths for pre-5.1 vmsVitaly Cheptsov
After fixing the _UID value for the primary PCI root bridge in af1b80ae it was discovered that this change updates Windows configuration in an incompatible way causing network configuration failure unless DHCP is used. More details provided on the list: https://lists.gnu.org/archive/html/qemu-devel/2021-02/msg08484.html This change reverts the _UID update from 1 to 0 for q35 and i440fx VMs before version 5.2 to maintain the original behaviour when upgrading. Cc: qemu-stable@nongnu.org Cc: qemu-devel@nongnu.org Reported-by: Thomas Lamprecht <t.lamprecht@proxmox.com> Suggested-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Vitaly Cheptsov <cheptsov@ispras.ru> Message-Id: <20210301195919.9333-1-cheptsov@ispras.ru> Tested-by: Thomas Lamprecht <t.lamprecht@proxmox.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Fixes: af1b80ae56c9 ("i386/acpi: fix inconsistent QEMU/OVMF device paths")
2021-02-25Merge remote-tracking branch ↵Peter Maydell
'remotes/stsquad/tags/pull-testing-updates-240221-1' into staging Testing tweaks (build, docs, bumps) - expose cross compiler info in meson pretty print - bump Fedora to 33 - "graceful" handling of missing virgl config - updates to the container documentation - move CODING_STYLE.rst into developer manual # gpg: Signature made Wed 24 Feb 2021 11:08:03 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-updates-240221-1: docs: move CODING_STYLE into the developer documentation docs/devel: add forward reference to check-tcg docs/devel: update the container based tests docs/devel: expand on use of containers to build tests tests/acceptance: allow a "graceful" failing for virtio-gpu test docker: Bump Fedora images to release 33 meson.build: expose TCG cross compiler information in summary Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-25tcg/i386: rdpmc: fix the the condtionsZheng Zhan Liang
Signed-off-by: Zheng Zhan Liang <linuxmaker@163.com> Message-Id: <20210225054756.35962-1-linuxmaker@163.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-02-25chardev: do not use short form boolean options in non-QemuOpts character ↵Paolo Bonzini
device descriptions Options such as "-gdb" or "-serial" accept a part-QemuOpts part-parsed-by-hand character device description. Do not use short form boolean options in the QemuOpts part. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-02-25vl: deprecate -writeconfigPaolo Bonzini
The functionality of -writeconfig is limited and the code does not even try to detect cases where it prints incorrect syntax (for example if values have a quote in them, since qemu_config_parse does not support any kind of escaping) so remove it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-02-25Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell
pc,virtio,pci: fixes, tests Fixes all over the place, a new test. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Tue 23 Feb 2021 16:00:29 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: qtest/acpi/bios-tables-test: update acpi tables acpi: add test case for -no-hpet i386: acpi: Don't build HPET ACPI entry if HPET is disabled hw/i386: declare ACPI mother board resource for MMCONFIG region acpi: add test case for smm unsupported -machine smm=off acpi: set fadt.smi_cmd to zero when SMM is not supported acpi/core: always set SCI_EN when SMM isn't supported ich9, piix4: add property, smm-compat, to keep compatibility of SMM qtest: update tests/qtest/bios-tables-test-allowed-diff.h checkpatch: don't emit warning on newly created acpi data files tests/data/acpi/virt/DSDT.pxb: update with _CCA acpi/gpex: Fix cca attribute check for pxb device acpi: Allow pxb DSDT acpi table changes pcie: don't set link state active if the slot is empty failover: really display a warning when the primary device is not found virtio-net: add missing object_unref() pci: cleanup failover sanity check Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-25target/i386: Add bus lock debug exception supportChenyi Qiang
Bus lock debug exception is a feature that can notify the kernel by generate an #DB trap after the instruction acquires a bus lock when CPL>0. This allows the kernel to enforce user application throttling or mitigations. This feature is enumerated via CPUID.(EAX=7,ECX=0).ECX[bit 24]. Signed-off-by: Chenyi Qiang <chenyi.qiang@intel.com> Message-Id: <20210202090224.13274-1-chenyi.qiang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-02-25qom/object.c: Fix typoDoug Evans
A simple typo (noticed by inspection). Signed-off-by: Doug Evans <dje@google.com> Message-Id: <000000000000530c7105bb191b33@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Doug Evans <dje@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-02-25target/i386: update to show preferred boolean syntax for -cpuDaniel P. Berrangé
The preferred syntax is to use "foo=on|off", rather than a bare "+foo" or "-foo" Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20210216191027.595031-11-berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-02-25docs: update to show preferred boolean syntax for -cpuDaniel P. Berrangé
The preferred syntax is to use "foo=on|off", rather than a bare "+foo" or "-foo" Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20210216191027.595031-10-berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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